forked from Minki/linux
sh: pfc: Split out gpio chip support.
This implements a bit of rework for the PFC code, making the core itself slightly more pluggable and moving out the gpio chip handling completely. The API is preserved in such a way that platforms that depend on it for early configuration are still able to do so, while making it possible to migrate to alternate interfaces going forward. This is the first step of chainsawing necessary to support the pinctrl API, with the eventual goal being able to decouple pin function state from the gpio API while retaining gpio chip tie-in for gpio pin functions only, relying on the pinctrl/pinmux API for non-gpio function demux. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt
parent
2fe8ac608b
commit
b3c185a761
@ -6,5 +6,5 @@ obj-y := intc/
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obj-$(CONFIG_HAVE_CLK) += clk/
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obj-$(CONFIG_MAPLE) += maple/
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obj-$(CONFIG_SUPERHYWAY) += superhyway/
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obj-$(CONFIG_GENERIC_GPIO) += pfc.o
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obj-$(CONFIG_GENERIC_GPIO) += pfc.o pfc-gpio.o
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obj-y += pm_runtime.o
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309
drivers/sh/pfc-gpio.c
Normal file
309
drivers/sh/pfc-gpio.c
Normal file
@ -0,0 +1,309 @@
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/*
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* SuperH Pin Function Controller GPIO driver.
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*
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* Copyright (C) 2008 Magnus Damm
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* Copyright (C) 2009 - 2012 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/init.h>
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#include <linux/gpio.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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struct sh_pfc_chip {
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struct sh_pfc *pfc;
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struct gpio_chip gpio_chip;
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};
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static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc)
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{
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return container_of(gc, struct sh_pfc_chip, gpio_chip);
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}
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static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc)
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{
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return gpio_to_pfc_chip(gc)->pfc;
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}
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static int sh_gpio_request(struct gpio_chip *gc, unsigned offset)
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{
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struct sh_pfc *pfc = gpio_to_pfc(gc);
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struct pinmux_data_reg *dummy;
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unsigned long flags;
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int i, ret, pinmux_type;
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ret = -EINVAL;
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if (!pfc)
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goto err_out;
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spin_lock_irqsave(&pfc->lock, flags);
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if ((pfc->gpios[offset].flags & PINMUX_FLAG_TYPE) != PINMUX_TYPE_NONE)
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goto err_unlock;
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/* setup pin function here if no data is associated with pin */
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if (sh_pfc_get_data_reg(pfc, offset, &dummy, &i) != 0)
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pinmux_type = PINMUX_TYPE_FUNCTION;
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else
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pinmux_type = PINMUX_TYPE_GPIO;
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if (pinmux_type == PINMUX_TYPE_FUNCTION) {
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if (sh_pfc_config_gpio(pfc, offset,
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pinmux_type,
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GPIO_CFG_DRYRUN) != 0)
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goto err_unlock;
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if (sh_pfc_config_gpio(pfc, offset,
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pinmux_type,
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GPIO_CFG_REQ) != 0)
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BUG();
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}
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pfc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
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pfc->gpios[offset].flags |= pinmux_type;
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ret = 0;
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err_unlock:
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spin_unlock_irqrestore(&pfc->lock, flags);
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err_out:
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return ret;
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}
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static void sh_gpio_free(struct gpio_chip *gc, unsigned offset)
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{
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struct sh_pfc *pfc = gpio_to_pfc(gc);
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unsigned long flags;
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int pinmux_type;
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if (!pfc)
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return;
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spin_lock_irqsave(&pfc->lock, flags);
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pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE;
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sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
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pfc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
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pfc->gpios[offset].flags |= PINMUX_TYPE_NONE;
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spin_unlock_irqrestore(&pfc->lock, flags);
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}
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static int sh_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
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{
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struct sh_pfc *pfc = gpio_to_pfc(gc);
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unsigned long flags;
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int ret;
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spin_lock_irqsave(&pfc->lock, flags);
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ret = sh_pfc_set_direction(pfc, offset, PINMUX_TYPE_INPUT);
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spin_unlock_irqrestore(&pfc->lock, flags);
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return ret;
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}
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static void sh_gpio_set_value(struct sh_pfc *pfc, unsigned gpio, int value)
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{
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struct pinmux_data_reg *dr = NULL;
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int bit = 0;
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if (!pfc || sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0)
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BUG();
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else
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sh_pfc_write_bit(dr, bit, value);
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}
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static int sh_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
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int value)
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{
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struct sh_pfc *pfc = gpio_to_pfc(gc);
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unsigned long flags;
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int ret;
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sh_gpio_set_value(pfc, offset, value);
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spin_lock_irqsave(&pfc->lock, flags);
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ret = sh_pfc_set_direction(pfc, offset, PINMUX_TYPE_OUTPUT);
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spin_unlock_irqrestore(&pfc->lock, flags);
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return ret;
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}
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static int sh_gpio_get_value(struct sh_pfc *pfc, unsigned gpio)
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{
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struct pinmux_data_reg *dr = NULL;
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int bit = 0;
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if (!pfc || sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0)
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return -EINVAL;
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return sh_pfc_read_bit(dr, bit);
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}
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static int sh_gpio_get(struct gpio_chip *gc, unsigned offset)
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{
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return sh_gpio_get_value(gpio_to_pfc(gc), offset);
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}
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static void sh_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
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{
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sh_gpio_set_value(gpio_to_pfc(gc), offset, value);
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}
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static int sh_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
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{
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struct sh_pfc *pfc = gpio_to_pfc(gc);
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pinmux_enum_t enum_id;
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pinmux_enum_t *enum_ids;
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int i, k, pos;
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pos = 0;
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enum_id = 0;
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while (1) {
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pos = sh_pfc_gpio_to_enum(pfc, offset, pos, &enum_id);
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if (pos <= 0 || !enum_id)
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break;
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for (i = 0; i < pfc->gpio_irq_size; i++) {
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enum_ids = pfc->gpio_irq[i].enum_ids;
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for (k = 0; enum_ids[k]; k++) {
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if (enum_ids[k] == enum_id)
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return pfc->gpio_irq[i].irq;
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}
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}
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}
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return -ENOSYS;
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}
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static void sh_pfc_gpio_setup(struct sh_pfc_chip *chip)
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{
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struct sh_pfc *pfc = chip->pfc;
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struct gpio_chip *gc = &chip->gpio_chip;
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gc->request = sh_gpio_request;
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gc->free = sh_gpio_free;
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gc->direction_input = sh_gpio_direction_input;
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gc->get = sh_gpio_get;
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gc->direction_output = sh_gpio_direction_output;
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gc->set = sh_gpio_set;
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gc->to_irq = sh_gpio_to_irq;
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WARN_ON(pfc->first_gpio != 0); /* needs testing */
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gc->label = pfc->name;
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gc->owner = THIS_MODULE;
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gc->base = pfc->first_gpio;
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gc->ngpio = (pfc->last_gpio - pfc->first_gpio) + 1;
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}
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int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
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{
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struct sh_pfc_chip *chip;
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int ret;
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chip = kzalloc(sizeof(struct sh_pfc_chip), GFP_KERNEL);
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if (unlikely(!chip))
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return -ENOMEM;
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chip->pfc = pfc;
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sh_pfc_gpio_setup(chip);
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ret = gpiochip_add(&chip->gpio_chip);
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if (unlikely(ret < 0))
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kfree(chip);
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pr_info("%s handling gpio %d -> %d\n",
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pfc->name, pfc->first_gpio, pfc->last_gpio);
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return ret;
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}
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EXPORT_SYMBOL_GPL(sh_pfc_register_gpiochip);
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static int sh_pfc_gpio_match(struct gpio_chip *gc, void *data)
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{
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return !!strstr(gc->label, data);
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}
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static int __devinit sh_pfc_gpio_probe(struct platform_device *pdev)
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{
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struct sh_pfc_chip *chip;
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struct gpio_chip *gc;
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gc = gpiochip_find("_pfc", sh_pfc_gpio_match);
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if (unlikely(!gc)) {
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pr_err("Cant find gpio chip\n");
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return -ENODEV;
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}
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chip = gpio_to_pfc_chip(gc);
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platform_set_drvdata(pdev, chip);
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pr_info("attaching to GPIO chip %s\n", chip->pfc->name);
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return 0;
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}
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static int __devexit sh_pfc_gpio_remove(struct platform_device *pdev)
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{
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struct sh_pfc_chip *chip = platform_get_drvdata(pdev);
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int ret;
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ret = gpiochip_remove(&chip->gpio_chip);
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if (unlikely(ret < 0))
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return ret;
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kfree(chip);
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return 0;
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}
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static struct platform_driver sh_pfc_gpio_driver = {
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.probe = sh_pfc_gpio_probe,
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.remove = __devexit_p(sh_pfc_gpio_remove),
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.driver = {
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.name = KBUILD_MODNAME,
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.owner = THIS_MODULE,
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},
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};
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static struct platform_device sh_pfc_gpio_device = {
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.name = KBUILD_MODNAME,
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.id = -1,
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};
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static int __init sh_pfc_gpio_init(void)
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{
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int rc;
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rc = platform_driver_register(&sh_pfc_gpio_driver);
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if (likely(!rc)) {
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rc = platform_device_register(&sh_pfc_gpio_device);
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if (unlikely(rc))
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platform_driver_unregister(&sh_pfc_gpio_driver);
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}
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return rc;
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}
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static void __exit sh_pfc_gpio_exit(void)
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{
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platform_device_unregister(&sh_pfc_gpio_device);
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platform_driver_unregister(&sh_pfc_gpio_driver);
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}
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module_init(sh_pfc_gpio_init);
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module_exit(sh_pfc_gpio_exit);
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MODULE_AUTHOR("Magnus Damm, Paul Mundt");
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MODULE_DESCRIPTION("GPIO driver for SuperH pin function controller");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:pfc-gpio");
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376
drivers/sh/pfc.c
376
drivers/sh/pfc.c
@ -1,7 +1,8 @@
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/*
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* Pinmuxed GPIO support for SuperH.
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* SuperH Pin Function Controller support.
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*
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* Copyright (C) 2008 Magnus Damm
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* Copyright (C) 2009 - 2012 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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@ -11,70 +12,74 @@
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/sh_pfc.h>
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#include <linux/module.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/bitops.h>
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#include <linux/gpio.h>
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#include <linux/slab.h>
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#include <linux/ioport.h>
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static void pfc_iounmap(struct pinmux_info *pip)
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static struct sh_pfc *sh_pfc __read_mostly;
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static inline bool sh_pfc_initialized(void)
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{
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return !!sh_pfc;
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}
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static void pfc_iounmap(struct sh_pfc *pfc)
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{
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int k;
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for (k = 0; k < pip->num_resources; k++)
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if (pip->window[k].virt)
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iounmap(pip->window[k].virt);
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for (k = 0; k < pfc->num_resources; k++)
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if (pfc->window[k].virt)
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iounmap(pfc->window[k].virt);
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kfree(pip->window);
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pip->window = NULL;
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kfree(pfc->window);
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pfc->window = NULL;
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}
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static int pfc_ioremap(struct pinmux_info *pip)
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static int pfc_ioremap(struct sh_pfc *pfc)
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{
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struct resource *res;
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int k;
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if (!pip->num_resources)
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if (!pfc->num_resources)
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return 0;
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pip->window = kzalloc(pip->num_resources * sizeof(*pip->window),
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pfc->window = kzalloc(pfc->num_resources * sizeof(*pfc->window),
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GFP_NOWAIT);
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if (!pip->window)
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if (!pfc->window)
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goto err1;
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for (k = 0; k < pip->num_resources; k++) {
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res = pip->resource + k;
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for (k = 0; k < pfc->num_resources; k++) {
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res = pfc->resource + k;
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WARN_ON(resource_type(res) != IORESOURCE_MEM);
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pip->window[k].phys = res->start;
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pip->window[k].size = resource_size(res);
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pip->window[k].virt = ioremap_nocache(res->start,
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pfc->window[k].phys = res->start;
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pfc->window[k].size = resource_size(res);
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pfc->window[k].virt = ioremap_nocache(res->start,
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resource_size(res));
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if (!pip->window[k].virt)
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if (!pfc->window[k].virt)
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goto err2;
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}
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return 0;
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err2:
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pfc_iounmap(pip);
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pfc_iounmap(pfc);
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err1:
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return -1;
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}
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static void __iomem *pfc_phys_to_virt(struct pinmux_info *pip,
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static void __iomem *pfc_phys_to_virt(struct sh_pfc *pfc,
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unsigned long address)
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{
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struct pfc_window *window;
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int k;
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/* scan through physical windows and convert address */
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for (k = 0; k < pip->num_resources; k++) {
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window = pip->window + k;
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for (k = 0; k < pfc->num_resources; k++) {
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window = pfc->window + k;
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if (address < window->phys)
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continue;
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@ -135,8 +140,7 @@ static void gpio_write_raw_reg(void __iomem *mapped_reg,
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BUG();
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}
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static int gpio_read_bit(struct pinmux_data_reg *dr,
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unsigned long in_pos)
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int sh_pfc_read_bit(struct pinmux_data_reg *dr, unsigned long in_pos)
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{
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unsigned long pos;
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@ -147,9 +151,10 @@ static int gpio_read_bit(struct pinmux_data_reg *dr,
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return (gpio_read_raw_reg(dr->mapped_reg, dr->reg_width) >> pos) & 1;
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}
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EXPORT_SYMBOL_GPL(sh_pfc_read_bit);
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static void gpio_write_bit(struct pinmux_data_reg *dr,
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unsigned long in_pos, unsigned long value)
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void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos,
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unsigned long value)
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{
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unsigned long pos;
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@ -166,8 +171,9 @@ static void gpio_write_bit(struct pinmux_data_reg *dr,
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gpio_write_raw_reg(dr->mapped_reg, dr->reg_width, dr->reg_shadow);
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}
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EXPORT_SYMBOL_GPL(sh_pfc_write_bit);
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static void config_reg_helper(struct pinmux_info *gpioc,
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static void config_reg_helper(struct sh_pfc *pfc,
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struct pinmux_cfg_reg *crp,
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unsigned long in_pos,
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void __iomem **mapped_regp,
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@ -176,7 +182,7 @@ static void config_reg_helper(struct pinmux_info *gpioc,
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{
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int k;
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*mapped_regp = pfc_phys_to_virt(gpioc, crp->reg);
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*mapped_regp = pfc_phys_to_virt(pfc, crp->reg);
|
||||
|
||||
if (crp->field_width) {
|
||||
*maskp = (1 << crp->field_width) - 1;
|
||||
@ -189,14 +195,14 @@ static void config_reg_helper(struct pinmux_info *gpioc,
|
||||
}
|
||||
}
|
||||
|
||||
static int read_config_reg(struct pinmux_info *gpioc,
|
||||
static int read_config_reg(struct sh_pfc *pfc,
|
||||
struct pinmux_cfg_reg *crp,
|
||||
unsigned long field)
|
||||
{
|
||||
void __iomem *mapped_reg;
|
||||
unsigned long mask, pos;
|
||||
|
||||
config_reg_helper(gpioc, crp, field, &mapped_reg, &mask, &pos);
|
||||
config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
|
||||
|
||||
pr_debug("read_reg: addr = %lx, field = %ld, "
|
||||
"r_width = %ld, f_width = %ld\n",
|
||||
@ -205,14 +211,14 @@ static int read_config_reg(struct pinmux_info *gpioc,
|
||||
return (gpio_read_raw_reg(mapped_reg, crp->reg_width) >> pos) & mask;
|
||||
}
|
||||
|
||||
static void write_config_reg(struct pinmux_info *gpioc,
|
||||
static void write_config_reg(struct sh_pfc *pfc,
|
||||
struct pinmux_cfg_reg *crp,
|
||||
unsigned long field, unsigned long value)
|
||||
{
|
||||
void __iomem *mapped_reg;
|
||||
unsigned long mask, pos, data;
|
||||
|
||||
config_reg_helper(gpioc, crp, field, &mapped_reg, &mask, &pos);
|
||||
config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
|
||||
|
||||
pr_debug("write_reg addr = %lx, value = %ld, field = %ld, "
|
||||
"r_width = %ld, f_width = %ld\n",
|
||||
@ -225,30 +231,30 @@ static void write_config_reg(struct pinmux_info *gpioc,
|
||||
data &= mask;
|
||||
data |= value;
|
||||
|
||||
if (gpioc->unlock_reg)
|
||||
gpio_write_raw_reg(pfc_phys_to_virt(gpioc, gpioc->unlock_reg),
|
||||
if (pfc->unlock_reg)
|
||||
gpio_write_raw_reg(pfc_phys_to_virt(pfc, pfc->unlock_reg),
|
||||
32, ~data);
|
||||
|
||||
gpio_write_raw_reg(mapped_reg, crp->reg_width, data);
|
||||
}
|
||||
|
||||
static int setup_data_reg(struct pinmux_info *gpioc, unsigned gpio)
|
||||
static int setup_data_reg(struct sh_pfc *pfc, unsigned gpio)
|
||||
{
|
||||
struct pinmux_gpio *gpiop = &gpioc->gpios[gpio];
|
||||
struct pinmux_gpio *gpiop = &pfc->gpios[gpio];
|
||||
struct pinmux_data_reg *data_reg;
|
||||
int k, n;
|
||||
|
||||
if (!enum_in_range(gpiop->enum_id, &gpioc->data))
|
||||
if (!enum_in_range(gpiop->enum_id, &pfc->data))
|
||||
return -1;
|
||||
|
||||
k = 0;
|
||||
while (1) {
|
||||
data_reg = gpioc->data_regs + k;
|
||||
data_reg = pfc->data_regs + k;
|
||||
|
||||
if (!data_reg->reg_width)
|
||||
break;
|
||||
|
||||
data_reg->mapped_reg = pfc_phys_to_virt(gpioc, data_reg->reg);
|
||||
data_reg->mapped_reg = pfc_phys_to_virt(pfc, data_reg->reg);
|
||||
|
||||
for (n = 0; n < data_reg->reg_width; n++) {
|
||||
if (data_reg->enum_ids[n] == gpiop->enum_id) {
|
||||
@ -267,17 +273,17 @@ static int setup_data_reg(struct pinmux_info *gpioc, unsigned gpio)
|
||||
return -1;
|
||||
}
|
||||
|
||||
static void setup_data_regs(struct pinmux_info *gpioc)
|
||||
static void setup_data_regs(struct sh_pfc *pfc)
|
||||
{
|
||||
struct pinmux_data_reg *drp;
|
||||
int k;
|
||||
|
||||
for (k = gpioc->first_gpio; k <= gpioc->last_gpio; k++)
|
||||
setup_data_reg(gpioc, k);
|
||||
for (k = pfc->first_gpio; k <= pfc->last_gpio; k++)
|
||||
setup_data_reg(pfc, k);
|
||||
|
||||
k = 0;
|
||||
while (1) {
|
||||
drp = gpioc->data_regs + k;
|
||||
drp = pfc->data_regs + k;
|
||||
|
||||
if (!drp->reg_width)
|
||||
break;
|
||||
@ -288,23 +294,24 @@ static void setup_data_regs(struct pinmux_info *gpioc)
|
||||
}
|
||||
}
|
||||
|
||||
static int get_data_reg(struct pinmux_info *gpioc, unsigned gpio,
|
||||
int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
|
||||
struct pinmux_data_reg **drp, int *bitp)
|
||||
{
|
||||
struct pinmux_gpio *gpiop = &gpioc->gpios[gpio];
|
||||
struct pinmux_gpio *gpiop = &pfc->gpios[gpio];
|
||||
int k, n;
|
||||
|
||||
if (!enum_in_range(gpiop->enum_id, &gpioc->data))
|
||||
if (!enum_in_range(gpiop->enum_id, &pfc->data))
|
||||
return -1;
|
||||
|
||||
k = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT;
|
||||
n = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT;
|
||||
*drp = gpioc->data_regs + k;
|
||||
*drp = pfc->data_regs + k;
|
||||
*bitp = n;
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(sh_pfc_get_data_reg);
|
||||
|
||||
static int get_config_reg(struct pinmux_info *gpioc, pinmux_enum_t enum_id,
|
||||
static int get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
|
||||
struct pinmux_cfg_reg **crp,
|
||||
int *fieldp, int *valuep,
|
||||
unsigned long **cntp)
|
||||
@ -315,7 +322,7 @@ static int get_config_reg(struct pinmux_info *gpioc, pinmux_enum_t enum_id,
|
||||
|
||||
k = 0;
|
||||
while (1) {
|
||||
config_reg = gpioc->cfg_regs + k;
|
||||
config_reg = pfc->cfg_regs + k;
|
||||
|
||||
r_width = config_reg->reg_width;
|
||||
f_width = config_reg->field_width;
|
||||
@ -350,15 +357,15 @@ static int get_config_reg(struct pinmux_info *gpioc, pinmux_enum_t enum_id,
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int get_gpio_enum_id(struct pinmux_info *gpioc, unsigned gpio,
|
||||
int pos, pinmux_enum_t *enum_idp)
|
||||
int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos,
|
||||
pinmux_enum_t *enum_idp)
|
||||
{
|
||||
pinmux_enum_t enum_id = gpioc->gpios[gpio].enum_id;
|
||||
pinmux_enum_t *data = gpioc->gpio_data;
|
||||
pinmux_enum_t enum_id = pfc->gpios[gpio].enum_id;
|
||||
pinmux_enum_t *data = pfc->gpio_data;
|
||||
int k;
|
||||
|
||||
if (!enum_in_range(enum_id, &gpioc->data)) {
|
||||
if (!enum_in_range(enum_id, &gpioc->mark)) {
|
||||
if (!enum_in_range(enum_id, &pfc->data)) {
|
||||
if (!enum_in_range(enum_id, &pfc->mark)) {
|
||||
pr_err("non data/mark enum_id for gpio %d\n", gpio);
|
||||
return -1;
|
||||
}
|
||||
@ -369,7 +376,7 @@ static int get_gpio_enum_id(struct pinmux_info *gpioc, unsigned gpio,
|
||||
return pos + 1;
|
||||
}
|
||||
|
||||
for (k = 0; k < gpioc->gpio_data_size; k++) {
|
||||
for (k = 0; k < pfc->gpio_data_size; k++) {
|
||||
if (data[k] == enum_id) {
|
||||
*enum_idp = data[k + 1];
|
||||
return k + 1;
|
||||
@ -379,11 +386,10 @@ static int get_gpio_enum_id(struct pinmux_info *gpioc, unsigned gpio,
|
||||
pr_err("cannot locate data/mark enum_id for gpio %d\n", gpio);
|
||||
return -1;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(sh_pfc_gpio_to_enum);
|
||||
|
||||
enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
|
||||
|
||||
static int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
|
||||
int pinmux_type, int cfg_mode)
|
||||
int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
|
||||
int cfg_mode)
|
||||
{
|
||||
struct pinmux_cfg_reg *cr = NULL;
|
||||
pinmux_enum_t enum_id;
|
||||
@ -398,19 +404,19 @@ static int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
|
||||
break;
|
||||
|
||||
case PINMUX_TYPE_OUTPUT:
|
||||
range = &gpioc->output;
|
||||
range = &pfc->output;
|
||||
break;
|
||||
|
||||
case PINMUX_TYPE_INPUT:
|
||||
range = &gpioc->input;
|
||||
range = &pfc->input;
|
||||
break;
|
||||
|
||||
case PINMUX_TYPE_INPUT_PULLUP:
|
||||
range = &gpioc->input_pu;
|
||||
range = &pfc->input_pu;
|
||||
break;
|
||||
|
||||
case PINMUX_TYPE_INPUT_PULLDOWN:
|
||||
range = &gpioc->input_pd;
|
||||
range = &pfc->input_pd;
|
||||
break;
|
||||
|
||||
default:
|
||||
@ -422,7 +428,7 @@ static int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
|
||||
field = 0;
|
||||
value = 0;
|
||||
while (1) {
|
||||
pos = get_gpio_enum_id(gpioc, gpio, pos, &enum_id);
|
||||
pos = sh_pfc_gpio_to_enum(pfc, gpio, pos, &enum_id);
|
||||
if (pos <= 0)
|
||||
goto out_err;
|
||||
|
||||
@ -430,7 +436,7 @@ static int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
|
||||
break;
|
||||
|
||||
/* first check if this is a function enum */
|
||||
in_range = enum_in_range(enum_id, &gpioc->function);
|
||||
in_range = enum_in_range(enum_id, &pfc->function);
|
||||
if (!in_range) {
|
||||
/* not a function enum */
|
||||
if (range) {
|
||||
@ -467,19 +473,19 @@ static int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
|
||||
if (!in_range)
|
||||
continue;
|
||||
|
||||
if (get_config_reg(gpioc, enum_id, &cr,
|
||||
if (get_config_reg(pfc, enum_id, &cr,
|
||||
&field, &value, &cntp) != 0)
|
||||
goto out_err;
|
||||
|
||||
switch (cfg_mode) {
|
||||
case GPIO_CFG_DRYRUN:
|
||||
if (!*cntp ||
|
||||
(read_config_reg(gpioc, cr, field) != value))
|
||||
(read_config_reg(pfc, cr, field) != value))
|
||||
continue;
|
||||
break;
|
||||
|
||||
case GPIO_CFG_REQ:
|
||||
write_config_reg(gpioc, cr, field, value);
|
||||
write_config_reg(pfc, cr, field, value);
|
||||
*cntp = *cntp + 1;
|
||||
break;
|
||||
|
||||
@ -493,89 +499,18 @@ static int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
|
||||
out_err:
|
||||
return -1;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(sh_pfc_config_gpio);
|
||||
|
||||
static DEFINE_SPINLOCK(gpio_lock);
|
||||
|
||||
static struct pinmux_info *chip_to_pinmux(struct gpio_chip *chip)
|
||||
{
|
||||
return container_of(chip, struct pinmux_info, chip);
|
||||
}
|
||||
|
||||
static int sh_gpio_request(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
struct pinmux_info *gpioc = chip_to_pinmux(chip);
|
||||
struct pinmux_data_reg *dummy;
|
||||
unsigned long flags;
|
||||
int i, ret, pinmux_type;
|
||||
|
||||
ret = -EINVAL;
|
||||
|
||||
if (!gpioc)
|
||||
goto err_out;
|
||||
|
||||
spin_lock_irqsave(&gpio_lock, flags);
|
||||
|
||||
if ((gpioc->gpios[offset].flags & PINMUX_FLAG_TYPE) != PINMUX_TYPE_NONE)
|
||||
goto err_unlock;
|
||||
|
||||
/* setup pin function here if no data is associated with pin */
|
||||
|
||||
if (get_data_reg(gpioc, offset, &dummy, &i) != 0)
|
||||
pinmux_type = PINMUX_TYPE_FUNCTION;
|
||||
else
|
||||
pinmux_type = PINMUX_TYPE_GPIO;
|
||||
|
||||
if (pinmux_type == PINMUX_TYPE_FUNCTION) {
|
||||
if (pinmux_config_gpio(gpioc, offset,
|
||||
pinmux_type,
|
||||
GPIO_CFG_DRYRUN) != 0)
|
||||
goto err_unlock;
|
||||
|
||||
if (pinmux_config_gpio(gpioc, offset,
|
||||
pinmux_type,
|
||||
GPIO_CFG_REQ) != 0)
|
||||
BUG();
|
||||
}
|
||||
|
||||
gpioc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
|
||||
gpioc->gpios[offset].flags |= pinmux_type;
|
||||
|
||||
ret = 0;
|
||||
err_unlock:
|
||||
spin_unlock_irqrestore(&gpio_lock, flags);
|
||||
err_out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void sh_gpio_free(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
struct pinmux_info *gpioc = chip_to_pinmux(chip);
|
||||
unsigned long flags;
|
||||
int pinmux_type;
|
||||
|
||||
if (!gpioc)
|
||||
return;
|
||||
|
||||
spin_lock_irqsave(&gpio_lock, flags);
|
||||
|
||||
pinmux_type = gpioc->gpios[offset].flags & PINMUX_FLAG_TYPE;
|
||||
pinmux_config_gpio(gpioc, offset, pinmux_type, GPIO_CFG_FREE);
|
||||
gpioc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
|
||||
gpioc->gpios[offset].flags |= PINMUX_TYPE_NONE;
|
||||
|
||||
spin_unlock_irqrestore(&gpio_lock, flags);
|
||||
}
|
||||
|
||||
static int pinmux_direction(struct pinmux_info *gpioc,
|
||||
unsigned gpio, int new_pinmux_type)
|
||||
int sh_pfc_set_direction(struct sh_pfc *pfc, unsigned gpio,
|
||||
int new_pinmux_type)
|
||||
{
|
||||
int pinmux_type;
|
||||
int ret = -EINVAL;
|
||||
|
||||
if (!gpioc)
|
||||
if (!pfc)
|
||||
goto err_out;
|
||||
|
||||
pinmux_type = gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE;
|
||||
pinmux_type = pfc->gpios[gpio].flags & PINMUX_FLAG_TYPE;
|
||||
|
||||
switch (pinmux_type) {
|
||||
case PINMUX_TYPE_GPIO:
|
||||
@ -584,156 +519,55 @@ static int pinmux_direction(struct pinmux_info *gpioc,
|
||||
case PINMUX_TYPE_INPUT:
|
||||
case PINMUX_TYPE_INPUT_PULLUP:
|
||||
case PINMUX_TYPE_INPUT_PULLDOWN:
|
||||
pinmux_config_gpio(gpioc, gpio, pinmux_type, GPIO_CFG_FREE);
|
||||
sh_pfc_config_gpio(pfc, gpio, pinmux_type, GPIO_CFG_FREE);
|
||||
break;
|
||||
default:
|
||||
goto err_out;
|
||||
}
|
||||
|
||||
if (pinmux_config_gpio(gpioc, gpio,
|
||||
if (sh_pfc_config_gpio(pfc, gpio,
|
||||
new_pinmux_type,
|
||||
GPIO_CFG_DRYRUN) != 0)
|
||||
goto err_out;
|
||||
|
||||
if (pinmux_config_gpio(gpioc, gpio,
|
||||
if (sh_pfc_config_gpio(pfc, gpio,
|
||||
new_pinmux_type,
|
||||
GPIO_CFG_REQ) != 0)
|
||||
BUG();
|
||||
|
||||
gpioc->gpios[gpio].flags &= ~PINMUX_FLAG_TYPE;
|
||||
gpioc->gpios[gpio].flags |= new_pinmux_type;
|
||||
pfc->gpios[gpio].flags &= ~PINMUX_FLAG_TYPE;
|
||||
pfc->gpios[gpio].flags |= new_pinmux_type;
|
||||
|
||||
ret = 0;
|
||||
err_out:
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(sh_pfc_set_direction);
|
||||
|
||||
static int sh_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
|
||||
int register_sh_pfc(struct sh_pfc *pfc)
|
||||
{
|
||||
struct pinmux_info *gpioc = chip_to_pinmux(chip);
|
||||
unsigned long flags;
|
||||
int (*initroutine)(struct sh_pfc *) = NULL;
|
||||
int ret;
|
||||
|
||||
spin_lock_irqsave(&gpio_lock, flags);
|
||||
ret = pinmux_direction(gpioc, offset, PINMUX_TYPE_INPUT);
|
||||
spin_unlock_irqrestore(&gpio_lock, flags);
|
||||
if (sh_pfc)
|
||||
return -EBUSY;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void sh_gpio_set_value(struct pinmux_info *gpioc,
|
||||
unsigned gpio, int value)
|
||||
{
|
||||
struct pinmux_data_reg *dr = NULL;
|
||||
int bit = 0;
|
||||
|
||||
if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0)
|
||||
BUG();
|
||||
else
|
||||
gpio_write_bit(dr, bit, value);
|
||||
}
|
||||
|
||||
static int sh_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
|
||||
int value)
|
||||
{
|
||||
struct pinmux_info *gpioc = chip_to_pinmux(chip);
|
||||
unsigned long flags;
|
||||
int ret;
|
||||
|
||||
sh_gpio_set_value(gpioc, offset, value);
|
||||
spin_lock_irqsave(&gpio_lock, flags);
|
||||
ret = pinmux_direction(gpioc, offset, PINMUX_TYPE_OUTPUT);
|
||||
spin_unlock_irqrestore(&gpio_lock, flags);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int sh_gpio_get_value(struct pinmux_info *gpioc, unsigned gpio)
|
||||
{
|
||||
struct pinmux_data_reg *dr = NULL;
|
||||
int bit = 0;
|
||||
|
||||
if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0)
|
||||
return -EINVAL;
|
||||
|
||||
return gpio_read_bit(dr, bit);
|
||||
}
|
||||
|
||||
static int sh_gpio_get(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
return sh_gpio_get_value(chip_to_pinmux(chip), offset);
|
||||
}
|
||||
|
||||
static void sh_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
|
||||
{
|
||||
sh_gpio_set_value(chip_to_pinmux(chip), offset, value);
|
||||
}
|
||||
|
||||
static int sh_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
struct pinmux_info *gpioc = chip_to_pinmux(chip);
|
||||
pinmux_enum_t enum_id;
|
||||
pinmux_enum_t *enum_ids;
|
||||
int i, k, pos;
|
||||
|
||||
pos = 0;
|
||||
enum_id = 0;
|
||||
while (1) {
|
||||
pos = get_gpio_enum_id(gpioc, offset, pos, &enum_id);
|
||||
if (pos <= 0 || !enum_id)
|
||||
break;
|
||||
|
||||
for (i = 0; i < gpioc->gpio_irq_size; i++) {
|
||||
enum_ids = gpioc->gpio_irq[i].enum_ids;
|
||||
for (k = 0; enum_ids[k]; k++) {
|
||||
if (enum_ids[k] == enum_id)
|
||||
return gpioc->gpio_irq[i].irq;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
int register_pinmux(struct pinmux_info *pip)
|
||||
{
|
||||
struct gpio_chip *chip = &pip->chip;
|
||||
int ret;
|
||||
|
||||
pr_info("%s handling gpio %d -> %d\n",
|
||||
pip->name, pip->first_gpio, pip->last_gpio);
|
||||
|
||||
ret = pfc_ioremap(pip);
|
||||
if (ret < 0)
|
||||
ret = pfc_ioremap(pfc);
|
||||
if (unlikely(ret < 0))
|
||||
return ret;
|
||||
|
||||
setup_data_regs(pip);
|
||||
spin_lock_init(&pfc->lock);
|
||||
|
||||
chip->request = sh_gpio_request;
|
||||
chip->free = sh_gpio_free;
|
||||
chip->direction_input = sh_gpio_direction_input;
|
||||
chip->get = sh_gpio_get;
|
||||
chip->direction_output = sh_gpio_direction_output;
|
||||
chip->set = sh_gpio_set;
|
||||
chip->to_irq = sh_gpio_to_irq;
|
||||
setup_data_regs(pfc);
|
||||
|
||||
WARN_ON(pip->first_gpio != 0); /* needs testing */
|
||||
sh_pfc = pfc;
|
||||
pr_info("%s support registered\n", pfc->name);
|
||||
|
||||
chip->label = pip->name;
|
||||
chip->owner = THIS_MODULE;
|
||||
chip->base = pip->first_gpio;
|
||||
chip->ngpio = (pip->last_gpio - pip->first_gpio) + 1;
|
||||
initroutine = symbol_request(sh_pfc_register_gpiochip);
|
||||
if (initroutine) {
|
||||
(*initroutine)(pfc);
|
||||
symbol_put_addr(initroutine);
|
||||
}
|
||||
|
||||
ret = gpiochip_add(chip);
|
||||
if (ret < 0)
|
||||
pfc_iounmap(pip);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int unregister_pinmux(struct pinmux_info *pip)
|
||||
{
|
||||
pr_info("%s deregistering\n", pip->name);
|
||||
pfc_iounmap(pip);
|
||||
return gpiochip_remove(&pip->chip);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -89,7 +89,7 @@ struct pfc_window {
|
||||
unsigned long size;
|
||||
};
|
||||
|
||||
struct pinmux_info {
|
||||
struct sh_pfc {
|
||||
char *name;
|
||||
pinmux_enum_t reserved_id;
|
||||
struct pinmux_range data;
|
||||
@ -112,17 +112,44 @@ struct pinmux_info {
|
||||
struct pinmux_irq *gpio_irq;
|
||||
unsigned int gpio_irq_size;
|
||||
|
||||
spinlock_t lock;
|
||||
|
||||
struct resource *resource;
|
||||
unsigned int num_resources;
|
||||
struct pfc_window *window;
|
||||
|
||||
unsigned long unlock_reg;
|
||||
|
||||
struct gpio_chip chip;
|
||||
};
|
||||
|
||||
int register_pinmux(struct pinmux_info *pip);
|
||||
int unregister_pinmux(struct pinmux_info *pip);
|
||||
/* XXX compat for now */
|
||||
#define pinmux_info sh_pfc
|
||||
|
||||
/* drivers/sh/pfc-gpio.c */
|
||||
int sh_pfc_register_gpiochip(struct sh_pfc *pfc);
|
||||
|
||||
/* drivers/sh/pfc.c */
|
||||
int register_sh_pfc(struct sh_pfc *pfc);
|
||||
|
||||
int sh_pfc_read_bit(struct pinmux_data_reg *dr, unsigned long in_pos);
|
||||
void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos,
|
||||
unsigned long value);
|
||||
int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
|
||||
struct pinmux_data_reg **drp, int *bitp);
|
||||
int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos,
|
||||
pinmux_enum_t *enum_idp);
|
||||
int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
|
||||
int cfg_mode);
|
||||
int sh_pfc_set_direction(struct sh_pfc *pfc, unsigned gpio,
|
||||
int new_pinmux_type);
|
||||
|
||||
/* xxx */
|
||||
static inline int register_pinmux(struct pinmux_info *pip)
|
||||
{
|
||||
struct sh_pfc *pfc = pip;
|
||||
return register_sh_pfc(pfc);
|
||||
}
|
||||
|
||||
enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
|
||||
|
||||
/* helper macro for port */
|
||||
#define PORT_1(fn, pfx, sfx) fn(pfx, sfx)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user