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drm/i915: Read DRRS MSA timing delay from VBT

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VBT hsa a field for the MSA timing delay, which supposedly
should be used with DRRS. Extract the data from the VBT.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220310004802.16310-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Ville Syrjälä 2022-03-10 02:47:53 +02:00
parent 5f6a9bea16
commit b395c29add
2 changed files with 6 additions and 2 deletions
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3
drivers/gpu/drm/i915/display/intel_bios.c
View File

@ -888,6 +888,9 @@ parse_edp(struct drm_i915_private *i915, const struct bdb_header *bdb)
i915->vbt.edp.low_vswing = vswing == 0;
}
}
i915->vbt.edp.drrs_msa_timing_delay =
(edp->sdrrs_msa_timing_delay >> (panel_type * 2)) & 3;
}
static void

5
drivers/gpu/drm/i915/i915_drv.h
View File

@ -356,10 +356,11 @@ struct intel_vbt_data {
int lanes;
int preemphasis;
int vswing;
bool low_vswing;
bool initialized;
int bpp;
struct edp_power_seq pps;
u8 drrs_msa_timing_delay;
bool low_vswing;
bool initialized;
bool hobl;
} edp;