forked from Minki/linux
PCI: rcar: Try increasing PCIe link speed to 5 GT/s at boot
The PCIe link speed is initially set to 2.5 GT/s. Try to increase the link speed to 5 GT/s. Based on original patch by Grigory Kletsko <grigory.kletsko@cogentembedded.com>. [bhelgaas: remove "Trying speed up" message, remove unused SPCHG] Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
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@ -84,8 +84,18 @@
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#define IDSETR1 0x011004
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#define TLCTLR 0x011048
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#define MACSR 0x011054
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#define SPCHGFIN (1 << 4)
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#define SPCHGFAIL (1 << 6)
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#define SPCHGSUC (1 << 7)
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#define LINK_SPEED (0xf << 16)
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#define LINK_SPEED_2_5GTS (1 << 16)
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#define LINK_SPEED_5_0GTS (2 << 16)
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#define MACCTLR 0x011058
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#define SPEED_CHANGE (1 << 24)
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#define SCRAMBLE_DISABLE (1 << 27)
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#define MACS2R 0x011078
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#define MACCGSPSETR 0x011084
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#define SPCNGRSN (1 << 31)
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/* R-Car H1 PHY */
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#define H1_PCIEPHYADRR 0x04000c
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@ -385,11 +395,67 @@ static int rcar_pcie_setup(struct list_head *resource, struct rcar_pcie *pci)
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return 1;
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}
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static void rcar_pcie_force_speedup(struct rcar_pcie *pcie)
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{
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unsigned int timeout = 1000;
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u32 macsr;
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if ((rcar_pci_read_reg(pcie, MACS2R) & LINK_SPEED) != LINK_SPEED_5_0GTS)
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return;
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if (rcar_pci_read_reg(pcie, MACCTLR) & SPEED_CHANGE) {
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dev_err(pcie->dev, "Speed change already in progress\n");
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return;
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}
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macsr = rcar_pci_read_reg(pcie, MACSR);
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if ((macsr & LINK_SPEED) == LINK_SPEED_5_0GTS)
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goto done;
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/* Set target link speed to 5.0 GT/s */
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rcar_rmw32(pcie, EXPCAP(12), PCI_EXP_LNKSTA_CLS,
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PCI_EXP_LNKSTA_CLS_5_0GB);
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/* Set speed change reason as intentional factor */
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rcar_rmw32(pcie, MACCGSPSETR, SPCNGRSN, 0);
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/* Clear SPCHGFIN, SPCHGSUC, and SPCHGFAIL */
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if (macsr & (SPCHGFIN | SPCHGSUC | SPCHGFAIL))
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rcar_pci_write_reg(pcie, macsr, MACSR);
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/* Start link speed change */
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rcar_rmw32(pcie, MACCTLR, SPEED_CHANGE, SPEED_CHANGE);
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while (timeout--) {
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macsr = rcar_pci_read_reg(pcie, MACSR);
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if (macsr & SPCHGFIN) {
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/* Clear the interrupt bits */
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rcar_pci_write_reg(pcie, macsr, MACSR);
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if (macsr & SPCHGFAIL)
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dev_err(pcie->dev, "Speed change failed\n");
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goto done;
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}
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msleep(1);
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};
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dev_err(pcie->dev, "Speed change timed out\n");
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done:
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dev_info(pcie->dev, "Current link speed is %s GT/s\n",
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(macsr & LINK_SPEED) == LINK_SPEED_5_0GTS ? "5" : "2.5");
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}
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static int rcar_pcie_enable(struct rcar_pcie *pcie)
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{
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struct pci_bus *bus, *child;
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LIST_HEAD(res);
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/* Try setting 5 GT/s link speed */
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rcar_pcie_force_speedup(pcie);
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rcar_pcie_setup(&res, pcie);
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pci_add_flags(PCI_REASSIGN_ALL_RSRC | PCI_REASSIGN_ALL_BUS);
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