forked from Minki/linux
spmi: pmic-arb: remove the read/write access checks
The access mode checks for peripheral ownership for read/write permissions should not be required. Every peripheral enabled for this master is expected to have a read/write permissions. If there is any such invalid access due to wrong configuration in boot loader or device tree files, then it should be fixed in those locations. Hence, remove the access mode checks from the driver. Signed-off-by: Kiran Gunda <kgunda@codeaurora.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Kiran Gunda
Greg Kroah-Hartman
parent
b8d01b7fba
commit
b319b5922d
@ -128,7 +128,6 @@ struct apid_data {
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* @ee: the current Execution Environment
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* @min_apid: minimum APID (used for bounding IRQ search)
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* @max_apid: maximum APID
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* @max_periph: maximum number of PMIC peripherals supported by HW.
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* @mapping_table: in-memory copy of PPID -> APID mapping table.
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* @domain: irq domain object for PMIC IRQ domain
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* @spmic: SPMI controller object
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@ -148,7 +147,6 @@ struct spmi_pmic_arb {
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u8 ee;
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u16 min_apid;
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u16 max_apid;
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u16 max_periph;
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u32 *mapping_table;
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DECLARE_BITMAP(mapping_table_valid, PMIC_ARB_MAX_PERIPHS);
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struct irq_domain *domain;
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@ -164,7 +162,6 @@ struct spmi_pmic_arb {
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*
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* @ver_str: version string.
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* @ppid_to_apid: finds the apid for a given ppid.
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* @mode: access rights to specified pmic peripheral.
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* @non_data_cmd: on v1 issues an spmi non-data command.
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* on v2 no HW support, returns -EOPNOTSUPP.
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* @offset: on v1 offset of per-ee channel.
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@ -183,8 +180,6 @@ struct pmic_arb_ver_ops {
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const char *ver_str;
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int (*ppid_to_apid)(struct spmi_pmic_arb *pa, u8 sid, u16 addr,
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u16 *apid);
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int (*mode)(struct spmi_pmic_arb *dev, u8 sid, u16 addr,
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mode_t *mode);
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/* spmi commands (read_cmd, write_cmd, cmd) functionality */
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int (*offset)(struct spmi_pmic_arb *dev, u8 sid, u16 addr,
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u32 *offset);
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@ -340,23 +335,11 @@ static int pmic_arb_read_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid,
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u32 cmd;
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int rc;
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u32 offset;
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mode_t mode;
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rc = pa->ver_ops->offset(pa, sid, addr, &offset);
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if (rc)
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return rc;
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rc = pa->ver_ops->mode(pa, sid, addr, &mode);
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if (rc)
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return rc;
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if (!(mode & S_IRUSR)) {
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dev_err(&pa->spmic->dev,
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"error: impermissible read from peripheral sid:%d addr:0x%x\n",
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sid, addr);
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return -EPERM;
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}
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if (bc >= PMIC_ARB_MAX_TRANS_BYTES) {
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dev_err(&ctrl->dev,
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"pmic-arb supports 1..%d bytes per trans, but:%zu requested",
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@ -402,23 +385,11 @@ static int pmic_arb_write_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid,
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u32 cmd;
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int rc;
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u32 offset;
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mode_t mode;
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rc = pa->ver_ops->offset(pa, sid, addr, &offset);
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if (rc)
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return rc;
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rc = pa->ver_ops->mode(pa, sid, addr, &mode);
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if (rc)
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return rc;
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if (!(mode & S_IWUSR)) {
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dev_err(&pa->spmic->dev,
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"error: impermissible write to peripheral sid:%d addr:0x%x\n",
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sid, addr);
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return -EPERM;
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}
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if (bc >= PMIC_ARB_MAX_TRANS_BYTES) {
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dev_err(&ctrl->dev,
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"pmic-arb supports 1..%d bytes per trans, but:%zu requested",
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@ -785,13 +756,6 @@ pmic_arb_ppid_to_apid_v1(struct spmi_pmic_arb *pa, u8 sid, u16 addr, u16 *apid)
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return -ENODEV;
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}
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static int
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pmic_arb_mode_v1_v3(struct spmi_pmic_arb *pa, u8 sid, u16 addr, mode_t *mode)
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{
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*mode = S_IRUSR | S_IWUSR;
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return 0;
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}
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/* v1 offset per ee */
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static int
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pmic_arb_offset_v1(struct spmi_pmic_arb *pa, u8 sid, u16 addr, u32 *offset)
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@ -810,15 +774,15 @@ static u16 pmic_arb_find_apid(struct spmi_pmic_arb *pa, u16 ppid)
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* PMIC_ARB_REG_CHNL is a table in HW mapping channel to ppid.
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* ppid_to_apid is an in-memory invert of that table.
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*/
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for (apid = pa->last_apid; apid < pa->max_periph; apid++) {
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regval = readl_relaxed(pa->cnfg +
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SPMI_OWNERSHIP_TABLE_REG(apid));
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pa->apid_data[apid].owner = SPMI_OWNERSHIP_PERIPH2OWNER(regval);
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for (apid = pa->last_apid; ; apid++) {
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offset = PMIC_ARB_REG_CHNL(apid);
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if (offset >= pa->core_size)
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break;
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regval = readl_relaxed(pa->cnfg +
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SPMI_OWNERSHIP_TABLE_REG(apid));
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pa->apid_data[apid].owner = SPMI_OWNERSHIP_PERIPH2OWNER(regval);
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regval = readl_relaxed(pa->core + offset);
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if (!regval)
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continue;
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@ -853,24 +817,6 @@ pmic_arb_ppid_to_apid_v2(struct spmi_pmic_arb *pa, u8 sid, u16 addr, u16 *apid)
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return 0;
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}
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static int
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pmic_arb_mode_v2(struct spmi_pmic_arb *pa, u8 sid, u16 addr, mode_t *mode)
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{
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u16 apid;
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int rc;
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rc = pmic_arb_ppid_to_apid_v2(pa, sid, addr, &apid);
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if (rc < 0)
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return rc;
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*mode = 0;
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*mode |= S_IRUSR;
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if (pa->ee == pa->apid_data[apid].owner)
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*mode |= S_IWUSR;
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return 0;
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}
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/* v2 offset per ppid and per ee */
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static int
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pmic_arb_offset_v2(struct spmi_pmic_arb *pa, u8 sid, u16 addr, u32 *offset)
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@ -944,7 +890,6 @@ static u32 pmic_arb_irq_clear_v2(u16 n)
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static const struct pmic_arb_ver_ops pmic_arb_v1 = {
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.ver_str = "v1",
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.ppid_to_apid = pmic_arb_ppid_to_apid_v1,
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.mode = pmic_arb_mode_v1_v3,
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.non_data_cmd = pmic_arb_non_data_cmd_v1,
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.offset = pmic_arb_offset_v1,
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.fmt_cmd = pmic_arb_fmt_cmd_v1,
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@ -957,7 +902,6 @@ static const struct pmic_arb_ver_ops pmic_arb_v1 = {
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static const struct pmic_arb_ver_ops pmic_arb_v2 = {
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.ver_str = "v2",
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.ppid_to_apid = pmic_arb_ppid_to_apid_v2,
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.mode = pmic_arb_mode_v2,
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.non_data_cmd = pmic_arb_non_data_cmd_v2,
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.offset = pmic_arb_offset_v2,
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.fmt_cmd = pmic_arb_fmt_cmd_v2,
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@ -970,7 +914,6 @@ static const struct pmic_arb_ver_ops pmic_arb_v2 = {
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static const struct pmic_arb_ver_ops pmic_arb_v3 = {
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.ver_str = "v3",
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.ppid_to_apid = pmic_arb_ppid_to_apid_v2,
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.mode = pmic_arb_mode_v1_v3,
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.non_data_cmd = pmic_arb_non_data_cmd_v2,
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.offset = pmic_arb_offset_v2,
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.fmt_cmd = pmic_arb_fmt_cmd_v2,
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@ -1003,11 +946,6 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev)
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "core");
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pa->core_size = resource_size(res);
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if (pa->core_size <= 0x800) {
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dev_err(&pdev->dev, "core_size is smaller than 0x800. Failing Probe\n");
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err = -EINVAL;
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goto err_put_ctrl;
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}
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core = devm_ioremap_resource(&ctrl->dev, res);
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if (IS_ERR(core)) {
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@ -1036,9 +974,6 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev)
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else
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pa->ver_ops = &pmic_arb_v3;
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/* the apid to ppid table starts at PMIC_ARB_REG_CHNL(0) */
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pa->max_periph = (pa->core_size - PMIC_ARB_REG_CHNL(0)) / 4;
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
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"obsrvr");
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pa->rd_base = devm_ioremap_resource(&ctrl->dev, res);
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