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drm/amdgpu: enable BUS master after pci reset

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Re-enable bus mastering after GPU reset. We disable it
at the top of these functions, so balance them by
re-enabling it.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
eviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Chunming Zhou
2016-06-06 13:50:18 +08:00
committed by Alex Deucher
parent 89a3182737
commit b314f9a997
2 changed files with 6 additions and 1 deletions
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2
drivers/gpu/drm/amd/amdgpu/cik.c
View File

@@ -1179,6 +1179,8 @@ static int cik_gpu_pci_config_reset(struct amdgpu_device *adev)
/* wait for asic to come out of reset */ /* wait for asic to come out of reset */
for (i = 0; i < adev->usec_timeout; i++) { for (i = 0; i < adev->usec_timeout; i++) {
if (RREG32(mmCONFIG_MEMSIZE) != 0xffffffff) { if (RREG32(mmCONFIG_MEMSIZE) != 0xffffffff) {
/* enable BM */
pci_set_master(adev->pdev);
r = 0; r = 0;
break; break;
} }

5
drivers/gpu/drm/amd/amdgpu/vi.c
View File

@@ -612,8 +612,11 @@ static int vi_gpu_pci_config_reset(struct amdgpu_device *adev)
/* wait for asic to come out of reset */ /* wait for asic to come out of reset */
for (i = 0; i < adev->usec_timeout; i++) { for (i = 0; i < adev->usec_timeout; i++) {
if (RREG32(mmCONFIG_MEMSIZE) != 0xffffffff) if (RREG32(mmCONFIG_MEMSIZE) != 0xffffffff) {
/* enable BM */
pci_set_master(adev->pdev);
return 0; return 0;
}
udelay(1); udelay(1);
} }
return -EINVAL; return -EINVAL;