forked from Minki/linux
mfd: db8500: Connect ARMSS clk to ARM OPP
ARMSS clk directly maps it's frequency towards the cpufreq table. To be able to update the ARMSS clk rate, a new set_rate function for the ARMSS clk is added, which also will trigger a corresponding ARM OPP request. Additionally an ARMSS clk round_rate function is added to fetch valid cpufreq frequencies. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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@ -421,9 +421,6 @@ static struct {
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static atomic_t ac_wake_req_state = ATOMIC_INIT(0);
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/* Functions definition */
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static void compute_armss_rate(void);
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/* Spinlocks */
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static DEFINE_SPINLOCK(prcmu_lock);
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static DEFINE_SPINLOCK(clkout_lock);
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@ -1020,7 +1017,6 @@ int db8500_prcmu_set_arm_opp(u8 opp)
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(mb1_transfer.ack.arm_opp != opp))
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r = -EIO;
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compute_armss_rate();
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mutex_unlock(&mb1_transfer.lock);
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return r;
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@ -1670,13 +1666,8 @@ static unsigned long clock_rate(u8 clock)
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else
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return 0;
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}
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static unsigned long latest_armss_rate;
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static unsigned long armss_rate(void)
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{
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return latest_armss_rate;
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}
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static void compute_armss_rate(void)
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static unsigned long armss_rate(void)
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{
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u32 r;
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unsigned long rate;
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@ -1701,7 +1692,7 @@ static void compute_armss_rate(void)
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rate = pll_rate(PRCM_PLLARM_FREQ, ROOT_CLOCK_RATE, PLL_DIV);
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}
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latest_armss_rate = rate;
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return rate;
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}
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static unsigned long dsiclk_rate(u8 n)
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@ -1821,6 +1812,35 @@ static long round_clock_rate(u8 clock, unsigned long rate)
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return rounded_rate;
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}
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/* CPU FREQ table, may be changed due to if MAX_OPP is supported. */
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static struct cpufreq_frequency_table db8500_cpufreq_table[] = {
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{ .frequency = 200000, .index = ARM_EXTCLK,},
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{ .frequency = 400000, .index = ARM_50_OPP,},
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{ .frequency = 800000, .index = ARM_100_OPP,},
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{ .frequency = CPUFREQ_TABLE_END,}, /* To be used for MAX_OPP. */
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{ .frequency = CPUFREQ_TABLE_END,},
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};
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static long round_armss_rate(unsigned long rate)
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{
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long freq = 0;
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int i = 0;
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/* cpufreq table frequencies is in KHz. */
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rate = rate / 1000;
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/* Find the corresponding arm opp from the cpufreq table. */
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while (db8500_cpufreq_table[i].frequency != CPUFREQ_TABLE_END) {
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freq = db8500_cpufreq_table[i].frequency;
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if (freq == rate)
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break;
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i++;
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}
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/* Return the last valid value, even if a match was not found. */
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return freq * 1000;
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}
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#define MIN_PLL_VCO_RATE 600000000ULL
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#define MAX_PLL_VCO_RATE 1680640000ULL
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@ -1892,6 +1912,8 @@ long prcmu_round_clock_rate(u8 clock, unsigned long rate)
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{
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if (clock < PRCMU_NUM_REG_CLOCKS)
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return round_clock_rate(clock, rate);
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else if (clock == PRCMU_ARMSS)
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return round_armss_rate(rate);
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else if (clock == PRCMU_PLLDSI)
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return round_plldsi_rate(rate);
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else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK))
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@ -1951,6 +1973,27 @@ static void set_clock_rate(u8 clock, unsigned long rate)
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spin_unlock_irqrestore(&clk_mgt_lock, flags);
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}
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static int set_armss_rate(unsigned long rate)
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{
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int i = 0;
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/* cpufreq table frequencies is in KHz. */
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rate = rate / 1000;
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/* Find the corresponding arm opp from the cpufreq table. */
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while (db8500_cpufreq_table[i].frequency != CPUFREQ_TABLE_END) {
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if (db8500_cpufreq_table[i].frequency == rate)
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break;
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i++;
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}
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if (db8500_cpufreq_table[i].frequency != rate)
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return -EINVAL;
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/* Set the new arm opp. */
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return db8500_prcmu_set_arm_opp(db8500_cpufreq_table[i].index);
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}
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static int set_plldsi_rate(unsigned long rate)
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{
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unsigned long src_rate;
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@ -2031,6 +2074,8 @@ int prcmu_set_clock_rate(u8 clock, unsigned long rate)
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{
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if (clock < PRCMU_NUM_REG_CLOCKS)
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set_clock_rate(clock, rate);
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else if (clock == PRCMU_ARMSS)
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return set_armss_rate(rate);
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else if (clock == PRCMU_PLLDSI)
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return set_plldsi_rate(rate);
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else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK))
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@ -2755,8 +2800,6 @@ void __init db8500_prcmu_early_init(void)
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init_completion(&mb5_transfer.work);
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INIT_WORK(&mb0_transfer.mask_work, prcmu_mask_work);
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compute_armss_rate();
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}
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static void __init init_prcm_registers(void)
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@ -3003,15 +3046,6 @@ static struct regulator_init_data db8500_regulators[DB8500_NUM_REGULATORS] = {
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},
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};
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/* CPU FREQ table, may be changed due to if MAX_OPP is supported. */
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static struct cpufreq_frequency_table db8500_cpufreq_table[] = {
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{ .frequency = 200000, .index = ARM_EXTCLK,},
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{ .frequency = 400000, .index = ARM_50_OPP,},
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{ .frequency = 800000, .index = ARM_100_OPP,},
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{ .frequency = CPUFREQ_TABLE_END,}, /* To be used for MAX_OPP. */
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{ .frequency = CPUFREQ_TABLE_END,},
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};
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static struct resource ab8500_resources[] = {
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[0] = {
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.start = IRQ_DB8500_AB8500,
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