forked from Minki/linux
drm/amd/display: add pipe locking before front end programing
Add pipe locking/unlocking before we program the front end Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2866,16 +2866,19 @@ static void dce110_apply_ctx_for_surface(
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int num_planes,
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struct dc_state *context)
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{
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int i, be_idx;
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int i;
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if (num_planes == 0)
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return;
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be_idx = -1;
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for (i = 0; i < dc->res_pool->pipe_count; i++) {
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if (stream == context->res_ctx.pipe_ctx[i].stream) {
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be_idx = context->res_ctx.pipe_ctx[i].stream_res.tg->inst;
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break;
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struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
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struct pipe_ctx *old_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i];
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if (stream == pipe_ctx->stream) {
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if (!pipe_ctx->top_pipe &&
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(pipe_ctx->plane_state || old_pipe_ctx->plane_state))
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dc->hwss.pipe_control_lock(dc, pipe_ctx, true);
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}
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}
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@ -2895,9 +2898,22 @@ static void dce110_apply_ctx_for_surface(
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context->stream_count);
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dce110_program_front_end_for_pipe(dc, pipe_ctx);
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dc->hwss.update_plane_addr(dc, pipe_ctx);
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program_surface_visibility(dc, pipe_ctx);
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}
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for (i = 0; i < dc->res_pool->pipe_count; i++) {
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struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
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struct pipe_ctx *old_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i];
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if ((stream == pipe_ctx->stream) &&
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(!pipe_ctx->top_pipe) &&
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(pipe_ctx->plane_state || old_pipe_ctx->plane_state))
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dc->hwss.pipe_control_lock(dc, pipe_ctx, false);
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}
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}
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static void dce110_power_down_fe(struct dc *dc, int fe_idx)
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