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mpt3sas: Added support for high port count HBA variants.

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Updated hardware description headers with MPI v2.6 and
mpt3sas_pci_table[] with vendor_ids, device_ids of Cutlass and Intruder
HBA which have support for 4 ports.

Signed-off-by: Suganath prabu Subramani <suganath-prabu.subramani@avagotech.com>
Signed-off-by: Chaitra P B <chaitra.basappa@avagotech.com>
Reviewed-by: Tomas Henzl <thenzl@redhat.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Suganath prabu Subramani 2016-01-28 12:06:58 +05:30 committed by Martin K. Petersen
parent 8038e6456a
commit b130b0d56f
11 changed files with 423 additions and 59 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

78
drivers/scsi/mpt3sas/mpi/mpi2.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2000-2014 LSI Corporation.
* Copyright 2000-2015 Avago Technologies. All rights reserved.
*
*
* Name: mpi2.h
@ -8,7 +8,7 @@
* scatter/gather formats.
* Creation Date: June 21, 2006
*
* mpi2.h Version: 02.00.35
* mpi2.h Version: 02.00.37
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
@ -92,6 +92,12 @@
* 12-05-13 02.00.33 Bumped MPI2_HEADER_VERSION_UNIT.
* 01-08-14 02.00.34 Bumped MPI2_HEADER_VERSION_UNIT
* 06-13-14 02.00.35 Bumped MPI2_HEADER_VERSION_UNIT.
* 11-18-14 02.00.36 Updated copyright information.
* Bumped MPI2_HEADER_VERSION_UNIT.
* 03-xx-15 02.00.37 Bumped MPI2_HEADER_VERSION_UNIT.
* Added Scratchpad registers to
* MPI2_SYSTEM_INTERFACE_REGS.
* Added MPI2_DIAG_SBR_RELOAD.
* --------------------------------------------------------------------------
*/
@ -124,6 +130,12 @@
MPI25_VERSION_MINOR)
#define MPI2_VERSION_02_05 (0x0205)
/*minor version for MPI v2.6 compatible products */
#define MPI26_VERSION_MINOR (0x06)
#define MPI26_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \
MPI26_VERSION_MINOR)
#define MPI2_VERSION_02_06 (0x0206)
/*Unit and Dev versioning for this MPI header set */
#define MPI2_HEADER_VERSION_UNIT (0x23)
#define MPI2_HEADER_VERSION_DEV (0x00)
@ -179,10 +191,12 @@ typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS {
U32 HCBSize; /*0x74 */
U32 HCBAddressLow; /*0x78 */
U32 HCBAddressHigh; /*0x7C */
U32 Reserved6[16]; /*0x80 */
U32 Reserved6[12]; /*0x80 */
U32 Scratchpad[4]; /*0xB0 */
U32 RequestDescriptorPostLow; /*0xC0 */
U32 RequestDescriptorPostHigh; /*0xC4 */
U32 Reserved7[14]; /*0xC8 */
U32 AtomicRequestDescriptorPost;/*0xC8 */
U32 Reserved7[13]; /*0xCC */
} MPI2_SYSTEM_INTERFACE_REGS,
*PTR_MPI2_SYSTEM_INTERFACE_REGS,
Mpi2SystemInterfaceRegs_t,
@ -224,6 +238,8 @@ typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS {
*/
#define MPI2_HOST_DIAGNOSTIC_OFFSET (0x00000008)
#define MPI2_DIAG_SBR_RELOAD (0x00002000)
#define MPI2_DIAG_BOOT_DEVICE_SELECT_MASK (0x00001800)
#define MPI2_DIAG_BOOT_DEVICE_SELECT_DEFAULT (0x00000000)
#define MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW (0x00000800)
@ -298,10 +314,19 @@ typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS {
#define MPI2_HCB_ADDRESS_HIGH_OFFSET (0x0000007C)
/*
*Offsets for the Request Queue
*Offsets for the Scratchpad registers
*/
#define MPI26_SCRATCHPAD0_OFFSET (0x000000B0)
#define MPI26_SCRATCHPAD1_OFFSET (0x000000B4)
#define MPI26_SCRATCHPAD2_OFFSET (0x000000B8)
#define MPI26_SCRATCHPAD3_OFFSET (0x000000BC)
/*
*Offsets for the Request Descriptor Post Queue
*/
#define MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET (0x000000C0)
#define MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET (0x000000C4)
#define MPI26_ATOMIC_REQUEST_DESCRIPTOR_POST_OFFSET (0x000000C8)
/*Hard Reset delay timings */
#define MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC (50000)
@ -329,7 +354,8 @@ typedef struct _MPI2_DEFAULT_REQUEST_DESCRIPTOR {
*pMpi2DefaultRequestDescriptor_t;
/*defines for the RequestFlags field */
#define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK (0x0E)
#define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK (0x1E)
#define MPI2_REQ_DESCRIPT_FLAGS_TYPE_RSHIFT (1)
#define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO (0x00)
#define MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET (0x02)
#define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY (0x06)
@ -337,7 +363,7 @@ typedef struct _MPI2_DEFAULT_REQUEST_DESCRIPTOR {
#define MPI2_REQ_DESCRIPT_FLAGS_RAID_ACCELERATOR (0x0A)
#define MPI25_REQ_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO (0x0C)
#define MPI2_REQ_DESCRIPT_FLAGS_IOC_FIFO_MARKER (0x01)
#define MPI2_REQ_DESCRIPT_FLAGS_IOC_FIFO_MARKER (0x01)
/*High Priority Request Descriptor */
typedef struct _MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR {
@ -408,6 +434,33 @@ typedef union _MPI2_REQUEST_DESCRIPTOR_UNION {
Mpi2RequestDescriptorUnion_t,
*pMpi2RequestDescriptorUnion_t;
/*Atomic Request Descriptors */
/*
* All Atomic Request Descriptors have the same format, so the following
* structure is used for all Atomic Request Descriptors:
* Atomic Default Request Descriptor
* Atomic High Priority Request Descriptor
* Atomic SCSI IO Request Descriptor
* Atomic SCSI Target Request Descriptor
* Atomic RAID Accelerator Request Descriptor
* Atomic Fast Path SCSI IO Request Descriptor
*/
/*Atomic Request Descriptor */
typedef struct _MPI26_ATOMIC_REQUEST_DESCRIPTOR {
U8 RequestFlags; /* 0x00 */
U8 MSIxIndex; /* 0x01 */
U16 SMID; /* 0x02 */
} MPI26_ATOMIC_REQUEST_DESCRIPTOR,
*PTR_MPI26_ATOMIC_REQUEST_DESCRIPTOR,
Mpi26AtomicRequestDescriptor_t,
*pMpi26AtomicRequestDescriptor_t;
/*for the RequestFlags field, use the same
*defines as MPI2_DEFAULT_REQUEST_DESCRIPTOR
*/
/*Reply Descriptors */
/*Default Reply Descriptor */
@ -548,6 +601,7 @@ typedef union _MPI2_REPLY_DESCRIPTORS_UNION {
#define MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR (0x18)
#define MPI2_FUNCTION_SMP_PASSTHROUGH (0x1A)
#define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B)
#define MPI2_FUNCTION_IO_UNIT_CONTROL (0x1B)
#define MPI2_FUNCTION_SATA_PASSTHROUGH (0x1C)
#define MPI2_FUNCTION_DIAG_BUFFER_POST (0x1D)
#define MPI2_FUNCTION_DIAG_RELEASE (0x1E)
@ -587,6 +641,7 @@ typedef union _MPI2_REPLY_DESCRIPTORS_UNION {
#define MPI2_IOCSTATUS_INVALID_FIELD (0x0007)
#define MPI2_IOCSTATUS_INVALID_STATE (0x0008)
#define MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED (0x0009)
#define MPI2_IOCSTATUS_INSUFFICIENT_POWER (0x000A)
/****************************************************************************
* Config IOCStatus values
@ -1045,7 +1100,7 @@ typedef union _MPI2_IEEE_SGE_CHAIN_UNION {
Mpi2IeeeSgeChainUnion_t,
*pMpi2IeeeSgeChainUnion_t;
/*MPI25_IEEE_SGE_CHAIN64 is for MPI v2.5 products only */
/*MPI25_IEEE_SGE_CHAIN64 is for MPI v2.5 and later */
typedef struct _MPI25_IEEE_SGE_CHAIN64 {
U64 Address;
U32 Length;
@ -1098,6 +1153,11 @@ typedef union _MPI25_SGE_IO_UNION {
#define MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT (0x00)
#define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT (0x80)
/*Next Segment Format */
#define MPI26_IEEE_SGE_FLAGS_NSF_MASK (0x1C)
#define MPI26_IEEE_SGE_FLAGS_NSF_MPI_IEEE (0x00)
/*Data Location Address Space */
#define MPI2_IEEE_SGE_FLAGS_ADDR_MASK (0x03)
@ -1108,6 +1168,7 @@ typedef union _MPI25_SGE_IO_UNION {
#define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBPCI_ADDR (0x03)
#define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR \
(MPI2_IEEE_SGE_FLAGS_SYSTEMPLBPCI_ADDR)
#define MPI26_IEEE_SGE_FLAGS_IOCCTL_ADDR (0x02)
/****************************************************************************
* IEEE SGE operation Macros
@ -1166,6 +1227,7 @@ typedef union _MPI2_SGE_IO_UNION {
#define MPI2_SGLFLAGS_SYSTEM_ADDRESS_SPACE (0x00)
#define MPI2_SGLFLAGS_IOCDDR_ADDRESS_SPACE (0x04)
#define MPI2_SGLFLAGS_IOCPLB_ADDRESS_SPACE (0x08)
#define MPI26_SGLFLAGS_IOCPLB_ADDRESS_SPACE (0x08)
#define MPI2_SGLFLAGS_IOCPLBNTA_ADDRESS_SPACE (0x0C)
/*values for SGL Type subfield */
#define MPI2_SGLFLAGS_SGL_TYPE_MASK (0x03)

124
drivers/scsi/mpt3sas/mpi/mpi2_cnfg.h
View File

@ -1,12 +1,12 @@
/*
* Copyright (c) 2000-2014 LSI Corporation.
* Copyright 2000-2015 Avago Technologies. All rights reserved.
*
*
* Name: mpi2_cnfg.h
* Title: MPI Configuration messages and pages
* Creation Date: November 10, 2006
*
* mpi2_cnfg.h Version: 02.00.29
* mpi2_cnfg.h Version: 02.00.31
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
@ -178,7 +178,12 @@
* 01-08-14 02.00.28 Added more defines for the BiosOptions field of
* MPI2_CONFIG_PAGE_BIOS_1.
* 06-13-14 02.00.29 Added SSUTimeout field to MPI2_CONFIG_PAGE_BIOS_1, and
* more defines for the BiosOptions field..
* more defines for the BiosOptions field.
* 11-18-14 02.00.30 Updated copyright information.
* Added MPI2_BIOSPAGE1_OPTIONS_ADVANCED_CONFIG.
* Added AdapterOrderAux fields to BIOS Page 3.
* 03-xx-15 02.00.31 Updated for MPI v2.6.
* Added new SAS Phy Event codes
* --------------------------------------------------------------------------
*/
@ -355,7 +360,6 @@ typedef union _MPI2_CONFIG_EXT_PAGE_HEADER_UNION {
#define MPI2_ETHERNET_PGAD_IF_NUMBER_MASK (0x000000FF)
/****************************************************************************
* Configuration messages
****************************************************************************/
@ -457,8 +461,17 @@ typedef struct _MPI2_CONFIG_REPLY {
#define MPI25_MFGPAGE_DEVID_SAS3108_5 (0x0094)
#define MPI25_MFGPAGE_DEVID_SAS3108_6 (0x0095)
/* MPI v2.6 SAS Products */
#define MPI26_MFGPAGE_DEVID_SAS3216 (0x00C9)
#define MPI26_MFGPAGE_DEVID_SAS3224 (0x00C4)
#define MPI26_MFGPAGE_DEVID_SAS3316_1 (0x00C5)
#define MPI26_MFGPAGE_DEVID_SAS3316_2 (0x00C6)
#define MPI26_MFGPAGE_DEVID_SAS3316_3 (0x00C7)
#define MPI26_MFGPAGE_DEVID_SAS3316_4 (0x00C8)
#define MPI26_MFGPAGE_DEVID_SAS3324_1 (0x00C0)
#define MPI26_MFGPAGE_DEVID_SAS3324_2 (0x00C1)
#define MPI26_MFGPAGE_DEVID_SAS3324_3 (0x00C2)
#define MPI26_MFGPAGE_DEVID_SAS3324_4 (0x00C3)
/*Manufacturing Page 0 */
@ -941,8 +954,8 @@ typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_7 {
U8
BoardTemperatureUnits; /*0x16 */
U8 Reserved3; /*0x17 */
U32 Reserved4; /* 0x18 */
U32 Reserved5; /* 0x1C */
U32 BoardPowerRequirement; /*0x18 */
U32 PCISlotPowerAllocation; /*0x1C */
U32 Reserved6; /* 0x20 */
U32 Reserved7; /* 0x24 */
} MPI2_CONFIG_PAGE_IO_UNIT_7,
@ -1151,6 +1164,62 @@ typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_10 {
#define MPI2_IOUNITPAGE10_PAGEVERSION (0x01)
/* IO Unit Page 11 (for MPI v2.6 and later) */
typedef struct _MPI26_IOUNIT11_SPINUP_GROUP {
U8 MaxTargetSpinup; /* 0x00 */
U8 SpinupDelay; /* 0x01 */
U8 SpinupFlags; /* 0x02 */
U8 Reserved1; /* 0x03 */
} MPI26_IOUNIT11_SPINUP_GROUP,
*PTR_MPI26_IOUNIT11_SPINUP_GROUP,
Mpi26IOUnit11SpinupGroup_t,
*pMpi26IOUnit11SpinupGroup_t;
/* defines for IO Unit Page 11 SpinupFlags */
#define MPI26_IOUNITPAGE11_SPINUP_DISABLE_FLAG (0x01)
/*
* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
* four and check the value returned for NumPhys at runtime.
*/
#ifndef MPI26_IOUNITPAGE11_PHY_MAX
#define MPI26_IOUNITPAGE11_PHY_MAX (4)
#endif
typedef struct _MPI26_CONFIG_PAGE_IO_UNIT_11 {
MPI2_CONFIG_PAGE_HEADER Header; /*0x00 */
U32 Reserved1; /*0x04 */
MPI26_IOUNIT11_SPINUP_GROUP SpinupGroupParameters[4]; /*0x08 */
U32 Reserved2; /*0x18 */
U32 Reserved3; /*0x1C */
U32 Reserved4; /*0x20 */
U8 BootDeviceWaitTime; /*0x24 */
U8 Reserved5; /*0x25 */
U16 Reserved6; /*0x26 */
U8 NumPhys; /*0x28 */
U8 PEInitialSpinupDelay; /*0x29 */
U8 PEReplyDelay; /*0x2A */
U8 Flags; /*0x2B */
U8 PHY[MPI26_IOUNITPAGE11_PHY_MAX];/*0x2C */
} MPI26_CONFIG_PAGE_IO_UNIT_11,
*PTR_MPI26_CONFIG_PAGE_IO_UNIT_11,
Mpi26IOUnitPage11_t,
*pMpi26IOUnitPage11_t;
#define MPI26_IOUNITPAGE11_PAGEVERSION (0x00)
/* defines for Flags field */
#define MPI26_IOUNITPAGE11_FLAGS_AUTO_PORTENABLE (0x01)
/* defines for PHY field */
#define MPI26_IOUNITPAGE11_PHY_SPINUP_GROUP_MASK (0x03)
/****************************************************************************
* IOC Config Pages
@ -1343,6 +1412,9 @@ typedef struct _MPI2_CONFIG_PAGE_BIOS_1 {
#define MPI2_BIOSPAGE1_PAGEVERSION (0x07)
/*values for BIOS Page 1 BiosOptions field */
#define MPI2_BIOSPAGE1_OPTIONS_ADVANCED_CONFIG (0x00004000)
#define MPI2_BIOSPAGE1_OPTIONS_PNS_MASK (0x00003800)
#define MPI2_BIOSPAGE1_OPTIONS_PNS_MASK (0x00003800)
#define MPI2_BIOSPAGE1_OPTIONS_PNS_PBDHL (0x00000000)
#define MPI2_BIOSPAGE1_OPTIONS_PNS_ENCSLOSURE (0x00000800)
@ -1492,6 +1564,8 @@ typedef struct _MPI2_CONFIG_PAGE_BIOS_2 {
/*BIOS Page 3 */
#define MPI2_BIOSPAGE3_NUM_ADAPTER (4)
typedef struct _MPI2_ADAPTER_INFO {
U8 PciBusNumber; /*0x00 */
U8 PciDeviceAndFunctionNumber; /*0x01 */
@ -1502,17 +1576,26 @@ typedef struct _MPI2_ADAPTER_INFO {
#define MPI2_ADAPTER_INFO_FLAGS_EMBEDDED (0x0001)
#define MPI2_ADAPTER_INFO_FLAGS_INIT_STATUS (0x0002)
typedef struct _MPI2_ADAPTER_ORDER_AUX {
U64 WWID; /* 0x00 */
U32 Reserved1; /* 0x08 */
U32 Reserved2; /* 0x0C */
} MPI2_ADAPTER_ORDER_AUX, *PTR_MPI2_ADAPTER_ORDER_AUX,
Mpi2AdapterOrderAux_t, *pMpi2AdapterOrderAux_t;
typedef struct _MPI2_CONFIG_PAGE_BIOS_3 {
MPI2_CONFIG_PAGE_HEADER Header; /*0x00 */
U32 GlobalFlags; /*0x04 */
U32 BiosVersion; /*0x08 */
MPI2_ADAPTER_INFO AdapterOrder[4]; /*0x0C */
MPI2_ADAPTER_INFO AdapterOrder[MPI2_BIOSPAGE3_NUM_ADAPTER];
U32 Reserved1; /*0x1C */
MPI2_ADAPTER_ORDER_AUX AdapterOrderAux[MPI2_BIOSPAGE3_NUM_ADAPTER];
} MPI2_CONFIG_PAGE_BIOS_3,
*PTR_MPI2_CONFIG_PAGE_BIOS_3,
Mpi2BiosPage3_t, *pMpi2BiosPage3_t;
#define MPI2_BIOSPAGE3_PAGEVERSION (0x00)
#define MPI2_BIOSPAGE3_PAGEVERSION (0x01)
/*values for BIOS Page 3 GlobalFlags */
#define MPI2_BIOSPAGE3_FLAGS_PAUSE_ON_ERROR (0x00000002)
@ -2006,6 +2089,8 @@ typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_0 {
#define MPI2_SASIOUNIT0_PORTFLAGS_AUTO_PORT_CONFIG (0x01)
/*values for SAS IO Unit Page 0 PhyFlags */
#define MPI2_SASIOUNIT0_PHYFLAGS_INIT_PERSIST_CONNECT (0x40)
#define MPI2_SASIOUNIT0_PHYFLAGS_TARG_PERSIST_CONNECT (0x20)
#define MPI2_SASIOUNIT0_PHYFLAGS_ZONING_ENABLED (0x10)
#define MPI2_SASIOUNIT0_PHYFLAGS_PHY_DISABLED (0x08)
@ -2108,6 +2193,7 @@ typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_1 {
#define MPI2_SASIOUNIT1_CONTROL_CLEAR_AFFILIATION (0x0001)
/*values for SAS IO Unit Page 1 AdditionalControlFlags */
#define MPI2_SASIOUNIT1_ACONTROL_DA_PERSIST_CONNECT (0x0100)
#define MPI2_SASIOUNIT1_ACONTROL_MULTI_PORT_DOMAIN_ILLEGAL (0x0080)
#define MPI2_SASIOUNIT1_ACONTROL_SATA_ASYNCHROUNOUS_NOTIFICATION (0x0040)
#define MPI2_SASIOUNIT1_ACONTROL_INVALID_TOPOLOGY_CORRECTION (0x0020)
@ -2125,6 +2211,8 @@ typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_1 {
#define MPI2_SASIOUNIT1_PORT_FLAGS_AUTO_PORT_CONFIG (0x01)
/*values for SAS IO Unit Page 1 PhyFlags */
#define MPI2_SASIOUNIT1_PHYFLAGS_INIT_PERSIST_CONNECT (0x40)
#define MPI2_SASIOUNIT1_PHYFLAGS_TARG_PERSIST_CONNECT (0x20)
#define MPI2_SASIOUNIT1_PHYFLAGS_ZONING_ENABLE (0x10)
#define MPI2_SASIOUNIT1_PHYFLAGS_PHY_DISABLE (0x08)
@ -2144,7 +2232,7 @@ typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_1 {
*SAS IO Unit Page 1 ControllerPhyDeviceInfo values */
/*SAS IO Unit Page 4 */
/*SAS IO Unit Page 4 (for MPI v2.5 and earlier) */
typedef struct _MPI2_SAS_IOUNIT4_SPINUP_GROUP {
U8 MaxTargetSpinup; /*0x00 */
@ -2715,6 +2803,7 @@ typedef struct _MPI2_CONFIG_PAGE_SAS_DEV_0 {
#define MPI2_SAS_DEVICE0_FLAGS_SATA_NCQ_SUPPORTED (0x0020)
#define MPI2_SAS_DEVICE0_FLAGS_SATA_FUA_SUPPORTED (0x0010)
#define MPI2_SAS_DEVICE0_FLAGS_PORT_SELECTOR_ATTACH (0x0008)
#define MPI2_SAS_DEVICE0_FLAGS_PERSIST_CAPABLE (0x0004)
#define MPI2_SAS_DEVICE0_FLAGS_ENCL_LEVEL_VALID (0x0002)
#define MPI2_SAS_DEVICE0_FLAGS_DEVICE_PRESENT (0x0001)
@ -2922,6 +3011,19 @@ typedef struct _MPI2_SASPHY3_PHY_EVENT_CONFIG {
#define MPI2_SASPHY3_EVENT_CODE_MISALIGNED_MUX_PRIMITIVE (0xD1)
#define MPI2_SASPHY3_EVENT_CODE_RX_AIP (0xD2)
/*Following codes are product specific and in MPI v2.6 and later */
#define MPI2_SASPHY3_EVENT_CODE_LCARB_WAIT_TIME (0xD3)
#define MPI2_SASPHY3_EVENT_CODE_RCVD_CONN_RESP_WAIT_TIME (0xD4)
#define MPI2_SASPHY3_EVENT_CODE_LCCONN_TIME (0xD5)
#define MPI2_SASPHY3_EVENT_CODE_SSP_TX_START_TRANSMIT (0xD6)
#define MPI2_SASPHY3_EVENT_CODE_SATA_TX_START (0xD7)
#define MPI2_SASPHY3_EVENT_CODE_SMP_TX_START_TRANSMT (0xD8)
#define MPI2_SASPHY3_EVENT_CODE_TX_SMP_BREAK_CONN (0xD9)
#define MPI2_SASPHY3_EVENT_CODE_SSP_RX_START_RECEIVE (0xDA)
#define MPI2_SASPHY3_EVENT_CODE_SATA_RX_START_RECEIVE (0xDB)
#define MPI2_SASPHY3_EVENT_CODE_SMP_RX_START_RECEIVE (0xDC)
/*values for the CounterType field */
#define MPI2_SASPHY3_COUNTER_TYPE_WRAPPING (0x00)
#define MPI2_SASPHY3_COUNTER_TYPE_SATURATING (0x01)

21
drivers/scsi/mpt3sas/mpi/mpi2_init.h
View File

@ -1,12 +1,12 @@
/*
* Copyright (c) 2000-2014 LSI Corporation.
* Copyright 2000-2015 Avago Technologies. All rights reserved.
*
*
* Name: mpi2_init.h
* Title: MPI SCSI initiator mode messages and structures
* Creation Date: June 23, 2006
*
* mpi2_init.h Version: 02.00.15
* mpi2_init.h Version: 02.00.17
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
@ -46,6 +46,10 @@
* 07-10-12 02.00.14 Added MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION.
* 04-09-13 02.00.15 Added SCSIStatusQualifier field to MPI2_SCSI_IO_REPLY,
* replacing the Reserved4 field.
* 11-18-14 02.00.16 Updated copyright information.
* 03-xx-15 02.00.17 Updated for MPI v2.6.
* Added MPI2_SEP_REQ_SLOTSTATUS_DEV_OFF and
* MPI2_SEP_REPLY_SLOTSTATUS_DEV_OFF.
* --------------------------------------------------------------------------
*/
@ -128,6 +132,7 @@ typedef struct _MPI2_SCSI_IO_REQUEST {
#define MPI2_SCSIIO_MSGFLAGS_IOCDDR_SENSE_ADDR (0x04)
#define MPI2_SCSIIO_MSGFLAGS_IOCPLB_SENSE_ADDR (0x08)
#define MPI2_SCSIIO_MSGFLAGS_IOCPLBNTA_SENSE_ADDR (0x0C)
#define MPI26_SCSIIO_MSGFLAGS_IOCCTL_SENSE_ADDR (0x08)
/*SCSI IO SGLFlags bits */
@ -228,7 +233,7 @@ typedef union _MPI25_SCSI_IO_CDB_UNION {
} MPI25_SCSI_IO_CDB_UNION, *PTR_MPI25_SCSI_IO_CDB_UNION,
Mpi25ScsiIoCdb_t, *pMpi25ScsiIoCdb_t;
/*MPI v2.5 SCSI IO Request Message */
/*MPI v2.5/2.6 SCSI IO Request Message */
typedef struct _MPI25_SCSI_IO_REQUEST {
U16 DevHandle; /*0x00 */
U8 ChainOffset; /*0x02 */
@ -302,12 +307,14 @@ typedef struct _MPI25_SCSI_IO_REQUEST {
#define MPI25_SCSIIO_NUM_SGLOFFSETS (4)
/*defines for the IoFlags field */
#define MPI25_SCSIIO_IOFLAGS_IO_PATH_MASK (0xC000)
#define MPI25_SCSIIO_IOFLAGS_NORMAL_PATH (0x0000)
#define MPI25_SCSIIO_IOFLAGS_FAST_PATH (0x4000)
#define MPI25_SCSIIO_IOFLAGS_IO_PATH_MASK (0xC000)
#define MPI25_SCSIIO_IOFLAGS_NORMAL_PATH (0x0000)
#define MPI25_SCSIIO_IOFLAGS_FAST_PATH (0x4000)
#define MPI26_SCSIIO_IOFLAGS_ESCAPE_PASSTHROUGH (0x2000)
#define MPI25_SCSIIO_IOFLAGS_LARGE_CDB (0x1000)
#define MPI25_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800)
#define MPI26_SCSIIO_IOFLAGS_PORT_REQUEST (0x0400)
#define MPI25_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF)
/*MPI v2.5 defines for the EEDPFlags bits */
@ -512,6 +519,7 @@ typedef struct _MPI2_SEP_REQUEST {
#define MPI2_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01)
/*SlotStatus defines */
#define MPI2_SEP_REQ_SLOTSTATUS_DEV_OFF (0x00080000)
#define MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000)
#define MPI2_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI2_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
@ -547,6 +555,7 @@ typedef struct _MPI2_SEP_REPLY {
Mpi2SepReply_t, *pMpi2SepReply_t;
/*SlotStatus defines */
#define MPI2_SEP_REPLY_SLOTSTATUS_DEV_OFF (0x00080000)
#define MPI2_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000)
#define MPI2_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI2_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200)

117
drivers/scsi/mpt3sas/mpi/mpi2_ioc.h
View File

@ -1,12 +1,12 @@
/*
* Copyright (c) 2000-2014 LSI Corporation.
* Copyright 2000-2015 Avago Technologies. All rights reserved.
*
*
* Name: mpi2_ioc.h
* Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
* Creation Date: October 11, 2006
*
* mpi2_ioc.h Version: 02.00.24
* mpi2_ioc.h Version: 02.00.26
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
@ -133,6 +133,10 @@
* Added MPI2_FW_DOWNLOAD_ITYPE_PUBLIC_KEY.
* Added Encrypted Hash Extended Image.
* 12-05-13 02.00.24 Added MPI25_HASH_IMAGE_TYPE_BIOS.
* 11-18-14 02.00.25 Updated copyright information.
* 03-xx-15 02.00.26 Added MPI26_FW_HEADER_PID_FAMILY_3324_SAS and
* MPI26_FW_HEADER_PID_FAMILY_3516_SAS.
* Added MPI26_CTRL_OP_SHUTDOWN.
* --------------------------------------------------------------------------
*/
@ -165,7 +169,7 @@ typedef struct _MPI2_IOC_INIT_REQUEST {
U16 HeaderVersion; /*0x0E */
U32 Reserved5; /*0x10 */
U16 Reserved6; /*0x14 */
U8 Reserved7; /*0x16 */
U8 HostPageSize; /*0x16 */
U8 HostMSIxVectors; /*0x17 */
U16 Reserved8; /*0x18 */
U16 SystemRequestFrameSize; /*0x1A */
@ -289,7 +293,8 @@ typedef struct _MPI2_IOC_FACTS_REPLY {
U16 MaxDevHandle; /*0x38 */
U16 MaxPersistentEntries; /*0x3A */
U16 MinDevHandle; /*0x3C */
U16 Reserved4; /*0x3E */
U8 CurrentHostPageSize; /* 0x3E */
U8 Reserved4; /* 0x3F */
} MPI2_IOC_FACTS_REPLY, *PTR_MPI2_IOC_FACTS_REPLY,
Mpi2IOCFactsReply_t, *pMpi2IOCFactsReply_t;
@ -326,6 +331,7 @@ typedef struct _MPI2_IOC_FACTS_REPLY {
/*ProductID field uses MPI2_FW_HEADER_PID_ */
/*IOCCapabilities */
#define MPI26_IOCFACTS_CAPABILITY_ATOMIC_REQ (0x00080000)
#define MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE (0x00040000)
#define MPI25_IOCFACTS_CAPABILITY_FAST_PATH_CAPABLE (0x00020000)
#define MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY (0x00010000)
@ -343,8 +349,8 @@ typedef struct _MPI2_IOC_FACTS_REPLY {
#define MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING (0x00000004)
/*ProtocolFlags */
#define MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET (0x0001)
#define MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR (0x0002)
#define MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET (0x0001)
/****************************************************************************
* PortFacts message
@ -1247,6 +1253,7 @@ typedef struct _MPI2_FW_UPLOAD_REQUEST {
#define MPI2_FW_UPLOAD_ITYPE_MEGARAID (0x09)
#define MPI2_FW_UPLOAD_ITYPE_COMPLETE (0x0A)
#define MPI2_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
#define MPI2_FW_UPLOAD_ITYPE_CBB_BACKUP (0x0D)
/*MPI v2.0 FWUpload TransactionContext Element */
typedef struct _MPI2_FW_UPLOAD_TCSGE {
@ -1328,7 +1335,7 @@ typedef struct _MPI2_FW_IMAGE_HEADER {
U32 Reserved54; /*0x54 */
U32 Reserved58; /*0x58 */
U32 Reserved5C; /*0x5C */
U32 Reserved60; /*0x60 */
U32 BootFlags; /*0x60 */
U32 FirmwareVersionNameWhat; /*0x64 */
U8 FirmwareVersionName[32]; /*0x68 */
U32 VendorNameWhat; /*0x88 */
@ -1354,18 +1361,22 @@ typedef struct _MPI2_FW_IMAGE_HEADER {
#define MPI2_FW_HEADER_SIGNATURE_OFFSET (0x00)
#define MPI2_FW_HEADER_SIGNATURE_MASK (0xFF000000)
#define MPI2_FW_HEADER_SIGNATURE (0xEA000000)
#define MPI26_FW_HEADER_SIGNATURE (0xEB000000)
/*Signature0 field */
#define MPI2_FW_HEADER_SIGNATURE0_OFFSET (0x04)
#define MPI2_FW_HEADER_SIGNATURE0 (0x5AFAA55A)
#define MPI26_FW_HEADER_SIGNATURE0 (0x5AEAA55A)
/*Signature1 field */
#define MPI2_FW_HEADER_SIGNATURE1_OFFSET (0x08)
#define MPI2_FW_HEADER_SIGNATURE1 (0xA55AFAA5)
#define MPI26_FW_HEADER_SIGNATURE1 (0xA55AEAA5)
/*Signature2 field */
#define MPI2_FW_HEADER_SIGNATURE2_OFFSET (0x0C)
#define MPI2_FW_HEADER_SIGNATURE2 (0x5AA55AFA)
#define MPI26_FW_HEADER_SIGNATURE2 (0x5AA55AEA)
/*defines for using the ProductID field */
#define MPI2_FW_HEADER_PID_TYPE_MASK (0xF000)
@ -1381,6 +1392,8 @@ typedef struct _MPI2_FW_IMAGE_HEADER {
#define MPI2_FW_HEADER_PID_FAMILY_2108_SAS (0x0013)
#define MPI2_FW_HEADER_PID_FAMILY_2208_SAS (0x0014)
#define MPI25_FW_HEADER_PID_FAMILY_3108_SAS (0x0021)
#define MPI26_FW_HEADER_PID_FAMILY_3324_SAS (0x0028)
#define MPI26_FW_HEADER_PID_FAMILY_3516_SAS (0x0031)
/*use MPI2_IOCFACTS_PROTOCOL_ defines for ProtocolFlags field */
@ -1388,6 +1401,7 @@ typedef struct _MPI2_FW_IMAGE_HEADER {
#define MPI2_FW_HEADER_IMAGESIZE_OFFSET (0x2C)
#define MPI2_FW_HEADER_NEXTIMAGE_OFFSET (0x30)
#define MPI26_FW_HEADER_BOOTFLAGS_OFFSET (0x60)
#define MPI2_FW_HEADER_VERNMHWAT_OFFSET (0x64)
#define MPI2_FW_HEADER_WHAT_SIGNATURE (0x29232840)
@ -1493,7 +1507,9 @@ typedef struct _MPI2_FLASH_LAYOUT_DATA {
#define MPI2_FLASH_REGION_CONFIG_1 (0x07)
#define MPI2_FLASH_REGION_CONFIG_2 (0x08)
#define MPI2_FLASH_REGION_MEGARAID (0x09)
#define MPI2_FLASH_REGION_INIT (0x0A)
#define MPI2_FLASH_REGION_COMMON_BOOT_BLOCK (0x0A)
#define MPI2_FLASH_REGION_INIT (MPI2_FLASH_REGION_COMMON_BOOT_BLOCK)
#define MPI2_FLASH_REGION_CBB_BACKUP (0x0D)
/*ImageRevision */
#define MPI2_FLASH_LAYOUT_IMAGE_REVISION (0x00)
@ -1619,7 +1635,6 @@ typedef struct _MPI25_ENCRYPTED_HASH_DATA {
Mpi25EncryptedHashData_t, *pMpi25EncryptedHashData_t;
/****************************************************************************
* PowerManagementControl message
****************************************************************************/
@ -1726,4 +1741,90 @@ typedef struct _MPI2_PWR_MGMT_CONTROL_REPLY {
} MPI2_PWR_MGMT_CONTROL_REPLY, *PTR_MPI2_PWR_MGMT_CONTROL_REPLY,
Mpi2PwrMgmtControlReply_t, *pMpi2PwrMgmtControlReply_t;
/****************************************************************************
* IO Unit Control messages (MPI v2.6 and later only.)
****************************************************************************/
/* IO Unit Control Request Message */
typedef struct _MPI26_IOUNIT_CONTROL_REQUEST {
U8 Operation; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 DevHandle; /* 0x04 */
U8 IOCParameter; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U8 PhyNum; /* 0x0E */
U8 PrimFlags; /* 0x0F */
U32 Primitive; /* 0x10 */
U8 LookupMethod; /* 0x14 */
U8 Reserved5; /* 0x15 */
U16 SlotNumber; /* 0x16 */
U64 LookupAddress; /* 0x18 */
U32 IOCParameterValue; /* 0x20 */
U32 Reserved7; /* 0x24 */
U32 Reserved8; /* 0x28 */
} MPI26_IOUNIT_CONTROL_REQUEST,
*PTR_MPI26_IOUNIT_CONTROL_REQUEST,
Mpi26IoUnitControlRequest_t,
*pMpi26IoUnitControlRequest_t;
/* values for the Operation field */
#define MPI26_CTRL_OP_CLEAR_ALL_PERSISTENT (0x02)
#define MPI26_CTRL_OP_SAS_PHY_LINK_RESET (0x06)
#define MPI26_CTRL_OP_SAS_PHY_HARD_RESET (0x07)
#define MPI26_CTRL_OP_PHY_CLEAR_ERROR_LOG (0x08)
#define MPI26_CTRL_OP_SAS_SEND_PRIMITIVE (0x0A)
#define MPI26_CTRL_OP_FORCE_FULL_DISCOVERY (0x0B)
#define MPI26_CTRL_OP_REMOVE_DEVICE (0x0D)
#define MPI26_CTRL_OP_LOOKUP_MAPPING (0x0E)
#define MPI26_CTRL_OP_SET_IOC_PARAMETER (0x0F)
#define MPI26_CTRL_OP_ENABLE_FP_DEVICE (0x10)
#define MPI26_CTRL_OP_DISABLE_FP_DEVICE (0x11)
#define MPI26_CTRL_OP_ENABLE_FP_ALL (0x12)
#define MPI26_CTRL_OP_DISABLE_FP_ALL (0x13)
#define MPI26_CTRL_OP_DEV_ENABLE_NCQ (0x14)
#define MPI26_CTRL_OP_DEV_DISABLE_NCQ (0x15)
#define MPI26_CTRL_OP_SHUTDOWN (0x16)
#define MPI26_CTRL_OP_DEV_ENABLE_PERSIST_CONNECTION (0x17)
#define MPI26_CTRL_OP_DEV_DISABLE_PERSIST_CONNECTION (0x18)
#define MPI26_CTRL_OP_DEV_CLOSE_PERSIST_CONNECTION (0x19)
#define MPI26_CTRL_OP_PRODUCT_SPECIFIC_MIN (0x80)
/* values for the PrimFlags field */
#define MPI26_CTRL_PRIMFLAGS_SINGLE (0x08)
#define MPI26_CTRL_PRIMFLAGS_TRIPLE (0x02)
#define MPI26_CTRL_PRIMFLAGS_REDUNDANT (0x01)
/* values for the LookupMethod field */
#define MPI26_CTRL_LOOKUP_METHOD_WWID_ADDRESS (0x01)
#define MPI26_CTRL_LOOKUP_METHOD_ENCLOSURE_SLOT (0x02)
#define MPI26_CTRL_LOOKUP_METHOD_SAS_DEVICE_NAME (0x03)
/* IO Unit Control Reply Message */
typedef struct _MPI26_IOUNIT_CONTROL_REPLY {
U8 Operation; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 DevHandle; /* 0x04 */
U8 IOCParameter; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI26_IOUNIT_CONTROL_REPLY,
*PTR_MPI26_IOUNIT_CONTROL_REPLY,
Mpi26IoUnitControlReply_t,
*pMpi26IoUnitControlReply_t;
#endif

5
drivers/scsi/mpt3sas/mpi/mpi2_raid.h
View File

@ -1,12 +1,12 @@
/*
* Copyright (c) 2000-2014 LSI Corporation.
* Copyright 2000-2014 Avago Technologies. All rights reserved.
*
*
* Name: mpi2_raid.h
* Title: MPI Integrated RAID messages and structures
* Creation Date: April 26, 2007
*
* mpi2_raid.h Version: 02.00.10
* mpi2_raid.h Version: 02.00.11
*
* Version History
* ---------------
@ -31,6 +31,7 @@
* 07-26-12 02.00.09 Added ElapsedSeconds field to MPI2_RAID_VOL_INDICATOR.
* Added MPI2_RAID_VOL_FLAGS_ELAPSED_SECONDS_VALID define.
* 04-17-13 02.00.10 Added MPI25_RAID_ACTION_ADATA_ALLOW_PI.
* 11-18-14 02.00.11 Updated copyright information.
* --------------------------------------------------------------------------
*/

10
drivers/scsi/mpt3sas/mpi/mpi2_sas.h
View File

@ -1,12 +1,12 @@
/*
* Copyright (c) 2000-2014 LSI Corporation.
* Copyright 2000-2015 Avago Technologies. All rights reserved.
*
*
* Name: mpi2_sas.h
* Title: MPI Serial Attached SCSI structures and definitions
* Creation Date: February 9, 2007
*
* mpi2_sas.h Version: 02.00.08
* mpi2_sas.h Version: 02.00.10
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
@ -32,6 +32,9 @@
* Passthrough Request message.
* 08-19-13 02.00.08 Made MPI2_SAS_OP_TRANSMIT_PORT_SELECT_SIGNAL obsolete
* for anything newer than MPI v2.0.
* 11-18-14 02.00.09 Updated copyright information.
* 03-xx-145 02.00.10 Updated for MPI v2.6.
* Added MPI2_SATA_PT_REQ_PT_FLAGS_FPDMA.
* --------------------------------------------------------------------------
*/
@ -183,6 +186,7 @@ typedef struct _MPI2_SATA_PASSTHROUGH_REQUEST {
/*values for PassthroughFlags field */
#define MPI2_SATA_PT_REQ_PT_FLAGS_EXECUTE_DIAG (0x0100)
#define MPI2_SATA_PT_REQ_PT_FLAGS_FPDMA (0x0040)
#define MPI2_SATA_PT_REQ_PT_FLAGS_DMA (0x0020)
#define MPI2_SATA_PT_REQ_PT_FLAGS_PIO (0x0010)
#define MPI2_SATA_PT_REQ_PT_FLAGS_UNSPECIFIED_VU (0x0004)
@ -216,6 +220,8 @@ typedef struct _MPI2_SATA_PASSTHROUGH_REPLY {
/****************************************************************************
* SAS IO Unit Control messages
* (MPI v2.5 and earlier only.
* Replaced by IO Unit Control messages in MPI v2.6 and later.)
****************************************************************************/
/*SAS IO Unit Control Request Message */

5
drivers/scsi/mpt3sas/mpi/mpi2_tool.h
View File

@ -1,12 +1,12 @@
/*
* Copyright (c) 2000-2014 LSI Corporation.
* Copyright 2000-2014 Avago Technologies. All rights reserved.
*
*
* Name: mpi2_tool.h
* Title: MPI diagnostic tool structures and definitions
* Creation Date: March 26, 2007
*
* mpi2_tool.h Version: 02.00.12
* mpi2_tool.h Version: 02.00.13
*
* Version History
* ---------------
@ -34,6 +34,7 @@
* it uses MPI Chain SGE as well as MPI Simple SGE.
* 08-19-13 02.00.11 Added MPI2_TOOLBOX_TEXT_DISPLAY_TOOL and related info.
* 01-08-14 02.00.12 Added MPI2_TOOLBOX_CLEAN_BIT26_PRODUCT_SPECIFIC.
* 11-18-14 02.00.13 Updated copyright information.
* --------------------------------------------------------------------------
*/

5
drivers/scsi/mpt3sas/mpi/mpi2_type.h
View File

@ -1,12 +1,12 @@
/*
* Copyright (c) 2000-2014 LSI Corporation.
* Copyright 2000-2014 Avago Technologies. All rights reserved.
*
*
* Name: mpi2_type.h
* Title: MPI basic type definitions
* Creation Date: August 16, 2006
*
* mpi2_type.h Version: 02.00.00
* mpi2_type.h Version: 02.00.01
*
* Version History
* ---------------
@ -14,6 +14,7 @@
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 11-18-14 02.00.01 Updated copyright information.
* --------------------------------------------------------------------------
*/

5
drivers/scsi/mpt3sas/mpt3sas_base.c
View File

@ -395,6 +395,9 @@ _base_sas_ioc_info(struct MPT3SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
desc = "insufficient resources";
break;
case MPI2_IOCSTATUS_INSUFFICIENT_POWER:
desc = "insufficient power";
break;
case MPI2_IOCSTATUS_INVALID_FIELD:
desc = "invalid field";
break;
@ -1348,6 +1351,7 @@ _base_build_zero_len_sge_ieee(struct MPT3SAS_ADAPTER *ioc, void *paddr)
u8 sgl_flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR |
MPI25_IEEE_SGE_FLAGS_END_OF_LIST);
_base_add_sg_single_ieee(paddr, sgl_flags, 0, 0, -1);
}
@ -5226,6 +5230,7 @@ mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc)
ioc->build_zero_len_sge = &_base_build_zero_len_sge;
break;
case MPI25_VERSION:
case MPI26_VERSION:
/*
* In SAS3.0,
* SCSI_IO, SMP_PASSTHRU, SATA_PASSTHRU, Target Assist, and

32
drivers/scsi/mpt3sas/mpt3sas_ctl.c
View File

@ -410,7 +410,7 @@ mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index,
* @ioc: per adapter object
* @iocpp: The ioc pointer is returned in this.
* @mpi_version: will be MPI2_VERSION for mpt2ctl ioctl device &
* MPI25_VERSION for mpt3ctl ioctl device.
* MPI25_VERSION | MPI26_VERSION for mpt3ctl ioctl device.
*
* Return (-1) means error, else ioc_number.
*/
@ -419,6 +419,7 @@ _ctl_verify_adapter(int ioc_number, struct MPT3SAS_ADAPTER **iocpp,
int mpi_version)
{
struct MPT3SAS_ADAPTER *ioc;
int version = 0;
/* global ioc lock to protect controller on list operations */
spin_lock(&gioc_lock);
list_for_each_entry(ioc, &mpt3sas_ioc_list, list) {
@ -427,8 +428,21 @@ _ctl_verify_adapter(int ioc_number, struct MPT3SAS_ADAPTER **iocpp,
/* Check whether this ioctl command is from right
* ioctl device or not, if not continue the search.
*/
if (ioc->hba_mpi_version_belonged != mpi_version)
continue;
version = ioc->hba_mpi_version_belonged;
/* MPI25_VERSION and MPI26_VERSION uses same ioctl
* device.
*/
if (mpi_version == (MPI25_VERSION | MPI26_VERSION)) {
if ((version == MPI25_VERSION) ||
(version == MPI26_VERSION))
goto out;
else
continue;
} else {
if (version != mpi_version)
continue;
}
out:
spin_unlock(&gioc_lock);
*iocpp = ioc;
return ioc_number;
@ -1053,6 +1067,7 @@ _ctl_getiocinfo(struct MPT3SAS_ADAPTER *ioc, void __user *arg)
strcat(karg.driver_version, MPT2SAS_DRIVER_VERSION);
break;
case MPI25_VERSION:
case MPI26_VERSION:
karg.adapter_type = MPT3_IOCTL_INTERFACE_SAS3;
strcat(karg.driver_version, MPT3SAS_DRIVER_VERSION);
break;
@ -2203,7 +2218,7 @@ _ctl_compat_mpt_command(struct MPT3SAS_ADAPTER *ioc, unsigned cmd,
* @arg - user space data buffer
* @compat - handles 32 bit applications in 64bit os
* @mpi_version: will be MPI2_VERSION for mpt2ctl ioctl device &
* MPI25_VERSION for mpt3ctl ioctl device.
* MPI25_VERSION | MPI26_VERSION for mpt3ctl ioctl device.
*/
static long
_ctl_ioctl_main(struct file *file, unsigned int cmd, void __user *arg,
@ -2341,10 +2356,12 @@ _ctl_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
long ret;
/* pass MPI25_VERSION value, to indicate that this ioctl cmd
/* pass MPI25_VERSION | MPI26_VERSION value,
* to indicate that this ioctl cmd
* came from mpt3ctl ioctl device.
*/
ret = _ctl_ioctl_main(file, cmd, (void __user *)arg, 0, MPI25_VERSION);
ret = _ctl_ioctl_main(file, cmd, (void __user *)arg, 0,
MPI25_VERSION | MPI26_VERSION);
return ret;
}
@ -2379,7 +2396,8 @@ _ctl_ioctl_compat(struct file *file, unsigned cmd, unsigned long arg)
{
long ret;
ret = _ctl_ioctl_main(file, cmd, (void __user *)arg, 1, MPI25_VERSION);
ret = _ctl_ioctl_main(file, cmd, (void __user *)arg, 1,
MPI25_VERSION | MPI26_VERSION);
return ret;
}

80
drivers/scsi/mpt3sas/mpt3sas_scsih.c
View File

@ -1589,10 +1589,16 @@ scsih_get_resync(struct device *dev)
percent_complete = 0;
out:
if (ioc->hba_mpi_version_belonged == MPI2_VERSION)
switch (ioc->hba_mpi_version_belonged) {
case MPI2_VERSION:
raid_set_resync(mpt2sas_raid_template, dev, percent_complete);
if (ioc->hba_mpi_version_belonged == MPI25_VERSION)
break;
case MPI25_VERSION:
case MPI26_VERSION:
raid_set_resync(mpt3sas_raid_template, dev, percent_complete);
break;
}
}
/**
@ -1650,10 +1656,15 @@ scsih_get_state(struct device *dev)
break;
}
out:
if (ioc->hba_mpi_version_belonged == MPI2_VERSION)
switch (ioc->hba_mpi_version_belonged) {
case MPI2_VERSION:
raid_set_state(mpt2sas_raid_template, dev, state);
if (ioc->hba_mpi_version_belonged == MPI25_VERSION)
break;
case MPI25_VERSION:
case MPI26_VERSION:
raid_set_state(mpt3sas_raid_template, dev, state);
break;
}
}
/**
@ -1682,12 +1693,17 @@ _scsih_set_level(struct MPT3SAS_ADAPTER *ioc,
break;
}
if (ioc->hba_mpi_version_belonged == MPI2_VERSION)
switch (ioc->hba_mpi_version_belonged) {
case MPI2_VERSION:
raid_set_level(mpt2sas_raid_template,
&sdev->sdev_gendev, level);
if (ioc->hba_mpi_version_belonged == MPI25_VERSION)
&sdev->sdev_gendev, level);
break;
case MPI25_VERSION:
case MPI26_VERSION:
raid_set_level(mpt3sas_raid_template,
&sdev->sdev_gendev, level);
&sdev->sdev_gendev, level);
break;
}
}
@ -4084,6 +4100,9 @@ _scsih_scsi_ioc_info(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd,
case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
desc_ioc_state = "eedp app tag error";
break;
case MPI2_IOCSTATUS_INSUFFICIENT_POWER:
desc_ioc_state = "insufficient power";
break;
default:
desc_ioc_state = "unknown";
break;
@ -4609,6 +4628,7 @@ _scsih_io_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, u32 reply)
case MPI2_IOCSTATUS_INVALID_STATE:
case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
case MPI2_IOCSTATUS_INSUFFICIENT_POWER:
default:
scmd->result = DID_SOFT_ERROR << 16;
break;
@ -8391,7 +8411,8 @@ static struct raid_function_template mpt3sas_raid_functions = {
* @pdev: PCI device struct
*
* return MPI2_VERSION for SAS 2.0 HBA devices,
* MPI25_VERSION for SAS 3.0 HBA devices.
* MPI25_VERSION for SAS 3.0 HBA devices, and
* MPI26 VERSION for Cutlass & Invader SAS 3.0 HBA devices
*/
u16
_scsih_determine_hba_mpi_version(struct pci_dev *pdev)
@ -8423,6 +8444,17 @@ _scsih_determine_hba_mpi_version(struct pci_dev *pdev)
case MPI25_MFGPAGE_DEVID_SAS3108_5:
case MPI25_MFGPAGE_DEVID_SAS3108_6:
return MPI25_VERSION;
case MPI26_MFGPAGE_DEVID_SAS3216:
case MPI26_MFGPAGE_DEVID_SAS3224:
case MPI26_MFGPAGE_DEVID_SAS3316_1:
case MPI26_MFGPAGE_DEVID_SAS3316_2:
case MPI26_MFGPAGE_DEVID_SAS3316_3:
case MPI26_MFGPAGE_DEVID_SAS3316_4:
case MPI26_MFGPAGE_DEVID_SAS3324_1:
case MPI26_MFGPAGE_DEVID_SAS3324_2:
case MPI26_MFGPAGE_DEVID_SAS3324_3:
case MPI26_MFGPAGE_DEVID_SAS3324_4:
return MPI26_VERSION;
}
return 0;
}
@ -8456,7 +8488,8 @@ _scsih_probe(struct pci_dev *pdev, const struct pci_device_id *id)
/* Enumerate only SAS 3.0 HBA's if hbas_to_enumerate is two,
* for other generation HBA's return with -ENODEV
*/
if ((hbas_to_enumerate == 2) && (hba_mpi_version != MPI25_VERSION))
if ((hbas_to_enumerate == 2) && (!(hba_mpi_version == MPI25_VERSION
|| hba_mpi_version == MPI26_VERSION)))
return -ENODEV;
switch (hba_mpi_version) {
@ -8478,6 +8511,7 @@ _scsih_probe(struct pci_dev *pdev, const struct pci_device_id *id)
ioc->mfg_pg10_hide_flag = MFG_PAGE10_EXPOSE_ALL_DISKS;
break;
case MPI25_VERSION:
case MPI26_VERSION:
/* Use mpt3sas driver host template for SAS 3.0 HBA's */
shost = scsi_host_alloc(&mpt3sas_driver_template,
sizeof(struct MPT3SAS_ADAPTER));
@ -8488,7 +8522,9 @@ _scsih_probe(struct pci_dev *pdev, const struct pci_device_id *id)
ioc->hba_mpi_version_belonged = hba_mpi_version;
ioc->id = mpt3_ids++;
sprintf(ioc->driver_name, "%s", MPT3SAS_DRIVER_NAME);
if (pdev->revision >= SAS3_PCI_DEVICE_C0_REVISION)
if ((ioc->hba_mpi_version_belonged == MPI25_VERSION &&
pdev->revision >= SAS3_PCI_DEVICE_C0_REVISION) ||
(ioc->hba_mpi_version_belonged == MPI26_VERSION))
ioc->msix96_vector = 1;
break;
default:
@ -8866,6 +8902,28 @@ static const struct pci_device_id mpt3sas_pci_table[] = {
PCI_ANY_ID, PCI_ANY_ID },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_6,
PCI_ANY_ID, PCI_ANY_ID },
/* Cutlass ~ 3216 and 3224 */
{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3216,
PCI_ANY_ID, PCI_ANY_ID },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3224,
PCI_ANY_ID, PCI_ANY_ID },
/* Intruder ~ 3316 and 3324 */
{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_1,
PCI_ANY_ID, PCI_ANY_ID },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_2,
PCI_ANY_ID, PCI_ANY_ID },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_3,
PCI_ANY_ID, PCI_ANY_ID },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_4,
PCI_ANY_ID, PCI_ANY_ID },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_1,
PCI_ANY_ID, PCI_ANY_ID },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_2,
PCI_ANY_ID, PCI_ANY_ID },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_3,
PCI_ANY_ID, PCI_ANY_ID },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_4,
PCI_ANY_ID, PCI_ANY_ID },
{0} /* Terminating entry */
};
MODULE_DEVICE_TABLE(pci, mpt3sas_pci_table);