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ARM: keystone: dts: fix typo in the ddr3 pllclk node name

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Fix following typo
 ddr3allclk -> ddr3apllclk
 ddr3bllclk -> ddr3bpllclk

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
This commit is contained in:
Murali Karicheri 2013-11-23 16:26:11 -05:00 committed by Santosh Shilimkar
parent b8273f2eb5
commit afdd8b6111
1 changed files with 2 additions and 2 deletions
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4
arch/arm/boot/dts/keystone-clocks.dtsi
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@ -31,7 +31,7 @@ clocks {
reg-names = "control";
};
ddr3allclk: ddr3apllclk@2620360 {
ddr3apllclk: ddr3apllclk@2620360 {
#clock-cells = <0>;
compatible = "ti,keystone,pll-clock";
clocks = <&refclkddr3a>;
@ -40,7 +40,7 @@ clocks {
reg-names = "control";
};
ddr3bllclk: ddr3bpllclk@2620368 {
ddr3bpllclk: ddr3bpllclk@2620368 {
#clock-cells = <0>;
compatible = "ti,keystone,pll-clock";
clocks = <&refclkddr3b>;