forked from Minki/linux
V4L/DVB (10854): cx18: Correct comments about vertical and horizontal blanking timings
This change only affects comments. Signed-off-by: Andy Walls <awalls@radix.net> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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@ -292,23 +292,29 @@ void cx18_av_std_setup(struct cx18 *cx)
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*
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* vsync: always 6 half-lines of vsync pulses
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* vactive: half lines of active video
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* vblank656: half lines, after line 3, of blanked video
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* vblank: half lines, after line 9, of blanked video
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* vblank656: half lines, after line 3/mid-266, of blanked video
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* vblank: half lines, after line 9/272, of blanked video
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*
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* As far as I can tell:
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* vblank656 starts counting from the falling edge of the first
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* vsync pulse (start of line 4)
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* vsync pulse (start of line 4 or mid-266)
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* vblank starts counting from the after the 6 vsync pulses and
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* 6 equalization pulses (start of line 10)
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* 6 or 5 equalization pulses (start of line 10 or 272)
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*
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* For 525 line systems the driver will extract VBI information
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* from lines 10 through 21. To avoid the EAV RP code from
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* toggling at the start of hblank at line 22, where sliced VBI
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* data from line 21 is stuffed, also treat line 22 as blanked.
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* from lines 10-21 and lines 273-284.
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*/
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vblank656 = 38; /* lines 4 through 22 */
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vblank = 26; /* lines 10 through 22 */
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vactive = 481; /* lines 23 through 262.5 */
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vblank656 = 38; /* lines 4 - 22 & 266 - 284 */
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vblank = 26; /* lines 10 - 22 & 272 - 284 */
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vactive = 481; /* lines 23 - 263 & 285 - 525 */
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/*
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* For a 13.5 Mpps clock and 15,734.26 Hz line rate, a line is
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* is 858 pixels = 720 active + 138 blanking. The Hsync leading
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* edge should happen 1.2 us * 13.5 Mpps ~= 16 pixels after the
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* end of active video, leaving 122 pixels of hblank to ignore
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* before active video starts.
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*/
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hactive = 720;
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hblank = 122;
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luma_lpf = 1;
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@ -89,16 +89,21 @@ struct cx18_av_state {
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/*
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* The VBI slicer starts operating and counting lines, begining at
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* slicer line count of 1, at D lines after the deassertion of VRESET
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* This staring field line, S, is 6 or 10 for 625 or 525 line systems.
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* Sliced ancillary data captured on VBI slicer line M is sent at the
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* beginning of the next VBI slicer line, VBI slicer line count N = M+1.
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* Thus when the VBI slicer reports a VBI slicer line number with
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* ancillary data, the IDID0 byte indicates VBI slicer line N.
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* The actual field line that the captured data comes from is
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* slicer line count of 1, at D lines after the deassertion of VRESET.
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* This staring field line, S, is 6 (& 319) or 10 (& 273) for 625 or 525
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* line systems respectively. Sliced ancillary data captured on VBI
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* slicer line M is inserted after the VBI slicer is done with line M,
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* when VBI slicer line count is N = M+1. Thus when the VBI slicer
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* reports a VBI slicer line number with ancillary data, the IDID0 byte
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* indicates VBI slicer line N. The actual field line that the captured
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* data comes from is
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*
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* L = M+(S+D-1) = N-1+(S+D-1) = N + (S+D-2).
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*
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* L is the line in the field, not frame, from which the VBI data came.
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* N is the line reported by the slicer in the ancillary data.
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* D is the slicer_line_delay value programmed into register 0x47f.
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* S is 6 for 625 line systems or 10 for 525 line systems
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* (S+D-2) is the slicer_line_offset used to convert slicer reported
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* line counts to actual field lines.
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*/
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@ -413,9 +413,8 @@ static void cx18_vbi_setup(struct cx18_stream *s)
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* 0x90 (Task HorizontalBlank)
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* 0xd0 (Task EvenField HorizontalBlank)
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*
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* We have set the digitzer to consider the first active line
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* as part of VerticalBlank as well so we don't have to look for
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* these problem codes nor lose the last line of sliced data.
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* We have set the digitzer such that we don't have to worry
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* about these problem codes.
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*/
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data[4] = 0xB0F0B0F0;
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/*
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