forked from Minki/linux
ARM: mach-s3c24a0: delete
Commit bcae8aeb32 "[ARM] S3C24A0: Initial architecture support files"
brought in a bunch of files while explicitly leaving out the corresponding
Kconfig entry, stating that the series is not complete.
More than 2.5 years later, the support for this has not seen any progress.
This is therefore dead code. If someone wants to revive this code, it is
always possible to retrieve it from the Git repository.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Nicolas Pitre
Nicolas Pitre
parent
620917de59
commit
af0e060e24
@ -173,7 +173,6 @@ machine-$(CONFIG_ARCH_PXA) := pxa
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machine-$(CONFIG_ARCH_REALVIEW) := realview
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machine-$(CONFIG_ARCH_RPC) := rpc
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machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2416 s3c2440 s3c2443
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machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0
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machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx
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machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0
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machine-$(CONFIG_ARCH_S5PC100) := s5pc100
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@ -1,27 +0,0 @@
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/* arch/arm/mach-s3c2410/include/mach/debug-macro.S
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/* pull in the relevant register and map files. */
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#include <mach/map.h>
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#include <plat/regs-serial.h>
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.macro addruart, rp, rv
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ldr \rp, = S3C24XX_PA_UART
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ldr \rv, = S3C24XX_VA_UART
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#if CONFIG_DEBUG_S3C_UART != 0
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add \rp, \rp, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART)
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add \rv, \rv, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART)
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#endif
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.endm
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/* include the reset of the code which will do the work, we're only
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* compiling for a single cpu processor type so the default of s3c2440
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* will be fine with us.
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*/
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#include <plat/debug-macro.S>
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@ -1,18 +0,0 @@
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/* arch/arm/mach-s3c24a0/include/mach/io.h
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*
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben-linux@fluff.org>
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*
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* Default IO routines for S3C24A0
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*/
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#ifndef __ASM_ARM_ARCH_IO_H
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#define __ASM_ARM_ARCH_IO_H
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/* No current ISA/PCI bus support. */
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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#define IO_SPACE_LIMIT (0xFFFFFFFF)
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#endif
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@ -1,117 +0,0 @@
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/* linux/arch/arm/mach-s3c24a0/include/mach/irqs.h
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*
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* Copyright (c) 2003-2005 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_24A0_IRQS_H
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#define __ASM_ARCH_24A0_IRQS_H __FILE__
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#define IRQ_EINT0t2 S3C2410_IRQ(0) /* 16 */
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/* for generic entry-macro.S */
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#define IRQ_EINT0 IRQ_EINT0t2
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#define IRQ_EINT3t6 S3C2410_IRQ(1)
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#define IRQ_EINT7t10 S3C2410_IRQ(2)
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#define IRQ_EINT11t14 S3C2410_IRQ(3)
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#define IRQ_EINT15t18 S3C2410_IRQ(4) /* 20 */
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#define IRQ_TICK S3C2410_IRQ(5)
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#define IRQ_DCTQ S3C2410_IRQ(6)
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#define IRQ_MC S3C2410_IRQ(7)
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#define IRQ_ME S3C2410_IRQ(8) /* 24 */
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#define IRQ_KEYPAD S3C2410_IRQ(9)
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#define IRQ_TIMER0 S3C2410_IRQ(10)
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#define IRQ_TIMER1 S3C2410_IRQ(11)
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#define IRQ_TIMER2 S3C2410_IRQ(12)
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#define IRQ_TIMER3_4 S3C2410_IRQ(13)
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#define IRQ_OS_TIMER IRQ_TIMER3_4
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#define IRQ_LCD S3C2410_IRQ(14)
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#define IRQ_CAM_C S3C2410_IRQ(15)
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#define IRQ_WDT_BATFLT S3C2410_IRQ(16) /* 32 */
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#define IRQ_UART0 S3C2410_IRQ(17)
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#define IRQ_CAM_P S3C2410_IRQ(18)
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#define IRQ_MODEM S3C2410_IRQ(19)
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#define IRQ_DMA S3C2410_IRQ(20)
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#define IRQ_SDI S3C2410_IRQ(21)
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#define IRQ_SPI0 S3C2410_IRQ(22)
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#define IRQ_UART1 S3C2410_IRQ(23)
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#define IRQ_AC97_NFLASH S3C2410_IRQ(24) /* 40 */
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#define IRQ_USBD S3C2410_IRQ(25)
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#define IRQ_USBH S3C2410_IRQ(26)
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#define IRQ_IIC S3C2410_IRQ(27)
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#define IRQ_IRDA_MSTICK S3C2410_IRQ(28) /* 44 */
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#define IRQ_VLX_SPI1 S3C2410_IRQ(29)
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#define IRQ_RTC S3C2410_IRQ(30) /* 46 */
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#define IRQ_ADC_PEN S3C2410_IRQ(31)
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/* interrupts generated from the external interrupts sources */
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#define IRQ_EINT00 S3C2410_IRQ(32) /* 48 */
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#define IRQ_EINT1 S3C2410_IRQ(33)
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#define IRQ_EINT2 S3C2410_IRQ(34)
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#define IRQ_EINT3 S3C2410_IRQ(35)
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#define IRQ_EINT4 S3C2410_IRQ(36)
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#define IRQ_EINT5 S3C2410_IRQ(37)
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#define IRQ_EINT6 S3C2410_IRQ(38)
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#define IRQ_EINT7 S3C2410_IRQ(39)
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#define IRQ_EINT8 S3C2410_IRQ(40)
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#define IRQ_EINT9 S3C2410_IRQ(41)
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#define IRQ_EINT10 S3C2410_IRQ(42)
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#define IRQ_EINT11 S3C2410_IRQ(43)
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#define IRQ_EINT12 S3C2410_IRQ(44)
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#define IRQ_EINT13 S3C2410_IRQ(45)
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#define IRQ_EINT14 S3C2410_IRQ(46)
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#define IRQ_EINT15 S3C2410_IRQ(47)
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#define IRQ_EINT16 S3C2410_IRQ(48)
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#define IRQ_EINT17 S3C2410_IRQ(49)
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#define IRQ_EINT18 S3C2410_IRQ(50)
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#define IRQ_EINT_BIT(x) ((x) - IRQ_EINT00)
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/* SUB IRQS */
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#define IRQ_S3CUART_RX0 S3C2410_IRQ(51) /* 67 */
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#define IRQ_S3CUART_TX0 S3C2410_IRQ(52)
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#define IRQ_S3CUART_ERR0 S3C2410_IRQ(53)
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#define IRQ_S3CUART_RX1 S3C2410_IRQ(54)
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#define IRQ_S3CUART_TX1 S3C2410_IRQ(55)
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#define IRQ_S3CUART_ERR1 S3C2410_IRQ(56)
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#define IRQ_S3CUART_RX2 (0x0)
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#define IRQ_S3CUART_TX2 (0x0)
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#define IRQ_S3CUART_ERR2 (0x0)
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#define IRQ_IRDA S3C2410_IRQ(57)
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#define IRQ_MSTICK S3C2410_IRQ(58)
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#define IRQ_RESERVED0 S3C2410_IRQ(59)
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#define IRQ_RESERVED1 S3C2410_IRQ(60)
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#define IRQ_RESERVED2 S3C2410_IRQ(61)
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#define IRQ_TIMER3 S3C2410_IRQ(62)
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#define IRQ_TIMER4 S3C2410_IRQ(63)
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#define IRQ_WDT S3C2410_IRQ(64)
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#define IRQ_BATFLT S3C2410_IRQ(65)
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#define IRQ_POST S3C2410_IRQ(66)
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#define IRQ_DISP_FIFO S3C2410_IRQ(67)
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#define IRQ_PENUP S3C2410_IRQ(68)
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#define IRQ_PENDN S3C2410_IRQ(69)
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#define IRQ_ADC S3C2410_IRQ(70)
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#define IRQ_DISP_FRAME S3C2410_IRQ(71)
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#define IRQ_NFLASH S3C2410_IRQ(72)
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#define IRQ_AC97 S3C2410_IRQ(73)
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#define IRQ_SPI1 S3C2410_IRQ(74)
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#define IRQ_VLX S3C2410_IRQ(75)
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#define IRQ_DMA0 S3C2410_IRQ(76)
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#define IRQ_DMA1 S3C2410_IRQ(77)
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#define IRQ_DMA2 S3C2410_IRQ(78)
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#define IRQ_DMA3 S3C2410_IRQ(79)
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#define IRQ_TC (0x0)
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#define NR_IRQS (IRQ_DMA3+1)
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#endif /* __ASM_ARCH_24A0_IRQS_H */
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@ -1,86 +0,0 @@
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/* linux/arch/arm/mach-s3c24a0/include/mach/map.h
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*
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* Copyright 2003-2007 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C24A0 - Memory map definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_24A0_MAP_H
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#define __ASM_ARCH_24A0_MAP_H __FILE__
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#include <plat/map-base.h>
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#include <plat/map.h>
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#define S3C24A0_PA_IO_BASE (0x40000000)
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#define S3C24A0_PA_CLKPWR (0x40000000)
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#define S3C24A0_PA_IRQ (0x40200000)
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#define S3C24A0_PA_DMA (0x40400000)
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#define S3C24A0_PA_MEMCTRL (0x40C00000)
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#define S3C24A0_PA_NAND (0x40C00000)
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#define S3C24A0_PA_SROM (0x40C20000)
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#define S3C24A0_PA_SDRAM (0x40C40000)
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#define S3C24A0_PA_BUSM (0x40CE0000)
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#define S3C24A0_PA_USBHOST (0x41000000)
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#define S3C24A0_PA_MODEMIF (0x41180000)
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#define S3C24A0_PA_IRDA (0x41800000)
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#define S3C24A0_PA_TIMER (0x44000000)
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#define S3C24A0_PA_WATCHDOG (0x44100000)
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#define S3C24A0_PA_RTC (0x44200000)
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#define S3C24A0_PA_UART (0x44400000)
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#define S3C24A0_PA_UART0 (S3C24A0_PA_UART)
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#define S3C24A0_PA_UART1 (S3C24A0_PA_UART + 0x4000)
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#define S3C24A0_PA_SPI (0x44500000)
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#define S3C24A0_PA_IIC (0x44600000)
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#define S3C24A0_PA_IIS (0x44700000)
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#define S3C24A0_PA_GPIO (0x44800000)
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#define S3C24A0_PA_KEYIF (0x44900000)
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#define S3C24A0_PA_USBDEV (0x44A00000)
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#define S3C24A0_PA_AC97 (0x45000000)
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#define S3C24A0_PA_ADC (0x45800000)
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#define S3C24A0_PA_SDI (0x46000000)
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#define S3C24A0_PA_MS (0x46100000)
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#define S3C24A0_PA_LCD (0x4A000000)
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#define S3C24A0_PA_VPOST (0x4A100000)
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/* physical addresses of all the chip-select areas */
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#define S3C24A0_CS0 (0x00000000)
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#define S3C24A0_CS1 (0x04000000)
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#define S3C24A0_CS2 (0x08000000)
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#define S3C24A0_CS3 (0x0C000000)
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#define S3C24A0_CS4 (0x10000000)
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#define S3C24A0_CS5 (0x40000000)
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#define S3C24A0_SDRAM_PA (S3C24A0_CS4)
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/* Use a single interface for common resources between S3C24XX cpus */
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#define S3C24XX_PA_IRQ S3C24A0_PA_IRQ
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#define S3C24XX_PA_MEMCTRL S3C24A0_PA_MEMCTRL
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#define S3C24XX_PA_USBHOST S3C24A0_PA_USBHOST
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#define S3C24XX_PA_DMA S3C24A0_PA_DMA
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#define S3C24XX_PA_CLKPWR S3C24A0_PA_CLKPWR
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#define S3C24XX_PA_LCD S3C24A0_PA_LCD
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#define S3C24XX_PA_UART S3C24A0_PA_UART
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#define S3C24XX_PA_TIMER S3C24A0_PA_TIMER
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#define S3C24XX_PA_USBDEV S3C24A0_PA_USBDEV
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#define S3C24XX_PA_WATCHDOG S3C24A0_PA_WATCHDOG
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#define S3C24XX_PA_IIS S3C24A0_PA_IIS
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#define S3C24XX_PA_GPIO S3C24A0_PA_GPIO
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#define S3C24XX_PA_RTC S3C24A0_PA_RTC
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#define S3C24XX_PA_ADC S3C24A0_PA_ADC
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#define S3C24XX_PA_SPI S3C24A0_PA_SPI
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#define S3C24XX_PA_SDI S3C24A0_PA_SDI
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#define S3C24XX_PA_NAND S3C24A0_PA_NAND
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#define S3C_PA_UART S3C24A0_PA_UART
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#define S3C_PA_IIC S3C24A0_PA_IIC
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#define S3C_PA_NAND S3C24XX_PA_NAND
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#endif /* __ASM_ARCH_24A0_MAP_H */
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@ -1,21 +0,0 @@
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/* linux/arch/arm/mach-s3c24a0/include/mach/memory.h
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* from linux/include/asm-arm/arch-rpc/memory.h
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*
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* Copyright (C) 1996,1997,1998 Russell King.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_24A0_MEMORY_H
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#define __ASM_ARCH_24A0_MEMORY_H __FILE__
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#define PLAT_PHYS_OFFSET UL(0x10000000)
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#define __virt_to_bus(x) __virt_to_phys(x)
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#define __bus_to_virt(x) __phys_to_virt(x)
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#define __pfn_to_bus(x) __pfn_to_phys(x)
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#define __bus_to_pfn(x) __phys_to_pfn(x)
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#endif
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@ -1,88 +0,0 @@
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/* linux/arch/arm/mach-s3c24a0/include/mach/regs-clock.h
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*
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* Copyright (c) 2003-2006 Simtec Electronics <linux@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* S3C24A0 clock register definitions
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*/
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#ifndef __ASM_ARCH_24A0_REGS_CLOCK_H
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#define __ASM_ARCH_24A0_REGS_CLOCK_H __FILE__
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#define S3C24A0_MPLLCON S3C2410_CLKREG(0x10)
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#define S3C24A0_UPLLCON S3C2410_CLKREG(0x14)
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#define S3C24A0_CLKCON S3C2410_CLKREG(0x20)
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#define S3C24A0_CLKSRC S3C2410_CLKREG(0x24)
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#define S3C24A0_CLKDIVN S3C2410_CLKREG(0x28)
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/* CLKCON register bits */
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#define S3C24A0_CLKCON_VLX (1<<29)
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#define S3C24A0_CLKCON_VPOST (1<<28)
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#define S3C24A0_CLKCON_WDT (1<<27) /* reserved */
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#define S3C24A0_CLKCON_MPEGDCTQ (1<<26)
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#define S3C24A0_CLKCON_VPOSTIF (1<<25)
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#define S3C24A0_CLKCON_MPEG4IF (1<<24)
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#define S3C24A0_CLKCON_CAM_UPLL (1<<23)
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#define S3C24A0_CLKCON_LCDC (1<<22)
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#define S3C24A0_CLKCON_CAM_HCLK (1<<21)
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#define S3C24A0_CLKCON_MPEG4 (1<<20)
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#define S3C24A0_CLKCON_KEYPAD (1<<19)
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#define S3C24A0_CLKCON_ADC (1<<18)
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#define S3C24A0_CLKCON_SDI (1<<17)
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#define S3C24A0_CLKCON_MS (1<<16) /* memory stick */
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#define S3C24A0_CLKCON_USBD (1<<15)
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#define S3C24A0_CLKCON_GPIO (1<<14)
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#define S3C24A0_CLKCON_IIS (1<<13)
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#define S3C24A0_CLKCON_IIC (1<<12)
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#define S3C24A0_CLKCON_SPI (1<<11)
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#define S3C24A0_CLKCON_UART1 (1<<10)
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#define S3C24A0_CLKCON_UART0 (1<<9)
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#define S3C24A0_CLKCON_PWMT (1<<8)
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#define S3C24A0_CLKCON_USBH (1<<7)
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#define S3C24A0_CLKCON_AC97 (1<<6)
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#define S3C24A0_CLKCON_IrDA (1<<4)
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#define S3C24A0_CLKCON_IDLE (1<<2)
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#define S3C24A0_CLKCON_MON (1<<1)
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#define S3C24A0_CLKCON_STOP (1<<0)
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/* CLKSRC register bits */
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#define S3C24A0_CLKSRC_OSC (1<<8) /* CLKSRC */
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#define S3C24A0_CLKSRC_UPLL (1<<7)
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#define S3C24A0_CLKSRC_MPLL (1<<5)
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#define S3C24A0_CLKSRC_EXT (1<<4)
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|
||||
/* Use a single interface with the common code, for s3c24xx */
|
||||
|
||||
#define S3C2410_MPLLCON S3C24A0_MPLLCON
|
||||
#define S3C2410_UPLLCON S3C24A0_UPLLCON
|
||||
#define S3C2410_CLKCON S3C24A0_CLKCON
|
||||
#define S3C2410_CLKSLOW S3C24A0_CLKSRC
|
||||
#define S3C2410_CLKDIVN S3C24A0_CLKDIVN
|
||||
|
||||
#define S3C2410_CLKCON_IDLE S3C24A0_CLKCON_IDLE
|
||||
#define S3C2410_CLKCON_POWER S3C24A0_CLKCON_STOP
|
||||
#define S3C2410_CLKCON_LCDC S3C24A0_CLKCON_LCDC
|
||||
#define S3C2410_CLKCON_USBH S3C24A0_CLKCON_USBH
|
||||
#define S3C2410_CLKCON_USBD S3C24A0_CLKCON_USBD
|
||||
#define S3C2410_CLKCON_PWMT S3C24A0_CLKCON_PWMT
|
||||
#define S3C2410_CLKCON_SDI S3C24A0_CLKCON_SDI
|
||||
#define S3C2410_CLKCON_UART0 S3C24A0_CLKCON_UART0
|
||||
#define S3C2410_CLKCON_UART1 S3C24A0_CLKCON_UART1
|
||||
#define S3C2410_CLKCON_GPIO S3C24A0_CLKCON_GPIO
|
||||
#define S3C2410_CLKCON_ADC S3C24A0_CLKCON_ADC
|
||||
#define S3C2410_CLKCON_IIC S3C24A0_CLKCON_IIC
|
||||
#define S3C2410_CLKCON_IIS S3C24A0_CLKCON_IIS
|
||||
#define S3C2410_CLKCON_SPI S3C24A0_CLKCON_SPI
|
||||
|
||||
#define S3C2410_CLKSLOW_UCLK_OFF S3C24A0_CLKSRC_UPLL
|
||||
#define S3C2410_CLKSLOW_MPLL_OFF S3C24A0_CLKSRC_MPLL
|
||||
#define S3C2410_CLKSLOW_SLOW (0xFF)
|
||||
#define S3C2410_CLKSLOW_GET_SLOWVAL(x) (0x1)
|
||||
|
||||
#endif /* __ASM_ARCH_24A0_REGS_CLOCK_H */
|
||||
@ -1,25 +0,0 @@
|
||||
/* linux/arch/arm/mach-s3c24a0/include/mach/regs-irq.h
|
||||
*
|
||||
* Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
|
||||
* http://www.simtec.co.uk/products/SWLINUX/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef ___ASM_ARCH_24A0_REGS_IRQ_H
|
||||
#define ___ASM_ARCH_24A0_REGS_IRQ_H __FILE__
|
||||
|
||||
|
||||
#define S3C2410_EINTMASK S3C2410_EINTREG(0x034)
|
||||
#define S3C2410_EINTPEND S3C2410_EINTREG(0X038)
|
||||
|
||||
#define S3C24XX_EINTMASK S3C24XX_EINTREG(0x034)
|
||||
#define S3C24XX_EINTPEND S3C24XX_EINTREG(0X038)
|
||||
|
||||
#endif /* __ASM_ARCH_24A0_REGS_IRQ_H */
|
||||
|
||||
|
||||
|
||||
@ -1,25 +0,0 @@
|
||||
/* linux/arch/arm/mach-s3c24a0/include/mach/system.h
|
||||
*
|
||||
* Copyright 2008 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
* S3C24A0 - System function defines and includes
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#include <mach/map.h>
|
||||
|
||||
static void arch_idle(void)
|
||||
{
|
||||
/* currently no specific idle support. */
|
||||
}
|
||||
|
||||
void (*s3c24xx_reset_hook)(void);
|
||||
|
||||
#include <asm/plat-s3c24xx/system-reset.h>
|
||||
@ -1,15 +0,0 @@
|
||||
/* linux/arch/arm/mach-s3c24a0/include/mach/tick.h
|
||||
*
|
||||
* Copyright 2008 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
* http://armlinux.simtec.co.uk/
|
||||
*
|
||||
* S3C24A0 - timer tick support
|
||||
*/
|
||||
|
||||
#define SUBSRC_TIMER4 (1 << (IRQ_TIMER4 - IRQ_S3CUART_RX0))
|
||||
|
||||
static inline int s3c24xx_ostimer_pending(void)
|
||||
{
|
||||
return __raw_readl(S3C2410_SUBSRCPND) & SUBSRC_TIMER4;
|
||||
}
|
||||
@ -1,18 +0,0 @@
|
||||
/* linux/arch/arm/mach-s3c24a0/include/mach/timex.h
|
||||
*
|
||||
* Copyright (c) 2008 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
* S3C2410 - time parameters
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_TIMEX_H
|
||||
#define __ASM_ARCH_TIMEX_H
|
||||
|
||||
#define CLOCK_TICK_RATE 12000000
|
||||
|
||||
#endif /* __ASM_ARCH_TIMEX_H */
|
||||
@ -1,17 +0,0 @@
|
||||
/* linux/include/asm-arm/arch-s3c24ao/vmalloc.h
|
||||
*
|
||||
* Copyright 2008 Simtec Electronics <linux@simtec.co.uk>
|
||||
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* S3C24A0 vmalloc definition
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_VMALLOC_H
|
||||
#define __ASM_ARCH_VMALLOC_H
|
||||
|
||||
#define VMALLOC_END 0xF6000000UL
|
||||
|
||||
#endif /* __ASM_ARCH_VMALLOC_H */
|
||||
@ -4,7 +4,7 @@
|
||||
|
||||
config PLAT_S3C24XX
|
||||
bool
|
||||
depends on ARCH_S3C2410 || ARCH_S3C24A0
|
||||
depends on ARCH_S3C2410
|
||||
default y
|
||||
select NO_IOPORT
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
|
||||
@ -140,7 +140,7 @@ extern unsigned s3c_gpio_getcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
|
||||
|
||||
/* Pull-{up,down} resistor controls.
|
||||
*
|
||||
* S3C2410,S3C2440,S3C24A0 = Pull-UP,
|
||||
* S3C2410,S3C2440 = Pull-UP,
|
||||
* S3C2412,S3C2413 = Pull-Down
|
||||
* S3C6400,S3C6410 = Pull-Both [None,Down,Up,Undef]
|
||||
* S3C2443 = Pull-Both [not same as S3C6400]
|
||||
|
||||
@ -155,14 +155,6 @@
|
||||
#define S3C2410_UFSTAT_RXMASK (15<<0)
|
||||
#define S3C2410_UFSTAT_RXSHIFT (0)
|
||||
|
||||
/* UFSTAT S3C24A0 */
|
||||
#define S3C24A0_UFSTAT_TXFULL (1 << 14)
|
||||
#define S3C24A0_UFSTAT_RXFULL (1 << 6)
|
||||
#define S3C24A0_UFSTAT_TXMASK (63 << 8)
|
||||
#define S3C24A0_UFSTAT_TXSHIFT (8)
|
||||
#define S3C24A0_UFSTAT_RXMASK (63)
|
||||
#define S3C24A0_UFSTAT_RXSHIFT (0)
|
||||
|
||||
/* UFSTAT S3C2443 same as S3C2440 */
|
||||
#define S3C2440_UFSTAT_TXFULL (1<<14)
|
||||
#define S3C2440_UFSTAT_RXFULL (1<<6)
|
||||
|
||||
@ -519,13 +519,6 @@ config SERIAL_S3C2440
|
||||
help
|
||||
Serial port support for the Samsung S3C2440, S3C2416 and S3C2442 SoC
|
||||
|
||||
config SERIAL_S3C24A0
|
||||
tristate "Samsung S3C24A0 Serial port support"
|
||||
depends on SERIAL_SAMSUNG && CPU_S3C24A0
|
||||
default y if CPU_S3C24A0
|
||||
help
|
||||
Serial port support for the Samsung S3C24A0 SoC
|
||||
|
||||
config SERIAL_S3C6400
|
||||
tristate "Samsung S3C6400/S3C6410/S5P6440/S5P6450/S5PC100 Serial port support"
|
||||
depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440 || CPU_S5P6450 || CPU_S5PC100)
|
||||
|
||||
@ -42,7 +42,6 @@ obj-$(CONFIG_SERIAL_S3C2400) += s3c2400.o
|
||||
obj-$(CONFIG_SERIAL_S3C2410) += s3c2410.o
|
||||
obj-$(CONFIG_SERIAL_S3C2412) += s3c2412.o
|
||||
obj-$(CONFIG_SERIAL_S3C2440) += s3c2440.o
|
||||
obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o
|
||||
obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o
|
||||
obj-$(CONFIG_SERIAL_S5PV210) += s5pv210.o
|
||||
obj-$(CONFIG_SERIAL_MAX3100) += max3100.o
|
||||
|
||||
@ -1,117 +0,0 @@
|
||||
/*
|
||||
* Driver for Samsung S3C24A0 SoC onboard UARTs.
|
||||
*
|
||||
* Based on drivers/serial/s3c2410.c
|
||||
*
|
||||
* Author: Sandeep Patil <sandeep.patil@azingo.com>
|
||||
*
|
||||
* Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
|
||||
* http://armlinux.simtec.co.uk/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/serial.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/irq.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include <plat/regs-serial.h>
|
||||
#include <mach/regs-gpio.h>
|
||||
|
||||
#include "samsung.h"
|
||||
|
||||
static int s3c24a0_serial_setsource(struct uart_port *port,
|
||||
struct s3c24xx_uart_clksrc *clk)
|
||||
{
|
||||
unsigned long ucon = rd_regl(port, S3C2410_UCON);
|
||||
|
||||
if (strcmp(clk->name, "uclk") == 0)
|
||||
ucon |= S3C2410_UCON_UCLK;
|
||||
else
|
||||
ucon &= ~S3C2410_UCON_UCLK;
|
||||
|
||||
wr_regl(port, S3C2410_UCON, ucon);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int s3c24a0_serial_getsource(struct uart_port *port,
|
||||
struct s3c24xx_uart_clksrc *clk)
|
||||
{
|
||||
unsigned long ucon = rd_regl(port, S3C2410_UCON);
|
||||
|
||||
clk->divisor = 1;
|
||||
clk->name = (ucon & S3C2410_UCON_UCLK) ? "uclk" : "pclk";
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int s3c24a0_serial_resetport(struct uart_port *port,
|
||||
struct s3c2410_uartcfg *cfg)
|
||||
{
|
||||
dbg("s3c24a0_serial_resetport: port=%p (%08lx), cfg=%p\n",
|
||||
port, port->mapbase, cfg);
|
||||
|
||||
wr_regl(port, S3C2410_UCON, cfg->ucon);
|
||||
wr_regl(port, S3C2410_ULCON, cfg->ulcon);
|
||||
|
||||
/* reset both fifos */
|
||||
|
||||
wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
|
||||
wr_regl(port, S3C2410_UFCON, cfg->ufcon);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct s3c24xx_uart_info s3c24a0_uart_inf = {
|
||||
.name = "Samsung S3C24A0 UART",
|
||||
.type = PORT_S3C2410,
|
||||
.fifosize = 16,
|
||||
.rx_fifomask = S3C24A0_UFSTAT_RXMASK,
|
||||
.rx_fifoshift = S3C24A0_UFSTAT_RXSHIFT,
|
||||
.rx_fifofull = S3C24A0_UFSTAT_RXFULL,
|
||||
.tx_fifofull = S3C24A0_UFSTAT_TXFULL,
|
||||
.tx_fifomask = S3C24A0_UFSTAT_TXMASK,
|
||||
.tx_fifoshift = S3C24A0_UFSTAT_TXSHIFT,
|
||||
.get_clksrc = s3c24a0_serial_getsource,
|
||||
.set_clksrc = s3c24a0_serial_setsource,
|
||||
.reset_port = s3c24a0_serial_resetport,
|
||||
};
|
||||
|
||||
static int s3c24a0_serial_probe(struct platform_device *dev)
|
||||
{
|
||||
return s3c24xx_serial_probe(dev, &s3c24a0_uart_inf);
|
||||
}
|
||||
|
||||
static struct platform_driver s3c24a0_serial_driver = {
|
||||
.probe = s3c24a0_serial_probe,
|
||||
.remove = __devexit_p(s3c24xx_serial_remove),
|
||||
.driver = {
|
||||
.name = "s3c24a0-uart",
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
};
|
||||
|
||||
s3c24xx_console_init(&s3c24a0_serial_driver, &s3c24a0_uart_inf);
|
||||
|
||||
static int __init s3c24a0_serial_init(void)
|
||||
{
|
||||
return s3c24xx_serial_init(&s3c24a0_serial_driver, &s3c24a0_uart_inf);
|
||||
}
|
||||
|
||||
static void __exit s3c24a0_serial_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&s3c24a0_serial_driver);
|
||||
}
|
||||
|
||||
module_init(s3c24a0_serial_init);
|
||||
module_exit(s3c24a0_serial_exit);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user