forked from Minki/linux
pinctrl: sh-pfc: Collect Renesas related CONFIGs in one place
Renesas related pinctrl CONFIGs are located in many places, which is confusing. This patch collects them into the same place, grouped in a new "Renesas pinctrl drivers" menu. This patch also moves pinctrl-rz{a1,a2,n1}.c into the sh-pfc folder. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87k0xoy4r7.wl-kuninori.morimoto.gx@renesas.com [geert: Update path in MAINTAINERS] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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@ -13690,7 +13690,6 @@ L: linux-renesas-soc@vger.kernel.org
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S: Supported
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git sh-pfc
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F: Documentation/devicetree/bindings/pinctrl/renesas,*
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F: drivers/pinctrl/pinctrl-rz*
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F: drivers/pinctrl/sh-pfc/
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PIN CONTROLLER - SAMSUNG
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@ -213,38 +213,6 @@ config PINCTRL_ROCKCHIP
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select GENERIC_IRQ_CHIP
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select MFD_SYSCON
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config PINCTRL_RZA1
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bool "Renesas RZ/A1 gpio and pinctrl driver"
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depends on OF
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depends on ARCH_R7S72100 || COMPILE_TEST
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select GPIOLIB
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select GENERIC_PINCTRL_GROUPS
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select GENERIC_PINMUX_FUNCTIONS
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select GENERIC_PINCONF
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help
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This selects pinctrl driver for Renesas RZ/A1 platforms.
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config PINCTRL_RZA2
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bool "Renesas RZ/A2 gpio and pinctrl driver"
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depends on OF
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depends on ARCH_R7S9210 || COMPILE_TEST
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select GPIOLIB
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select GENERIC_PINCTRL_GROUPS
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select GENERIC_PINMUX_FUNCTIONS
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select GENERIC_PINCONF
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help
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This selects GPIO and pinctrl driver for Renesas RZ/A2 platforms.
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config PINCTRL_RZN1
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bool "Renesas RZ/N1 pinctrl driver"
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depends on OF
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depends on ARCH_RZN1 || COMPILE_TEST
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select GENERIC_PINCTRL_GROUPS
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select GENERIC_PINMUX_FUNCTIONS
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select GENERIC_PINCONF
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help
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This selects pinctrl driver for Renesas RZ/N1 devices.
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config PINCTRL_SINGLE
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tristate "One-register-per-pin type device tree based pinctrl driver"
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depends on OF
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@ -30,9 +30,6 @@ obj-$(CONFIG_PINCTRL_PALMAS) += pinctrl-palmas.o
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obj-$(CONFIG_PINCTRL_PIC32) += pinctrl-pic32.o
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obj-$(CONFIG_PINCTRL_PISTACHIO) += pinctrl-pistachio.o
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obj-$(CONFIG_PINCTRL_ROCKCHIP) += pinctrl-rockchip.o
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obj-$(CONFIG_PINCTRL_RZA1) += pinctrl-rza1.o
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obj-$(CONFIG_PINCTRL_RZA2) += pinctrl-rza2.o
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obj-$(CONFIG_PINCTRL_RZN1) += pinctrl-rzn1.o
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obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o
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obj-$(CONFIG_PINCTRL_SIRF) += sirf/
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obj-$(CONFIG_PINCTRL_SX150X) += pinctrl-sx150x.o
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@ -3,6 +3,8 @@
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# Renesas SH and SH Mobile PINCTRL drivers
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#
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menu "Renesas pinctrl drivers"
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config PINCTRL_SH_PFC
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bool "Renesas SoC pin control support" if COMPILE_TEST && !(ARCH_RENESAS || SUPERH)
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default y if ARCH_RENESAS || SUPERH
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@ -53,6 +55,38 @@ config PINCTRL_SH_PFC
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help
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This enables pin control drivers for Renesas SuperH and ARM platforms
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config PINCTRL_RZA1
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bool "RZ/A1 gpio and pinctrl driver"
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depends on OF
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depends on ARCH_R7S72100 || COMPILE_TEST
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select GPIOLIB
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select GENERIC_PINCTRL_GROUPS
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select GENERIC_PINMUX_FUNCTIONS
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select GENERIC_PINCONF
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help
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This selects pinctrl driver for Renesas RZ/A1 platforms.
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config PINCTRL_RZA2
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bool "RZ/A2 gpio and pinctrl driver"
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depends on OF
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depends on ARCH_R7S9210 || COMPILE_TEST
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select GPIOLIB
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select GENERIC_PINCTRL_GROUPS
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select GENERIC_PINMUX_FUNCTIONS
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select GENERIC_PINCONF
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help
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This selects GPIO and pinctrl driver for Renesas RZ/A2 platforms.
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config PINCTRL_RZN1
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bool "RZ/N1 pinctrl driver"
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depends on OF
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depends on ARCH_RZN1 || COMPILE_TEST
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select GENERIC_PINCTRL_GROUPS
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select GENERIC_PINMUX_FUNCTIONS
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select GENERIC_PINCONF
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help
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This selects pinctrl driver for Renesas RZ/N1 devices.
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config PINCTRL_SH_PFC_GPIO
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select GPIOLIB
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bool
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@ -203,3 +237,5 @@ config PINCTRL_PFC_SH7786
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config PINCTRL_PFC_SHX3
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bool "SH-X3 pin control support" if COMPILE_TEST
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select PINCTRL_SH_FUNC_GPIO
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endmenu
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@ -43,6 +43,10 @@ obj-$(CONFIG_PINCTRL_PFC_SH7785) += pfc-sh7785.o
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obj-$(CONFIG_PINCTRL_PFC_SH7786) += pfc-sh7786.o
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obj-$(CONFIG_PINCTRL_PFC_SHX3) += pfc-shx3.o
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obj-$(CONFIG_PINCTRL_RZA1) += pinctrl-rza1.o
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obj-$(CONFIG_PINCTRL_RZA2) += pinctrl-rza2.o
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obj-$(CONFIG_PINCTRL_RZN1) += pinctrl-rzn1.o
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ifeq ($(CONFIG_COMPILE_TEST),y)
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CFLAGS_pfc-sh7203.o += -I$(srctree)/arch/sh/include/cpu-sh2a
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CFLAGS_pfc-sh7264.o += -I$(srctree)/arch/sh/include/cpu-sh2a
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@ -26,10 +26,10 @@
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#include <linux/pinctrl/pinmux.h>
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#include <linux/slab.h>
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#include "core.h"
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#include "devicetree.h"
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#include "pinconf.h"
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#include "pinmux.h"
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#include "../core.h"
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#include "../devicetree.h"
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#include "../pinconf.h"
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#include "../pinmux.h"
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#define DRIVER_NAME "pinctrl-rza1"
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@ -17,8 +17,8 @@
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinmux.h>
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#include "core.h"
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#include "pinmux.h"
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#include "../core.h"
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#include "../pinmux.h"
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#define DRIVER_NAME "pinctrl-rza2"
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@ -17,9 +17,9 @@
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#include <linux/pinctrl/pinmux.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include "core.h"
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#include "pinconf.h"
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#include "pinctrl-utils.h"
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#include "../core.h"
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#include "../pinconf.h"
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#include "../pinctrl-utils.h"
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/* Field positions and masks in the pinmux registers */
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#define RZN1_L1_PIN_DRIVE_STRENGTH 10
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