pinctrl: sh-pfc: Collect Renesas related CONFIGs in one place

Renesas related pinctrl CONFIGs are located in many places, which is
confusing.
This patch collects them into the same place, grouped in a new "Renesas
pinctrl drivers" menu.
This patch also moves pinctrl-rz{a1,a2,n1}.c into the sh-pfc folder.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87k0xoy4r7.wl-kuninori.morimoto.gx@renesas.com
[geert: Update path in MAINTAINERS]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Kuninori Morimoto 2020-08-24 14:49:48 +09:00 committed by Geert Uytterhoeven
parent aa5b0f7e0f
commit af028ecd54
8 changed files with 49 additions and 45 deletions

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@ -13690,7 +13690,6 @@ L: linux-renesas-soc@vger.kernel.org
S: Supported
T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git sh-pfc
F: Documentation/devicetree/bindings/pinctrl/renesas,*
F: drivers/pinctrl/pinctrl-rz*
F: drivers/pinctrl/sh-pfc/
PIN CONTROLLER - SAMSUNG

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@ -213,38 +213,6 @@ config PINCTRL_ROCKCHIP
select GENERIC_IRQ_CHIP
select MFD_SYSCON
config PINCTRL_RZA1
bool "Renesas RZ/A1 gpio and pinctrl driver"
depends on OF
depends on ARCH_R7S72100 || COMPILE_TEST
select GPIOLIB
select GENERIC_PINCTRL_GROUPS
select GENERIC_PINMUX_FUNCTIONS
select GENERIC_PINCONF
help
This selects pinctrl driver for Renesas RZ/A1 platforms.
config PINCTRL_RZA2
bool "Renesas RZ/A2 gpio and pinctrl driver"
depends on OF
depends on ARCH_R7S9210 || COMPILE_TEST
select GPIOLIB
select GENERIC_PINCTRL_GROUPS
select GENERIC_PINMUX_FUNCTIONS
select GENERIC_PINCONF
help
This selects GPIO and pinctrl driver for Renesas RZ/A2 platforms.
config PINCTRL_RZN1
bool "Renesas RZ/N1 pinctrl driver"
depends on OF
depends on ARCH_RZN1 || COMPILE_TEST
select GENERIC_PINCTRL_GROUPS
select GENERIC_PINMUX_FUNCTIONS
select GENERIC_PINCONF
help
This selects pinctrl driver for Renesas RZ/N1 devices.
config PINCTRL_SINGLE
tristate "One-register-per-pin type device tree based pinctrl driver"
depends on OF

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@ -30,9 +30,6 @@ obj-$(CONFIG_PINCTRL_PALMAS) += pinctrl-palmas.o
obj-$(CONFIG_PINCTRL_PIC32) += pinctrl-pic32.o
obj-$(CONFIG_PINCTRL_PISTACHIO) += pinctrl-pistachio.o
obj-$(CONFIG_PINCTRL_ROCKCHIP) += pinctrl-rockchip.o
obj-$(CONFIG_PINCTRL_RZA1) += pinctrl-rza1.o
obj-$(CONFIG_PINCTRL_RZA2) += pinctrl-rza2.o
obj-$(CONFIG_PINCTRL_RZN1) += pinctrl-rzn1.o
obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o
obj-$(CONFIG_PINCTRL_SIRF) += sirf/
obj-$(CONFIG_PINCTRL_SX150X) += pinctrl-sx150x.o

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@ -3,6 +3,8 @@
# Renesas SH and SH Mobile PINCTRL drivers
#
menu "Renesas pinctrl drivers"
config PINCTRL_SH_PFC
bool "Renesas SoC pin control support" if COMPILE_TEST && !(ARCH_RENESAS || SUPERH)
default y if ARCH_RENESAS || SUPERH
@ -53,6 +55,38 @@ config PINCTRL_SH_PFC
help
This enables pin control drivers for Renesas SuperH and ARM platforms
config PINCTRL_RZA1
bool "RZ/A1 gpio and pinctrl driver"
depends on OF
depends on ARCH_R7S72100 || COMPILE_TEST
select GPIOLIB
select GENERIC_PINCTRL_GROUPS
select GENERIC_PINMUX_FUNCTIONS
select GENERIC_PINCONF
help
This selects pinctrl driver for Renesas RZ/A1 platforms.
config PINCTRL_RZA2
bool "RZ/A2 gpio and pinctrl driver"
depends on OF
depends on ARCH_R7S9210 || COMPILE_TEST
select GPIOLIB
select GENERIC_PINCTRL_GROUPS
select GENERIC_PINMUX_FUNCTIONS
select GENERIC_PINCONF
help
This selects GPIO and pinctrl driver for Renesas RZ/A2 platforms.
config PINCTRL_RZN1
bool "RZ/N1 pinctrl driver"
depends on OF
depends on ARCH_RZN1 || COMPILE_TEST
select GENERIC_PINCTRL_GROUPS
select GENERIC_PINMUX_FUNCTIONS
select GENERIC_PINCONF
help
This selects pinctrl driver for Renesas RZ/N1 devices.
config PINCTRL_SH_PFC_GPIO
select GPIOLIB
bool
@ -203,3 +237,5 @@ config PINCTRL_PFC_SH7786
config PINCTRL_PFC_SHX3
bool "SH-X3 pin control support" if COMPILE_TEST
select PINCTRL_SH_FUNC_GPIO
endmenu

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@ -43,6 +43,10 @@ obj-$(CONFIG_PINCTRL_PFC_SH7785) += pfc-sh7785.o
obj-$(CONFIG_PINCTRL_PFC_SH7786) += pfc-sh7786.o
obj-$(CONFIG_PINCTRL_PFC_SHX3) += pfc-shx3.o
obj-$(CONFIG_PINCTRL_RZA1) += pinctrl-rza1.o
obj-$(CONFIG_PINCTRL_RZA2) += pinctrl-rza2.o
obj-$(CONFIG_PINCTRL_RZN1) += pinctrl-rzn1.o
ifeq ($(CONFIG_COMPILE_TEST),y)
CFLAGS_pfc-sh7203.o += -I$(srctree)/arch/sh/include/cpu-sh2a
CFLAGS_pfc-sh7264.o += -I$(srctree)/arch/sh/include/cpu-sh2a

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@ -26,10 +26,10 @@
#include <linux/pinctrl/pinmux.h>
#include <linux/slab.h>
#include "core.h"
#include "devicetree.h"
#include "pinconf.h"
#include "pinmux.h"
#include "../core.h"
#include "../devicetree.h"
#include "../pinconf.h"
#include "../pinmux.h"
#define DRIVER_NAME "pinctrl-rza1"

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@ -17,8 +17,8 @@
#include <linux/of_device.h>
#include <linux/pinctrl/pinmux.h>
#include "core.h"
#include "pinmux.h"
#include "../core.h"
#include "../pinmux.h"
#define DRIVER_NAME "pinctrl-rza2"

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@ -17,9 +17,9 @@
#include <linux/pinctrl/pinmux.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include "core.h"
#include "pinconf.h"
#include "pinctrl-utils.h"
#include "../core.h"
#include "../pinconf.h"
#include "../pinctrl-utils.h"
/* Field positions and masks in the pinmux registers */
#define RZN1_L1_PIN_DRIVE_STRENGTH 10