Merge branch 'x86/urgent' into x86/irq
Merge reason: conflict in arch/x86/kernel/apic/io_apic.c Resolved Conflicts: arch/x86/kernel/apic/io_apic.c Signed-off-by: H. Peter Anvin <hpa@zytor.com>
This commit is contained in:
commit
aef55d4922
@ -327,7 +327,6 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs)
|
||||
current->mm->free_area_cache = TASK_UNMAPPED_BASE;
|
||||
current->mm->cached_hole_size = 0;
|
||||
|
||||
current->mm->mmap = NULL;
|
||||
install_exec_creds(bprm);
|
||||
current->flags &= ~PF_FORKNOEXEC;
|
||||
|
||||
|
@ -160,6 +160,7 @@ extern int io_apic_get_redir_entries(int ioapic);
|
||||
struct io_apic_irq_attr;
|
||||
extern int io_apic_set_pci_routing(struct device *dev, int irq,
|
||||
struct io_apic_irq_attr *irq_attr);
|
||||
void setup_IO_APIC_irq_extra(u32 gsi);
|
||||
extern int (*ioapic_renumber_irq)(int ioapic, int irq);
|
||||
extern void ioapic_init_mappings(void);
|
||||
extern void ioapic_insert_resources(void);
|
||||
|
@ -11,9 +11,9 @@
|
||||
#include <linux/irqflags.h>
|
||||
|
||||
/* entries in ARCH_DLINFO: */
|
||||
#ifdef CONFIG_IA32_EMULATION
|
||||
#if defined(CONFIG_IA32_EMULATION) || !defined(CONFIG_X86_64)
|
||||
# define AT_VECTOR_SIZE_ARCH 2
|
||||
#else
|
||||
#else /* else it's non-compat x86-64 */
|
||||
# define AT_VECTOR_SIZE_ARCH 1
|
||||
#endif
|
||||
|
||||
|
@ -446,6 +446,12 @@ void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger)
|
||||
int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
|
||||
{
|
||||
*irq = gsi;
|
||||
|
||||
#ifdef CONFIG_X86_IO_APIC
|
||||
if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC)
|
||||
setup_IO_APIC_irq_extra(gsi);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -473,7 +479,8 @@ int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
|
||||
plat_gsi = mp_register_gsi(dev, gsi, trigger, polarity);
|
||||
}
|
||||
#endif
|
||||
acpi_gsi_to_irq(plat_gsi, &irq);
|
||||
irq = plat_gsi;
|
||||
|
||||
return irq;
|
||||
}
|
||||
|
||||
@ -1185,9 +1192,6 @@ static void __init acpi_process_madt(void)
|
||||
if (!error) {
|
||||
acpi_lapic = 1;
|
||||
|
||||
#ifdef CONFIG_X86_BIGSMP
|
||||
generic_bigsmp_probe();
|
||||
#endif
|
||||
/*
|
||||
* Parse MADT IO-APIC entries
|
||||
*/
|
||||
@ -1197,8 +1201,6 @@ static void __init acpi_process_madt(void)
|
||||
acpi_ioapic = 1;
|
||||
|
||||
smp_found_config = 1;
|
||||
if (apic->setup_apic_routing)
|
||||
apic->setup_apic_routing();
|
||||
}
|
||||
}
|
||||
if (error == -EINVAL) {
|
||||
|
@ -1641,9 +1641,7 @@ int __init APIC_init_uniprocessor(void)
|
||||
#endif
|
||||
|
||||
enable_IR_x2apic();
|
||||
#ifdef CONFIG_X86_64
|
||||
default_setup_apic_routing();
|
||||
#endif
|
||||
|
||||
verify_local_APIC();
|
||||
connect_bsp_APIC();
|
||||
@ -1891,21 +1889,6 @@ void __cpuinit generic_processor_info(int apicid, int version)
|
||||
if (apicid > max_physical_apicid)
|
||||
max_physical_apicid = apicid;
|
||||
|
||||
#ifdef CONFIG_X86_32
|
||||
if (num_processors > 8) {
|
||||
switch (boot_cpu_data.x86_vendor) {
|
||||
case X86_VENDOR_INTEL:
|
||||
if (!APIC_XAPIC(version)) {
|
||||
def_to_bigsmp = 0;
|
||||
break;
|
||||
}
|
||||
/* If P4 and above fall through */
|
||||
case X86_VENDOR_AMD:
|
||||
def_to_bigsmp = 1;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SMP) || defined(CONFIG_X86_64)
|
||||
early_per_cpu(x86_cpu_to_apicid, cpu) = apicid;
|
||||
early_per_cpu(x86_bios_cpu_apicid, cpu) = apicid;
|
||||
|
@ -1538,6 +1538,56 @@ static void __init setup_IO_APIC_irqs(void)
|
||||
" (apicid-pin) not connected\n");
|
||||
}
|
||||
|
||||
/*
|
||||
* for the gsit that is not in first ioapic
|
||||
* but could not use acpi_register_gsi()
|
||||
* like some special sci in IBM x3330
|
||||
*/
|
||||
void setup_IO_APIC_irq_extra(u32 gsi)
|
||||
{
|
||||
int apic_id = 0, pin, idx, irq;
|
||||
int node = cpu_to_node(boot_cpu_id);
|
||||
struct irq_desc *desc;
|
||||
struct irq_cfg *cfg;
|
||||
|
||||
/*
|
||||
* Convert 'gsi' to 'ioapic.pin'.
|
||||
*/
|
||||
apic_id = mp_find_ioapic(gsi);
|
||||
if (apic_id < 0)
|
||||
return;
|
||||
|
||||
pin = mp_find_ioapic_pin(apic_id, gsi);
|
||||
idx = find_irq_entry(apic_id, pin, mp_INT);
|
||||
if (idx == -1)
|
||||
return;
|
||||
|
||||
irq = pin_2_irq(idx, apic_id, pin);
|
||||
#ifdef CONFIG_SPARSE_IRQ
|
||||
desc = irq_to_desc(irq);
|
||||
if (desc)
|
||||
return;
|
||||
#endif
|
||||
desc = irq_to_desc_alloc_node(irq, node);
|
||||
if (!desc) {
|
||||
printk(KERN_INFO "can not get irq_desc for %d\n", irq);
|
||||
return;
|
||||
}
|
||||
|
||||
cfg = desc->chip_data;
|
||||
add_pin_to_irq_node(cfg, node, apic_id, pin);
|
||||
|
||||
if (test_bit(pin, mp_ioapic_routing[apic_id].pin_programmed)) {
|
||||
pr_debug("Pin %d-%d already programmed\n",
|
||||
mp_ioapics[apic_id].apicid, pin);
|
||||
return;
|
||||
}
|
||||
set_bit(pin, mp_ioapic_routing[apic_id].pin_programmed);
|
||||
|
||||
setup_IO_APIC_irq(apic_id, pin, irq, desc,
|
||||
irq_trigger(idx), irq_polarity(idx));
|
||||
}
|
||||
|
||||
/*
|
||||
* Set up the timer pin, possibly with the 8259A-master behind.
|
||||
*/
|
||||
@ -3252,14 +3302,12 @@ int create_irq(void)
|
||||
void destroy_irq(unsigned int irq)
|
||||
{
|
||||
unsigned long flags;
|
||||
struct irq_cfg *cfg;
|
||||
|
||||
dynamic_irq_cleanup_keep_chip_data(irq);
|
||||
|
||||
free_irte(irq);
|
||||
spin_lock_irqsave(&vector_lock, flags);
|
||||
cfg = irq_to_desc(irq)->chip_data;
|
||||
__clear_irq_vector(irq, cfg);
|
||||
__clear_irq_vector(irq, get_irq_chip_data(irq));
|
||||
spin_unlock_irqrestore(&vector_lock, flags);
|
||||
}
|
||||
|
||||
|
@ -52,7 +52,32 @@ static int __init print_ipi_mode(void)
|
||||
}
|
||||
late_initcall(print_ipi_mode);
|
||||
|
||||
void default_setup_apic_routing(void)
|
||||
void __init default_setup_apic_routing(void)
|
||||
{
|
||||
int version = apic_version[boot_cpu_physical_apicid];
|
||||
|
||||
if (num_possible_cpus() > 8) {
|
||||
switch (boot_cpu_data.x86_vendor) {
|
||||
case X86_VENDOR_INTEL:
|
||||
if (!APIC_XAPIC(version)) {
|
||||
def_to_bigsmp = 0;
|
||||
break;
|
||||
}
|
||||
/* If P4 and above fall through */
|
||||
case X86_VENDOR_AMD:
|
||||
def_to_bigsmp = 1;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_X86_BIGSMP
|
||||
generic_bigsmp_probe();
|
||||
#endif
|
||||
|
||||
if (apic->setup_apic_routing)
|
||||
apic->setup_apic_routing();
|
||||
}
|
||||
|
||||
static void setup_apic_flat_routing(void)
|
||||
{
|
||||
#ifdef CONFIG_X86_IO_APIC
|
||||
printk(KERN_INFO
|
||||
@ -103,7 +128,7 @@ struct apic apic_default = {
|
||||
.init_apic_ldr = default_init_apic_ldr,
|
||||
|
||||
.ioapic_phys_id_map = default_ioapic_phys_id_map,
|
||||
.setup_apic_routing = default_setup_apic_routing,
|
||||
.setup_apic_routing = setup_apic_flat_routing,
|
||||
.multi_timer_check = NULL,
|
||||
.apicid_to_node = default_apicid_to_node,
|
||||
.cpu_to_logical_apicid = default_cpu_to_logical_apicid,
|
||||
|
@ -67,7 +67,7 @@ void __init default_setup_apic_routing(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
if (apic == &apic_flat && num_processors > 8)
|
||||
if (apic == &apic_flat && num_possible_cpus() > 8)
|
||||
apic = &apic_physflat;
|
||||
|
||||
printk(KERN_INFO "Setting APIC routing to %s\n", apic->name);
|
||||
|
@ -359,13 +359,6 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
|
||||
x86_init.mpparse.mpc_record(1);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_X86_BIGSMP
|
||||
generic_bigsmp_probe();
|
||||
#endif
|
||||
|
||||
if (apic->setup_apic_routing)
|
||||
apic->setup_apic_routing();
|
||||
|
||||
if (!num_processors)
|
||||
printk(KERN_ERR "MPTABLE: no processors registered!\n");
|
||||
return num_processors;
|
||||
|
@ -461,6 +461,14 @@ static struct dmi_system_id __initdata pci_reboot_dmi_table[] = {
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "Macmini3,1"),
|
||||
},
|
||||
},
|
||||
{ /* Handle problems with rebooting on the iMac9,1. */
|
||||
.callback = set_pci_reboot,
|
||||
.ident = "Apple iMac9,1",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "iMac9,1"),
|
||||
},
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
|
@ -1083,9 +1083,7 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
|
||||
set_cpu_sibling_map(0);
|
||||
|
||||
enable_IR_x2apic();
|
||||
#ifdef CONFIG_X86_64
|
||||
default_setup_apic_routing();
|
||||
#endif
|
||||
|
||||
if (smp_sanity_check(max_cpus) < 0) {
|
||||
printk(KERN_INFO "SMP disabled\n");
|
||||
|
@ -18,7 +18,7 @@ static inline pte_t gup_get_pte(pte_t *ptep)
|
||||
#else
|
||||
/*
|
||||
* With get_user_pages_fast, we walk down the pagetables without taking
|
||||
* any locks. For this we would like to load the pointers atoimcally,
|
||||
* any locks. For this we would like to load the pointers atomically,
|
||||
* but that is not possible (without expensive cmpxchg8b) on PAE. What
|
||||
* we do have is the guarantee that a pte will only either go from not
|
||||
* present to present, or present to not present or both -- it will not
|
||||
|
@ -767,16 +767,19 @@ int __init agp_amd64_init(void)
|
||||
|
||||
static int __init agp_amd64_mod_init(void)
|
||||
{
|
||||
#ifndef MODULE
|
||||
if (gart_iommu_aperture)
|
||||
return agp_bridges_found ? 0 : -ENODEV;
|
||||
|
||||
#endif
|
||||
return agp_amd64_init();
|
||||
}
|
||||
|
||||
static void __exit agp_amd64_cleanup(void)
|
||||
{
|
||||
#ifndef MODULE
|
||||
if (gart_iommu_aperture)
|
||||
return;
|
||||
#endif
|
||||
if (aperture_resource)
|
||||
release_resource(aperture_resource);
|
||||
pci_unregister_driver(&agp_amd64_pci_driver);
|
||||
|
Loading…
Reference in New Issue
Block a user