i40e/i40evf: remove storm control
The storm control features are not part of the hardware and mistakenly were left in the code. Remove them as they are not needed any more. Change-ID: I6e9277c8da2c52e69348a657bae25271449c2099 Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Tested-by: Kavindya Deegala <kavindya.s.deegala@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -2568,7 +2568,6 @@ static void i40e_enable_misc_int_causes(struct i40e_hw *hw)
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I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
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I40E_PFINT_ICR0_ENA_GPIO_MASK |
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I40E_PFINT_ICR0_ENA_TIMESYNC_MASK |
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I40E_PFINT_ICR0_ENA_STORM_DETECT_MASK |
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I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
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I40E_PFINT_ICR0_ENA_VFLR_MASK |
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I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
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@ -1340,8 +1340,6 @@
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#define I40E_PFINT_ICR0_GPIO_MASK (0x1 << I40E_PFINT_ICR0_GPIO_SHIFT)
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#define I40E_PFINT_ICR0_TIMESYNC_SHIFT 23
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#define I40E_PFINT_ICR0_TIMESYNC_MASK (0x1 << I40E_PFINT_ICR0_TIMESYNC_SHIFT)
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#define I40E_PFINT_ICR0_STORM_DETECT_SHIFT 24
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#define I40E_PFINT_ICR0_STORM_DETECT_MASK (0x1 << I40E_PFINT_ICR0_STORM_DETECT_SHIFT)
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#define I40E_PFINT_ICR0_LINK_STAT_CHANGE_SHIFT 25
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#define I40E_PFINT_ICR0_LINK_STAT_CHANGE_MASK (0x1 << I40E_PFINT_ICR0_LINK_STAT_CHANGE_SHIFT)
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#define I40E_PFINT_ICR0_HMC_ERR_SHIFT 26
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@ -1367,8 +1365,6 @@
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#define I40E_PFINT_ICR0_ENA_GPIO_MASK (0x1 << I40E_PFINT_ICR0_ENA_GPIO_SHIFT)
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#define I40E_PFINT_ICR0_ENA_TIMESYNC_SHIFT 23
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#define I40E_PFINT_ICR0_ENA_TIMESYNC_MASK (0x1 << I40E_PFINT_ICR0_ENA_TIMESYNC_SHIFT)
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#define I40E_PFINT_ICR0_ENA_STORM_DETECT_SHIFT 24
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#define I40E_PFINT_ICR0_ENA_STORM_DETECT_MASK (0x1 << I40E_PFINT_ICR0_ENA_STORM_DETECT_SHIFT)
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#define I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_SHIFT 25
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#define I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_MASK (0x1 << I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_SHIFT)
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#define I40E_PFINT_ICR0_ENA_HMC_ERR_SHIFT 26
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@ -27,7 +27,7 @@
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#ifndef _I40E_TXRX_H_
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#define _I40E_TXRX_H_
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/* Interrupt Throttling and Rate Limiting (storm control) Goodies */
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/* Interrupt Throttling and Rate Limiting Goodies */
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#define I40E_MAX_ITR 0x0FF0 /* reg uses 2 usec resolution */
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#define I40E_MIN_ITR 0x0004 /* reg uses 2 usec resolution */
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@ -1340,8 +1340,6 @@
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#define I40E_PFINT_ICR0_GPIO_MASK (0x1 << I40E_PFINT_ICR0_GPIO_SHIFT)
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#define I40E_PFINT_ICR0_TIMESYNC_SHIFT 23
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#define I40E_PFINT_ICR0_TIMESYNC_MASK (0x1 << I40E_PFINT_ICR0_TIMESYNC_SHIFT)
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#define I40E_PFINT_ICR0_STORM_DETECT_SHIFT 24
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#define I40E_PFINT_ICR0_STORM_DETECT_MASK (0x1 << I40E_PFINT_ICR0_STORM_DETECT_SHIFT)
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#define I40E_PFINT_ICR0_LINK_STAT_CHANGE_SHIFT 25
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#define I40E_PFINT_ICR0_LINK_STAT_CHANGE_MASK (0x1 << I40E_PFINT_ICR0_LINK_STAT_CHANGE_SHIFT)
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#define I40E_PFINT_ICR0_HMC_ERR_SHIFT 26
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@ -1367,8 +1365,6 @@
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#define I40E_PFINT_ICR0_ENA_GPIO_MASK (0x1 << I40E_PFINT_ICR0_ENA_GPIO_SHIFT)
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#define I40E_PFINT_ICR0_ENA_TIMESYNC_SHIFT 23
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#define I40E_PFINT_ICR0_ENA_TIMESYNC_MASK (0x1 << I40E_PFINT_ICR0_ENA_TIMESYNC_SHIFT)
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#define I40E_PFINT_ICR0_ENA_STORM_DETECT_SHIFT 24
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#define I40E_PFINT_ICR0_ENA_STORM_DETECT_MASK (0x1 << I40E_PFINT_ICR0_ENA_STORM_DETECT_SHIFT)
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#define I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_SHIFT 25
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#define I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_MASK (0x1 << I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_SHIFT)
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#define I40E_PFINT_ICR0_ENA_HMC_ERR_SHIFT 26
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@ -27,7 +27,7 @@
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#ifndef _I40E_TXRX_H_
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#define _I40E_TXRX_H_
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/* Interrupt Throttling and Rate Limiting (storm control) Goodies */
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/* Interrupt Throttling and Rate Limiting Goodies */
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#define I40E_MAX_ITR 0x0FF0 /* reg uses 2 usec resolution */
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#define I40E_MIN_ITR 0x0004 /* reg uses 2 usec resolution */
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