forked from Minki/linux
x86, kvm: add new AMD SVM feature bits
The recently updated CPUID specification names new SVM feature bits. Add them to the list of reported features. Signed-off-by: Andre Przywara <andre.przywara@amd,com> LKML-Reference: <1283778860-26843-5-git-send-email-andre.przywara@amd.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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@ -183,6 +183,13 @@
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#define X86_FEATURE_LBRV (8*32+ 6) /* AMD LBR Virtualization support */
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#define X86_FEATURE_SVML (8*32+ 7) /* "svm_lock" AMD SVM locking MSR */
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#define X86_FEATURE_NRIPS (8*32+ 8) /* "nrip_save" AMD SVM next_rip save */
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#define X86_FEATURE_TSCRATEMSR (8*32+ 9) /* "tsc_scale" AMD TSC scaling support */
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#define X86_FEATURE_VMCBCLEAN (8*32+10) /* "vmcb_clean" AMD VMCB clean bits support */
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#define X86_FEATURE_FLUSHBYASID (8*32+11) /* AMD flush-by-ASID support */
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#define X86_FEATURE_DECODEASSISTS (8*32+12) /* AMD Decode Assists support */
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#define X86_FEATURE_PAUSEFILTER (8*32+13) /* AMD filtered pause intercept */
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#define X86_FEATURE_PFTHRESHOLD (8*32+14) /* AMD pause filter threshold */
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/* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx), word 9 */
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#define X86_FEATURE_FSGSBASE (9*32+ 0) /* {RD/WR}{FS/GS}BASE instructions*/
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@ -43,6 +43,12 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
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{ X86_FEATURE_LBRV, CR_EDX, 1, 0x8000000a, 0 },
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{ X86_FEATURE_SVML, CR_EDX, 2, 0x8000000a, 0 },
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{ X86_FEATURE_NRIPS, CR_EDX, 3, 0x8000000a, 0 },
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{ X86_FEATURE_TSCRATEMSR, CR_EDX, 4, 0x8000000a, 0 },
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{ X86_FEATURE_VMCBCLEAN, CR_EDX, 5, 0x8000000a, 0 },
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{ X86_FEATURE_FLUSHBYASID, CR_EDX, 6, 0x8000000a, 0 },
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{ X86_FEATURE_DECODEASSISTS, CR_EDX, 7, 0x8000000a, 0 },
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{ X86_FEATURE_PAUSEFILTER, CR_EDX,10, 0x8000000a, 0 },
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{ X86_FEATURE_PFTHRESHOLD, CR_EDX,12, 0x8000000a, 0 },
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{ 0, 0, 0, 0, 0 }
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};
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