forked from Minki/linux
RDMA/bnxt_re: Add chip context to identify 57500 series
Adding setup and destroy routines for chip-context. The chip context would be used frequently in control and data path to take execution flow depending on the chip type. chip context structure pointer is added to the relevant data structures. Signed-off-by: Selvin Xavier <selvin.xavier@broadcom.com> Signed-off-by: Devesh Sharma <devesh.sharma@broadcom.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
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@ -124,6 +124,7 @@ struct bnxt_re_dev {
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#define BNXT_RE_FLAG_ISSUE_ROCE_STATS 29
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struct net_device *netdev;
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unsigned int version, major, minor;
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struct bnxt_qplib_chip_ctx chip_ctx;
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struct bnxt_en_dev *en_dev;
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struct bnxt_msix_entry msix_entries[BNXT_RE_MAX_MSIX];
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int num_msix;
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@ -80,6 +80,29 @@ static DEFINE_MUTEX(bnxt_re_dev_lock);
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static struct workqueue_struct *bnxt_re_wq;
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static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev);
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static void bnxt_re_destroy_chip_ctx(struct bnxt_re_dev *rdev)
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{
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rdev->rcfw.res = NULL;
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rdev->qplib_res.cctx = NULL;
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}
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static int bnxt_re_setup_chip_ctx(struct bnxt_re_dev *rdev)
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{
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struct bnxt_en_dev *en_dev;
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struct bnxt *bp;
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en_dev = rdev->en_dev;
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bp = netdev_priv(en_dev->net);
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rdev->chip_ctx.chip_num = bp->chip_num;
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/* rest members to follow eventually */
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rdev->qplib_res.cctx = &rdev->chip_ctx;
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rdev->rcfw.res = &rdev->qplib_res;
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return 0;
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}
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/* SR-IOV helper functions */
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static void bnxt_re_get_sriov_func_type(struct bnxt_re_dev *rdev)
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@ -278,6 +301,7 @@ static int bnxt_re_register_netdev(struct bnxt_re_dev *rdev)
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rc = en_dev->en_ops->bnxt_register_device(en_dev, BNXT_ROCE_ULP,
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&bnxt_re_ulp_ops, rdev);
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rdev->qplib_res.pdev = rdev->en_dev->pdev;
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return rc;
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}
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@ -905,6 +929,7 @@ static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev)
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int i;
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for (i = 0; i < rdev->num_msix - 1; i++) {
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rdev->nq[i].res = NULL;
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bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id);
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bnxt_qplib_free_nq(&rdev->nq[i]);
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}
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@ -949,6 +974,7 @@ static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev)
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goto dealloc_res;
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for (i = 0; i < rdev->num_msix - 1; i++) {
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rdev->nq[i].res = &rdev->qplib_res;
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rdev->nq[i].hwq.max_elements = BNXT_RE_MAX_CQ_COUNT +
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BNXT_RE_MAX_SRQC_COUNT + 2;
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rc = bnxt_qplib_alloc_nq(rdev->en_dev->pdev, &rdev->nq[i]);
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@ -1262,6 +1288,8 @@ static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev)
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dev_warn(rdev_to_dev(rdev),
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"Failed to free MSI-X vectors: %#x", rc);
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}
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bnxt_re_destroy_chip_ctx(rdev);
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if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags)) {
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rc = bnxt_re_unregister_netdev(rdev);
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if (rc)
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@ -1299,6 +1327,12 @@ static int bnxt_re_ib_reg(struct bnxt_re_dev *rdev)
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}
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set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags);
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rc = bnxt_re_setup_chip_ctx(rdev);
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if (rc) {
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dev_err(rdev_to_dev(rdev), "Failed to get chip context\n");
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return -EINVAL;
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}
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/* Check whether VF or PF */
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bnxt_re_get_sriov_func_type(rdev);
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@ -439,6 +439,7 @@ struct bnxt_qplib_cq {
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struct bnxt_qplib_nq {
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struct pci_dev *pdev;
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struct bnxt_qplib_res *res;
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int vector;
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cpumask_t mask;
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@ -187,6 +187,7 @@ struct bnxt_qplib_qp_node {
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/* RCFW Communication Channels */
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struct bnxt_qplib_rcfw {
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struct pci_dev *pdev;
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struct bnxt_qplib_res *res;
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int vector;
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struct tasklet_struct worker;
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bool requested;
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@ -180,12 +180,20 @@ struct bnxt_qplib_ctx {
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u64 hwrm_intf_ver;
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};
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struct bnxt_qplib_chip_ctx {
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u16 chip_num;
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u8 chip_rev;
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u8 chip_metal;
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};
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#define CHIP_NUM_57500 0x1750
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struct bnxt_qplib_res {
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struct pci_dev *pdev;
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struct bnxt_qplib_chip_ctx *cctx;
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struct net_device *netdev;
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struct bnxt_qplib_rcfw *rcfw;
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struct bnxt_qplib_pd_tbl pd_tbl;
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struct bnxt_qplib_sgid_tbl sgid_tbl;
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struct bnxt_qplib_pkey_tbl pkey_tbl;
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@ -193,6 +201,11 @@ struct bnxt_qplib_res {
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bool prio;
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};
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static inline bool bnxt_qplib_is_chip_gen_p5(struct bnxt_qplib_chip_ctx *cctx)
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{
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return (cctx->chip_num == CHIP_NUM_57500);
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}
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#define to_bnxt_qplib(ptr, type, member) \
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container_of(ptr, type, member)
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