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Merge branch 'master' of /home/trondmy/kernel/linux-2.6/

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Trond Myklebust 2007-02-13 22:02:32 -08:00
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60
Documentation/i2c/busses/i2c-i801
View File

@ -48,14 +48,9 @@ following:
The SMBus controller is function 3 in device 1f. Class 0c05 is SMBus Serial
Controller.
If you do NOT see the 24x3 device at function 3, and you can't figure out
any way in the BIOS to enable it,
The ICH chips are quite similar to Intel's PIIX4 chip, at least in the
SMBus controller.
See the file i2c-piix4 for some additional information.
Process Call Support
--------------------
@ -74,6 +69,61 @@ SMBus 2.0 Support
The 82801DB (ICH4) and later chips support several SMBus 2.0 features.
Hidden ICH SMBus
----------------
If your system has an Intel ICH south bridge, but you do NOT see the
SMBus device at 00:1f.3 in lspci, and you can't figure out any way in the
BIOS to enable it, it means it has been hidden by the BIOS code. Asus is
well known for first doing this on their P4B motherboard, and many other
boards after that. Some vendor machines are affected as well.
The first thing to try is the "i2c_ec" ACPI driver. It could be that the
SMBus was hidden on purpose because it'll be driven by ACPI. If the
i2c_ec driver works for you, just forget about the i2c-i801 driver and
don't try to unhide the ICH SMBus. Even if i2c_ec doesn't work, you
better make sure that the SMBus isn't used by the ACPI code. Try loading
the "fan" and "thermal" drivers, and check in /proc/acpi/fan and
/proc/acpi/thermal_zone. If you find anything there, it's likely that
the ACPI is accessing the SMBus and it's safer not to unhide it. Only
once you are certain that ACPI isn't using the SMBus, you can attempt
to unhide it.
In order to unhide the SMBus, we need to change the value of a PCI
register before the kernel enumerates the PCI devices. This is done in
drivers/pci/quirks.c, where all affected boards must be listed (see
function asus_hides_smbus_hostbridge.) If the SMBus device is missing,
and you think there's something interesting on the SMBus (e.g. a
hardware monitoring chip), you need to add your board to the list.
The motherboard is identified using the subvendor and subdevice IDs of the
host bridge PCI device. Get yours with "lspci -n -v -s 00:00.0":
00:00.0 Class 0600: 8086:2570 (rev 02)
Subsystem: 1043:80f2
Flags: bus master, fast devsel, latency 0
Memory at fc000000 (32-bit, prefetchable) [size=32M]
Capabilities: [e4] #09 [2106]
Capabilities: [a0] AGP version 3.0
Here the host bridge ID is 2570 (82865G/PE/P), the subvendor ID is 1043
(Asus) and the subdevice ID is 80f2 (P4P800-X). You can find the symbolic
names for the bridge ID and the subvendor ID in include/linux/pci_ids.h,
and then add a case for your subdevice ID at the right place in
drivers/pci/quirks.c. Then please give it very good testing, to make sure
that the unhidden SMBus doesn't conflict with e.g. ACPI.
If it works, proves useful (i.e. there are usable chips on the SMBus)
and seems safe, please submit a patch for inclusion into the kernel.
Note: There's a useful script in lm_sensors 2.10.2 and later, named
unhide_ICH_SMBus (in prog/hotplug), which uses the fakephp driver to
temporarily unhide the SMBus without having to patch and recompile your
kernel. It's very convenient if you just want to check if there's
anything interesting on your hidden ICH SMBus.
**********************
The lm_sensors project gratefully acknowledges the support of Texas
Instruments in the initial development of this driver.

15
Documentation/i2c/busses/i2c-parport
View File

@ -19,6 +19,7 @@ It currently supports the following devices:
* (type=4) Analog Devices ADM1032 evaluation board
* (type=5) Analog Devices evaluation boards: ADM1025, ADM1030, ADM1031
* (type=6) Barco LPT->DVI (K5800236) adapter
* (type=7) One For All JP1 parallel port adapter
These devices use different pinout configurations, so you have to tell
the driver what you have, using the type module parameter. There is no
@ -157,3 +158,17 @@ many more, using /dev/velleman.
http://home.wanadoo.nl/hihihi/libk8005.htm
http://struyve.mine.nu:8080/index.php?block=k8000
http://sourceforge.net/projects/libk8005/
One For All JP1 parallel port adapter
-------------------------------------
The JP1 project revolves around a set of remote controls which expose
the I2C bus their internal configuration EEPROM lives on via a 6 pin
jumper in the battery compartment. More details can be found at:
http://www.hifi-remote.com/jp1/
Details of the simple parallel port hardware can be found at:
http://www.hifi-remote.com/jp1/hardware.shtml

2
Documentation/i2c/busses/i2c-piix4
View File

@ -6,7 +6,7 @@ Supported adapters:
Datasheet: Publicly available at the Intel website
* ServerWorks OSB4, CSB5, CSB6 and HT-1000 southbridges
Datasheet: Only available via NDA from ServerWorks
* ATI IXP southbridges IXP200, IXP300, IXP400
* ATI IXP200, IXP300, IXP400 and SB600 southbridges
Datasheet: Not publicly available
* Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge
Datasheet: Publicly available at the SMSC website http://www.smsc.com

7
Documentation/i2c/busses/i2c-viapro
View File

@ -13,6 +13,9 @@ Supported adapters:
* VIA Technologies, Inc. VT8235, VT8237R, VT8237A, VT8251
Datasheet: available on request and under NDA from VIA
* VIA Technologies, Inc. CX700
Datasheet: available on request and under NDA from VIA
Authors:
Kyösti Mälkki <kmalkki@cc.hut.fi>,
Mark D. Studebaker <mdsxyz123@yahoo.com>,
@ -44,6 +47,7 @@ Your lspci -n listing must show one of these :
device 1106:3227 (VT8237R)
device 1106:3337 (VT8237A)
device 1106:3287 (VT8251)
device 1106:8324 (CX700)
If none of these show up, you should look in the BIOS for settings like
enable ACPI / SMBus or even USB.
@ -51,3 +55,6 @@ enable ACPI / SMBus or even USB.
Except for the oldest chips (VT82C596A/B, VT82C686A and most probably
VT8231), this driver supports I2C block transactions. Such transactions
are mainly useful to read from and write to EEPROMs.
The CX700 additionally appears to support SMBus PEC, although this driver
doesn't implement it yet.

6
Documentation/i2c/porting-clients
View File

@ -129,6 +129,12 @@ Technical changes:
structure, those name member should be initialized to a driver name
string. i2c_driver itself has no name member anymore.
* [Driver model] Instead of shutdown or reboot notifiers, provide a
shutdown() method in your driver.
* [Power management] Use the driver model suspend() and resume()
callbacks instead of the obsolete pm_register() calls.
Coding policy:
* [Copyright] Use (C), not (c), for copyright.

2
Documentation/i2c/smbus-protocol
View File

@ -97,7 +97,7 @@ SMBus Write Word Data
=====================
This is the opposite operation of the Read Word Data command. 16 bits
of data is read from a device, from a designated register that is
of data is written to a device, to the designated register that is
specified through the Comm byte.
S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P

58
Documentation/i2c/writing-clients
View File

@ -21,20 +21,26 @@ The driver structure
Usually, you will implement a single driver structure, and instantiate
all clients from it. Remember, a driver structure contains general access
routines, a client structure specific information like the actual I2C
address.
routines, and should be zero-initialized except for fields with data you
provide. A client structure holds device-specific information like the
driver model device node, and its I2C address.
static struct i2c_driver foo_driver = {
.driver = {
.name = "foo",
},
.attach_adapter = &foo_attach_adapter,
.detach_client = &foo_detach_client,
.command = &foo_command /* may be NULL */
.attach_adapter = foo_attach_adapter,
.detach_client = foo_detach_client,
.shutdown = foo_shutdown, /* optional */
.suspend = foo_suspend, /* optional */
.resume = foo_resume, /* optional */
.command = foo_command, /* optional */
}
The name field must match the driver name, including the case. It must not
contain spaces, and may be up to 31 characters long.
The name field is the driver name, and must not contain spaces. It
should match the module name (if the driver can be compiled as a module),
although you can use MODULE_ALIAS (passing "foo" in this example) to add
another name for the module.
All other fields are for call-back functions which will be explained
below.
@ -43,11 +49,18 @@ below.
Extra client data
=================
The client structure has a special `data' field that can point to any
structure at all. You can use this to keep client-specific data. You
Each client structure has a special `data' field that can point to any
structure at all. You should use this to keep device-specific data,
especially in drivers that handle multiple I2C or SMBUS devices. You
do not always need this, but especially for `sensors' drivers, it can
be very useful.
/* store the value */
void i2c_set_clientdata(struct i2c_client *client, void *data);
/* retrieve the value */
void *i2c_get_clientdata(struct i2c_client *client);
An example structure is below.
struct foo_data {
@ -493,6 +506,33 @@ by `__init_data'. Hose functions and structures can be removed after
kernel booting (or module loading) is completed.
Power Management
================
If your I2C device needs special handling when entering a system low
power state -- like putting a transceiver into a low power mode, or
activating a system wakeup mechanism -- do that in the suspend() method.
The resume() method should reverse what the suspend() method does.
These are standard driver model calls, and they work just like they
would for any other driver stack. The calls can sleep, and can use
I2C messaging to the device being suspended or resumed (since their
parent I2C adapter is active when these calls are issued, and IRQs
are still enabled).
System Shutdown
===============
If your I2C device needs special handling when the system shuts down
or reboots (including kexec) -- like turning something off -- use a
shutdown() method.
Again, this is a standard driver model call, working just like it
would for any other driver stack: the calls can sleep, and can use
I2C messaging.
Command function
================

4
Documentation/powerpc/booting-without-of.txt
View File

@ -1334,6 +1334,9 @@ platforms are moved over to use the flattened-device-tree model.
fsl-usb2-mph compatible controllers. Either this property or
"port0" (or both) must be defined for "fsl-usb2-mph" compatible
controllers.
- dr_mode : indicates the working mode for "fsl-usb2-dr" compatible
controllers. Can be "host", "peripheral", or "otg". Default to
"host" if not defined for backward compatibility.
Recommended properties :
- interrupts : <a b> where a is the interrupt number and b is a
@ -1367,6 +1370,7 @@ platforms are moved over to use the flattened-device-tree model.
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <26 1>;
dr_mode = "otg";
phy = "ulpi";
};

181
Documentation/powerpc/mpc52xx-device-tree-bindings.txt
View File

@ -1,7 +1,7 @@
MPC52xx Device Tree Bindings
MPC5200 Device Tree Bindings
----------------------------
(c) 2006 Secret Lab Technologies Ltd
(c) 2006-2007 Secret Lab Technologies Ltd
Grant Likely <grant.likely at secretlab.ca>
********** DRAFT ***********
@ -20,11 +20,11 @@ described in Documentation/powerpc/booting-without-of.txt), or passed
by Open Firmare (IEEE 1275) compatible firmware using an OF compatible
client interface API.
This document specifies the requirements on the device-tree for mpc52xx
This document specifies the requirements on the device-tree for mpc5200
based boards. These requirements are above and beyond the details
specified in either the OpenFirmware spec or booting-without-of.txt
All new mpc52xx-based boards are expected to match this document. In
All new mpc5200-based boards are expected to match this document. In
cases where this document is not sufficient to support a new board port,
this document should be updated as part of adding the new board support.
@ -32,26 +32,26 @@ II - Philosophy
===============
The core of this document is naming convention. The whole point of
defining this convention is to reduce or eliminate the number of
special cases required to support a 52xx board. If all 52xx boards
follow the same convention, then generic 52xx support code will work
special cases required to support a 5200 board. If all 5200 boards
follow the same convention, then generic 5200 support code will work
rather than coding special cases for each new board.
This section tries to capture the thought process behind why the naming
convention is what it is.
1. Node names
-------------
1. names
---------
There is strong convention/requirements already established for children
of the root node. 'cpus' describes the processor cores, 'memory'
describes memory, and 'chosen' provides boot configuration. Other nodes
are added to describe devices attached to the processor local bus.
Following convention already established with other system-on-chip
processors, MPC52xx boards must have an 'soc5200' node as a child of the
root node.
The soc5200 node holds child nodes for all on chip devices. Child nodes
are typically named after the configured function. ie. the FEC node is
named 'ethernet', and a PSC in uart mode is named 'serial'.
Following convention already established with other system-on-chip
processors, 5200 device trees should use the name 'soc5200' for the
parent node of on chip devices, and the root node should be its parent.
Child nodes are typically named after the configured function. ie.
the FEC node is named 'ethernet', and a PSC in uart mode is named 'serial'.
2. device_type property
-----------------------
@ -66,28 +66,47 @@ exactly.
Since device_type isn't enough to match devices to drivers, there also
needs to be a naming convention for the compatible property. Compatible
is an list of device descriptions sorted from specific to generic. For
the mpc52xx, the required format for each compatible value is
<chip>-<device>[-<mode>]. At the minimum, the list shall contain two
items; the first specifying the exact chip, and the second specifying
mpc52xx for the chip.
the mpc5200, the required format for each compatible value is
<chip>-<device>[-<mode>]. The OS should be able to match a device driver
to the device based solely on the compatible value. If two drivers
match on the compatible list; the 'most compatible' driver should be
selected.
ie. ethernet on mpc5200b: compatible = "mpc5200b-ethernet\0mpc52xx-ethernet"
The split between the MPC5200 and the MPC5200B leaves a bit of a
connundrum. How should the compatible property be set up to provide
maximum compatability information; but still acurately describe the
chip? For the MPC5200; the answer is easy. Most of the SoC devices
originally appeared on the MPC5200. Since they didn't exist anywhere
else; the 5200 compatible properties will contain only one item;
"mpc5200-<device>".
The idea here is that most drivers will match to the most generic field
in the compatible list (mpc52xx-*), but can also test the more specific
field for enabling bug fixes or extra features.
The 5200B is almost the same as the 5200, but not quite. It fixes
silicon bugs and it adds a small number of enhancements. Most of the
devices either provide exactly the same interface as on the 5200. A few
devices have extra functions but still have a backwards compatible mode.
To express this infomation as completely as possible, 5200B device trees
should have two items in the compatible list;
"mpc5200b-<device>\0mpc5200-<device>". It is *strongly* recommended
that 5200B device trees follow this convention (instead of only listing
the base mpc5200 item).
If another chip appear on the market with one of the mpc5200 SoC
devices, then the compatible list should include mpc5200-<device>.
ie. ethernet on mpc5200: compatible = "mpc5200-ethernet"
ethernet on mpc5200b: compatible = "mpc5200b-ethernet\0mpc5200-ethernet"
Modal devices, like PSCs, also append the configured function to the
end of the compatible field. ie. A PSC in i2s mode would specify
"mpc52xx-psc-i2s", not "mpc52xx-i2s". This convention is chosen to
"mpc5200-psc-i2s", not "mpc5200-i2s". This convention is chosen to
avoid naming conflicts with non-psc devices providing the same
function. For example, "mpc52xx-spi" and "mpc52xx-psc-spi" describe
function. For example, "mpc5200-spi" and "mpc5200-psc-spi" describe
the mpc5200 simple spi device and a PSC spi mode respectively.
If the soc device is more generic and present on other SOCs, the
compatible property can specify the more generic device type also.
ie. mscan: compatible = "mpc5200-mscan\0mpc52xx-mscan\0fsl,mscan";
ie. mscan: compatible = "mpc5200-mscan\0fsl,mscan";
At the time of writing, exact chip may be either 'mpc5200' or
'mpc5200b'.
@ -96,7 +115,7 @@ Device drivers should always try to match as generically as possible.
III - Structure
===============
The device tree for an mpc52xx board follows the structure defined in
The device tree for an mpc5200 board follows the structure defined in
booting-without-of.txt with the following additional notes:
0) the root node
@ -115,7 +134,7 @@ Typical memory description node; see booting-without-of.
3) The soc5200 node
-------------------
This node describes the on chip SOC peripherals. Every mpc52xx based
This node describes the on chip SOC peripherals. Every mpc5200 based
board will have this node, and as such there is a common naming
convention for SOC devices.
@ -125,71 +144,111 @@ name type description
device_type string must be "soc"
ranges int should be <0 baseaddr baseaddr+10000>
reg int must be <baseaddr 10000>
compatible string mpc5200: "mpc5200-soc"
mpc5200b: "mpc5200b-soc\0mpc5200-soc"
system-frequency int Fsystem frequency; source of all
other clocks.
bus-frequency int IPB bus frequency in HZ. Clock rate
used by most of the soc devices.
#interrupt-cells int must be <3>.
Recommended properties:
name type description
---- ---- -----------
compatible string should be "<chip>-soc\0mpc52xx-soc"
ie. "mpc5200b-soc\0mpc52xx-soc"
#interrupt-cells int must be <3>. If it is not defined
here then it must be defined in every
soc device node.
bus-frequency int IPB bus frequency in HZ. Clock rate
used by most of the soc devices.
Defining it here avoids needing it
added to every device node.
model string Exact model of the chip;
ie: model="fsl,mpc5200"
revision string Silicon revision of chip
ie: revision="M08A"
The 'model' and 'revision' properties are *strongly* recommended. Having
them presence acts as a bit of a safety net for working around as yet
undiscovered bugs on one version of silicon. For example, device drivers
can use the model and revision properties to decide if a bug fix should
be turned on.
4) soc5200 child nodes
----------------------
Any on chip SOC devices available to Linux must appear as soc5200 child nodes.
Note: in the tables below, '*' matches all <chip> values. ie.
*-pic would translate to "mpc5200-pic\0mpc52xx-pic"
Note: The tables below show the value for the mpc5200. A mpc5200b device
tree should use the "mpc5200b-<device>\0mpc5200-<device> form.
Required soc5200 child nodes:
name device_type compatible Description
---- ----------- ---------- -----------
cdm@<addr> cdm *-cmd Clock Distribution
pic@<addr> interrupt-controller *-pic need an interrupt
cdm@<addr> cdm mpc5200-cmd Clock Distribution
pic@<addr> interrupt-controller mpc5200-pic need an interrupt
controller to boot
bestcomm@<addr> dma-controller *-bestcomm 52xx pic also requires
the bestcomm device
bestcomm@<addr> dma-controller mpc5200-bestcomm 5200 pic also requires
the bestcomm device
Recommended soc5200 child nodes; populate as needed for your board
name device_type compatible Description
---- ----------- ---------- -----------
gpt@<addr> gpt *-gpt General purpose timers
rtc@<addr> rtc *-rtc Real time clock
mscan@<addr> mscan *-mscan CAN bus controller
pci@<addr> pci *-pci PCI bridge
serial@<addr> serial *-psc-uart PSC in serial mode
i2s@<addr> sound *-psc-i2s PSC in i2s mode
ac97@<addr> sound *-psc-ac97 PSC in ac97 mode
spi@<addr> spi *-psc-spi PSC in spi mode
irda@<addr> irda *-psc-irda PSC in IrDA mode
spi@<addr> spi *-spi MPC52xx spi device
ethernet@<addr> network *-fec MPC52xx ethernet device
ata@<addr> ata *-ata IDE ATA interface
i2c@<addr> i2c *-i2c I2C controller
usb@<addr> usb-ohci-be *-ohci,ohci-be USB controller
xlb@<addr> xlb *-xlb XLB arbritrator
name device_type compatible Description
---- ----------- ---------- -----------
gpt@<addr> gpt mpc5200-gpt General purpose timers
rtc@<addr> rtc mpc5200-rtc Real time clock
mscan@<addr> mscan mpc5200-mscan CAN bus controller
pci@<addr> pci mpc5200-pci PCI bridge
serial@<addr> serial mpc5200-psc-uart PSC in serial mode
i2s@<addr> sound mpc5200-psc-i2s PSC in i2s mode
ac97@<addr> sound mpc5200-psc-ac97 PSC in ac97 mode
spi@<addr> spi mpc5200-psc-spi PSC in spi mode
irda@<addr> irda mpc5200-psc-irda PSC in IrDA mode
spi@<addr> spi mpc5200-spi MPC5200 spi device
ethernet@<addr> network mpc5200-fec MPC5200 ethernet device
ata@<addr> ata mpc5200-ata IDE ATA interface
i2c@<addr> i2c mpc5200-i2c I2C controller
usb@<addr> usb-ohci-be mpc5200-ohci,ohci-be USB controller
xlb@<addr> xlb mpc5200-xlb XLB arbritrator
Important child node properties
name type description
---- ---- -----------
cell-index int When multiple devices are present, is the
index of the device in the hardware (ie. There
are 6 PSC on the 5200 numbered PSC1 to PSC6)
PSC1 has 'cell-index = <0>'
PSC4 has 'cell-index = <3>'
5) General Purpose Timer nodes (child of soc5200 node)
On the mpc5200 and 5200b, GPT0 has a watchdog timer function. If the board
design supports the internal wdt, then the device node for GPT0 should
include the empty property 'has-wdt'.
6) PSC nodes (child of soc5200 node)
PSC nodes can define the optional 'port-number' property to force assignment
order of serial ports. For example, PSC5 might be physically connected to
the port labeled 'COM1' and PSC1 wired to 'COM1'. In this case, PSC5 would
have a "port-number = <0>" property, and PSC1 would have "port-number = <1>".
PSC in i2s mode: The mpc5200 and mpc5200b PSCs are not compatible when in
i2s mode. An 'mpc5200b-psc-i2s' node cannot include 'mpc5200-psc-i2s' in the
compatible field.
IV - Extra Notes
================
1. Interrupt mapping
--------------------
The mpc52xx pic driver splits hardware IRQ numbers into two levels. The
The mpc5200 pic driver splits hardware IRQ numbers into two levels. The
split reflects the layout of the PIC hardware itself, which groups
interrupts into one of three groups; CRIT, MAIN or PERP. Also, the
Bestcomm dma engine has it's own set of interrupt sources which are
cascaded off of peripheral interrupt 0, which the driver interprets as a
fourth group, SDMA.
The interrupts property for device nodes using the mpc52xx pic consists
The interrupts property for device nodes using the mpc5200 pic consists
of three cells; <L1 L2 level>
L1 := [CRIT=0, MAIN=1, PERP=2, SDMA=3]
L2 := interrupt number; directly mapped from the value in the
"ICTL PerStat, MainStat, CritStat Encoded Register"
level := [LEVEL_HIGH=0, EDGE_RISING=1, EDGE_FALLING=2, LEVEL_LOW=3]
2. Shared registers
-------------------
Some SoC devices share registers between them. ie. the i2c devices use
a single clock control register, and almost all device are affected by
the port_config register. Devices which need to manipulate shared regs
should look to the parent SoC node. The soc node is responsible
for arbitrating all shared register access.

6
MAINTAINERS
View File

@ -2523,6 +2523,12 @@ M: olof@lixom.net
L: netdev@vger.kernel.org
S: Maintained
PA SEMI SMBUS DRIVER
P: Olof Johansson
M: olof@lixom.net
L: i2c@lm-sensors.org
S: Maintained
PARALLEL PORT SUPPORT
P: Phil Blundell
M: philb@gnu.org

5
arch/mips/Kconfig
View File

@ -598,8 +598,6 @@ config SGI_IP32
select ARC
select ARC32
select BOOT_ELF32
select OWN_DMA
select DMA_IP32
select DMA_NONCOHERENT
select HW_HAS_PCI
select R5000_CPU_SCACHE
@ -883,9 +881,6 @@ config DMA_NONCOHERENT
config DMA_NEED_PCI_MAP_STATE
bool
config OWN_DMA
bool
config EARLY_PRINTK
bool

2
arch/mips/configs/ip27_defconfig
View File

@ -264,7 +264,7 @@ CONFIG_BINFMT_ELF=y
CONFIG_MIPS32_COMPAT=y
CONFIG_COMPAT=y
CONFIG_MIPS32_O32=y
# CONFIG_MIPS32_N32 is not set
CONFIG_MIPS32_N32=y
CONFIG_BINFMT_ELF32=y
#

4
arch/mips/dec/int-handler.S
View File

@ -264,9 +264,6 @@
srlv t3,t1,t2
handle_it:
LONG_L s0, TI_REGS($28)
LONG_S sp, TI_REGS($28)
PTR_LA ra, ret_from_irq
j dec_irq_dispatch
nop
@ -277,7 +274,6 @@ fpu:
#endif
spurious:
PTR_LA ra, _ret_from_irq
j spurious_interrupt
nop
END(plat_irq_dispatch)

19
arch/mips/kernel/entry.S
View File

@ -21,24 +21,21 @@
#endif
#ifndef CONFIG_PREEMPT
.macro preempt_stop
local_irq_disable
.endm
#define resume_kernel restore_all
#else
#define __ret_from_irq ret_from_exception
#endif
.text
.align 5
#ifndef CONFIG_PREEMPT
FEXPORT(ret_from_exception)
local_irq_disable # preempt stop
b __ret_from_irq
#endif
FEXPORT(ret_from_irq)
LONG_S s0, TI_REGS($28)
#ifdef CONFIG_PREEMPT
FEXPORT(ret_from_exception)
#else
b _ret_from_irq
FEXPORT(ret_from_exception)
preempt_stop
#endif
FEXPORT(_ret_from_irq)
FEXPORT(__ret_from_irq)
LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
andi t0, t0, KU_USER
beqz t0, resume_kernel

47
arch/mips/kernel/linux32.c
View File

@ -39,6 +39,7 @@
#include <net/sock.h>
#include <net/scm.h>
#include <asm/compat-signal.h>
#include <asm/ipc.h>
#include <asm/sim.h>
#include <asm/uaccess.h>
@ -736,3 +737,49 @@ _sys32_clone(nabi_no_regargs struct pt_regs regs)
return do_fork(clone_flags, newsp, &regs, 0,
parent_tidptr, child_tidptr);
}
/*
* Implement the event wait interface for the eventpoll file. It is the kernel
* part of the user space epoll_pwait(2).
*/
asmlinkage long compat_sys_epoll_pwait(int epfd,
struct epoll_event __user *events, int maxevents, int timeout,
const compat_sigset_t __user *sigmask, size_t sigsetsize)
{
int error;
sigset_t ksigmask, sigsaved;
/*
* If the caller wants a certain signal mask to be set during the wait,
* we apply it here.
*/
if (sigmask) {
if (sigsetsize != sizeof(sigset_t))
return -EINVAL;
if (!access_ok(VERIFY_READ, sigmask, sizeof(ksigmask)))
return -EFAULT;
if (__copy_conv_sigset_from_user(&ksigmask, sigmask))
return -EFAULT;
sigdelsetmask(&ksigmask, sigmask(SIGKILL) | sigmask(SIGSTOP));
sigprocmask(SIG_SETMASK, &ksigmask, &sigsaved);
}
error = sys_epoll_wait(epfd, events, maxevents, timeout);
/*
* If we changed the signal mask, we need to restore the original one.
* In case we've got a signal while waiting, we do not restore the
* signal mask yet, and we allow do_signal() to deliver the signal on
* the way back to userspace, before the signal mask is restored.
*/
if (sigmask) {
if (error == -EINTR) {
memcpy(&current->saved_sigmask, &sigsaved,
sizeof(sigsaved));
set_thread_flag(TIF_RESTORE_SIGMASK);
} else
sigprocmask(SIG_SETMASK, &sigsaved, NULL);
}
return error;
}

2
arch/mips/kernel/scall64-64.S
View File

@ -470,4 +470,4 @@ sys_call_table:
PTR sys_get_robust_list
PTR sys_kexec_load /* 5270 */
PTR sys_getcpu
PTR sys_epoll_pwait
PTR compat_sys_epoll_pwait

2
arch/mips/kernel/scall64-n32.S
View File

@ -396,4 +396,4 @@ EXPORT(sysn32_call_table)
PTR compat_sys_get_robust_list
PTR compat_sys_kexec_load
PTR sys_getcpu
PTR sys_epoll_pwait
PTR compat_sys_epoll_pwait

32
arch/mips/kernel/signal-common.h
View File

@ -19,37 +19,7 @@
# define DEBUGP(fmt, args...)
#endif
/*
* Horribly complicated - with the bloody RM9000 workarounds enabled
* the signal trampolines is moving to the end of the structure so we can
* increase the alignment without breaking software compatibility.
*/
#if ICACHE_REFILLS_WORKAROUND_WAR == 0
struct sigframe {
u32 sf_ass[4]; /* argument save space for o32 */
u32 sf_code[2]; /* signal trampoline */
struct sigcontext sf_sc;
sigset_t sf_mask;
};
#else /* ICACHE_REFILLS_WORKAROUND_WAR */
struct sigframe {
u32 sf_ass[4]; /* argument save space for o32 */
u32 sf_pad[2];
struct sigcontext sf_sc; /* hw context */
sigset_t sf_mask;
u32 sf_code[8] ____cacheline_aligned; /* signal trampoline */
};
#endif /* !ICACHE_REFILLS_WORKAROUND_WAR */
/*
* handle hardware context
*/
extern int setup_sigcontext(struct pt_regs *, struct sigcontext __user *);
extern int restore_sigcontext(struct pt_regs *, struct sigcontext __user *);
#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
/*
* Determine which stack to use..

22
arch/mips/kernel/signal.c
View File

@ -34,10 +34,20 @@
#include "signal-common.h"
#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
/*
* Horribly complicated - with the bloody RM9000 workarounds enabled
* the signal trampolines is moving to the end of the structure so we can
* increase the alignment without breaking software compatibility.
*/
#if ICACHE_REFILLS_WORKAROUND_WAR == 0
struct sigframe {
u32 sf_ass[4]; /* argument save space for o32 */
u32 sf_code[2]; /* signal trampoline */
struct sigcontext sf_sc;
sigset_t sf_mask;
};
struct rt_sigframe {
u32 rs_ass[4]; /* argument save space for o32 */
u32 rs_code[2]; /* signal trampoline */
@ -47,6 +57,14 @@ struct rt_sigframe {
#else
struct sigframe {
u32 sf_ass[4]; /* argument save space for o32 */
u32 sf_pad[2];
struct sigcontext sf_sc; /* hw context */
sigset_t sf_mask;
u32 sf_code[8] ____cacheline_aligned; /* signal trampoline */
};
struct rt_sigframe {
u32 rs_ass[4]; /* argument save space for o32 */
u32 rs_pad[2];

39
arch/mips/kernel/signal32.c
View File

@ -8,6 +8,7 @@
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
*/
#include <linux/cache.h>
#include <linux/compat.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/smp.h>
@ -24,6 +25,7 @@
#include <asm/abi.h>
#include <asm/asm.h>
#include <asm/compat-signal.h>
#include <linux/bitops.h>
#include <asm/cacheflush.h>
#include <asm/sim.h>
@ -104,8 +106,6 @@ typedef struct compat_siginfo {
#define __NR_O32_rt_sigreturn 4193
#define __NR_O32_restart_syscall 4253
#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
/* 32-bit compatibility types */
#define _NSIG_BPW32 32
@ -139,8 +139,20 @@ struct ucontext32 {
sigset_t32 uc_sigmask; /* mask last for extensibility */
};
/*
* Horribly complicated - with the bloody RM9000 workarounds enabled
* the signal trampolines is moving to the end of the structure so we can
* increase the alignment without breaking software compatibility.
*/
#if ICACHE_REFILLS_WORKAROUND_WAR == 0
struct sigframe32 {
u32 sf_ass[4]; /* argument save space for o32 */
u32 sf_code[2]; /* signal trampoline */
struct sigcontext32 sf_sc;
sigset_t sf_mask;
};
struct rt_sigframe32 {
u32 rs_ass[4]; /* argument save space for o32 */
u32 rs_code[2]; /* signal trampoline */
@ -150,6 +162,14 @@ struct rt_sigframe32 {
#else /* ICACHE_REFILLS_WORKAROUND_WAR */
struct sigframe32 {
u32 sf_ass[4]; /* argument save space for o32 */
u32 sf_pad[2];
struct sigcontext32 sf_sc; /* hw context */
sigset_t sf_mask;
u32 sf_code[8] ____cacheline_aligned; /* signal trampoline */
};
struct rt_sigframe32 {
u32 rs_ass[4]; /* argument save space for o32 */
u32 rs_pad[2];
@ -493,13 +513,13 @@ int copy_siginfo_to_user32(compat_siginfo_t __user *to, siginfo_t *from)
asmlinkage void sys32_sigreturn(nabi_no_regargs struct pt_regs regs)
{
struct sigframe __user *frame;
struct sigframe32 __user *frame;
sigset_t blocked;
frame = (struct sigframe __user *) regs.regs[29];
frame = (struct sigframe32 __user *) regs.regs[29];
if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
goto badframe;
if (__copy_from_user(&blocked, &frame->sf_mask, sizeof(blocked)))
if (__copy_conv_sigset_from_user(&blocked, &frame->sf_mask))
goto badframe;
sigdelsetmask(&blocked, ~_BLOCKABLE);
@ -536,7 +556,7 @@ asmlinkage void sys32_rt_sigreturn(nabi_no_regargs struct pt_regs regs)
frame = (struct rt_sigframe32 __user *) regs.regs[29];
if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
goto badframe;
if (__copy_from_user(&set, &frame->rs_uc.uc_sigmask, sizeof(set)))
if (__copy_conv_sigset_from_user(&set, &frame->rs_uc.uc_sigmask))
goto badframe;
sigdelsetmask(&set, ~_BLOCKABLE);
@ -581,7 +601,7 @@ badframe:
int setup_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
int signr, sigset_t *set)
{
struct sigframe __user *frame;
struct sigframe32 __user *frame;
int err = 0;
frame = get_sigframe(ka, regs, sizeof(*frame));
@ -591,7 +611,8 @@ int setup_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
err |= install_sigtramp(frame->sf_code, __NR_O32_sigreturn);
err |= setup_sigcontext32(regs, &frame->sf_sc);
err |= __copy_to_user(&frame->sf_mask, set, sizeof(*set));
err |= __copy_conv_sigset_to_user(&frame->sf_mask, set);
if (err)
goto give_sigsegv;
@ -650,7 +671,7 @@ int setup_rt_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
err |= __put_user(current->sas_ss_size,
&frame->rs_uc.uc_stack.ss_size);
err |= setup_sigcontext32(regs, &frame->rs_uc.uc_mcontext);
err |= __copy_to_user(&frame->rs_uc.uc_sigmask, set, sizeof(*set));
err |= __copy_conv_sigset_to_user(&frame->rs_uc.uc_sigmask, set);
if (err)
goto give_sigsegv;

11
arch/mips/kernel/signal_n32.c
View File

@ -31,6 +31,7 @@
#include <asm/asm.h>
#include <asm/cacheflush.h>
#include <asm/compat-signal.h>
#include <asm/sim.h>
#include <asm/uaccess.h>
#include <asm/ucontext.h>
@ -47,7 +48,9 @@
#define __NR_N32_rt_sigreturn 6211
#define __NR_N32_restart_syscall 6214
#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
extern int setup_sigcontext(struct pt_regs *, struct sigcontext __user *);
extern int restore_sigcontext(struct pt_regs *, struct sigcontext __user *);
/* IRIX compatible stack_t */
typedef struct sigaltstack32 {
@ -61,7 +64,7 @@ struct ucontextn32 {
s32 uc_link;
stack32_t uc_stack;
struct sigcontext uc_mcontext;
sigset_t uc_sigmask; /* mask last for extensibility */
compat_sigset_t uc_sigmask; /* mask last for extensibility */
};
#if ICACHE_REFILLS_WORKAROUND_WAR == 0
@ -127,7 +130,7 @@ asmlinkage void sysn32_rt_sigreturn(nabi_no_regargs struct pt_regs regs)
frame = (struct rt_sigframe_n32 __user *) regs.regs[29];
if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
goto badframe;
if (__copy_from_user(&set, &frame->rs_uc.uc_sigmask, sizeof(set)))
if (__copy_conv_sigset_from_user(&set, &frame->rs_uc.uc_sigmask))
goto badframe;
sigdelsetmask(&set, ~_BLOCKABLE);
@ -193,7 +196,7 @@ int setup_rt_frame_n32(struct k_sigaction * ka,
err |= __put_user(current->sas_ss_size,
&frame->rs_uc.uc_stack.ss_size);
err |= setup_sigcontext(regs, &frame->rs_uc.uc_mcontext);
err |= __copy_to_user(&frame->rs_uc.uc_sigmask, set, sizeof(*set));
err |= __copy_conv_sigset_to_user(&frame->rs_uc.uc_sigmask, set);
if (err)
goto give_sigsegv;

14
arch/mips/mm/Makefile
View File

@ -2,8 +2,8 @@
# Makefile for the Linux/MIPS-specific parts of the memory manager.
#
obj-y += cache.o extable.o fault.o init.o pgtable.o \
tlbex.o tlbex-fault.o
obj-y += cache.o dma-default.o extable.o fault.o \
init.o pgtable.o tlbex.o tlbex-fault.o
obj-$(CONFIG_32BIT) += ioremap.o pgtable-32.o
obj-$(CONFIG_64BIT) += pgtable-64.o
@ -32,14 +32,4 @@ obj-$(CONFIG_R5000_CPU_SCACHE) += sc-r5k.o
obj-$(CONFIG_RM7000_CPU_SCACHE) += sc-rm7k.o
obj-$(CONFIG_MIPS_CPU_SCACHE) += sc-mips.o
#
# Choose one DMA coherency model
#
ifndef CONFIG_OWN_DMA
obj-$(CONFIG_DMA_COHERENT) += dma-coherent.o
obj-$(CONFIG_DMA_NONCOHERENT) += dma-noncoherent.o
endif
obj-$(CONFIG_DMA_IP27) += dma-ip27.o
obj-$(CONFIG_DMA_IP32) += dma-ip32.o
EXTRA_AFLAGS := $(CFLAGS)

6
arch/mips/mm/c-sb1.c
View File

@ -259,6 +259,12 @@ static void sb1_flush_cache_data_page(unsigned long addr)
on_each_cpu(sb1_flush_cache_data_page_ipi, (void *) addr, 1, 1);
}
#else
static void local_sb1_flush_cache_data_page(unsigned long addr)
{
__sb1_writeback_inv_dcache_range(addr, addr + PAGE_SIZE);
}
void sb1_flush_cache_data_page(unsigned long)
__attribute__((alias("local_sb1_flush_cache_data_page")));
#endif

254
arch/mips/mm/dma-coherent.c
View File

@ -1,254 +0,0 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
* Copyright (C) 2000, 2001 Ralf Baechle <ralf@gnu.org>
* swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
*/
#include <linux/types.h>
#include <linux/dma-mapping.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/string.h>
#include <asm/cache.h>
#include <asm/io.h>
void *dma_alloc_noncoherent(struct device *dev, size_t size,
dma_addr_t * dma_handle, gfp_t gfp)
{
void *ret;
/* ignore region specifiers */
gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff))
gfp |= GFP_DMA;
ret = (void *) __get_free_pages(gfp, get_order(size));
if (ret != NULL) {
memset(ret, 0, size);
*dma_handle = virt_to_phys(ret);
}
return ret;
}
EXPORT_SYMBOL(dma_alloc_noncoherent);
void *dma_alloc_coherent(struct device *dev, size_t size,
dma_addr_t * dma_handle, gfp_t gfp)
__attribute__((alias("dma_alloc_noncoherent")));
EXPORT_SYMBOL(dma_alloc_coherent);
void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
dma_addr_t dma_handle)
{
unsigned long addr = (unsigned long) vaddr;
free_pages(addr, get_order(size));
}
EXPORT_SYMBOL(dma_free_noncoherent);
void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
dma_addr_t dma_handle) __attribute__((alias("dma_free_noncoherent")));
EXPORT_SYMBOL(dma_free_coherent);
dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
return __pa(ptr);
}
EXPORT_SYMBOL(dma_map_single);
void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
EXPORT_SYMBOL(dma_unmap_single);
int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
enum dma_data_direction direction)
{
int i;
BUG_ON(direction == DMA_NONE);
for (i = 0; i < nents; i++, sg++) {
sg->dma_address = (dma_addr_t)page_to_phys(sg->page) + sg->offset;
}
return nents;
}
EXPORT_SYMBOL(dma_map_sg);
dma_addr_t dma_map_page(struct device *dev, struct page *page,
unsigned long offset, size_t size, enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
return page_to_phys(page) + offset;
}
EXPORT_SYMBOL(dma_map_page);
void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
EXPORT_SYMBOL(dma_unmap_page);
void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
EXPORT_SYMBOL(dma_unmap_sg);
void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
size_t size, enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
EXPORT_SYMBOL(dma_sync_single_for_cpu);
void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
size_t size, enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
EXPORT_SYMBOL(dma_sync_single_for_device);
void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
unsigned long offset, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
EXPORT_SYMBOL(dma_sync_single_range_for_cpu);
void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
unsigned long offset, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
EXPORT_SYMBOL(dma_sync_single_range_for_device);
void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
EXPORT_SYMBOL(dma_sync_sg_for_cpu);
void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
EXPORT_SYMBOL(dma_sync_sg_for_device);
int dma_mapping_error(dma_addr_t dma_addr)
{
return 0;
}
EXPORT_SYMBOL(dma_mapping_error);
int dma_supported(struct device *dev, u64 mask)
{
/*
* we fall back to GFP_DMA when the mask isn't all 1s,
* so we can't guarantee allocations that must be
* within a tighter range than GFP_DMA..
*/
if (mask < 0x00ffffff)
return 0;
return 1;
}
EXPORT_SYMBOL(dma_supported);
int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
{
return 1;
}
EXPORT_SYMBOL(dma_is_consistent);
void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
EXPORT_SYMBOL(dma_cache_sync);
/* The DAC routines are a PCIism.. */
#ifdef CONFIG_PCI
#include <linux/pci.h>
dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev,
struct page *page, unsigned long offset, int direction)
{
return (dma64_addr_t)page_to_phys(page) + offset;
}
EXPORT_SYMBOL(pci_dac_page_to_dma);
struct page *pci_dac_dma_to_page(struct pci_dev *pdev,
dma64_addr_t dma_addr)
{
return mem_map + (dma_addr >> PAGE_SHIFT);
}
EXPORT_SYMBOL(pci_dac_dma_to_page);
unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev,
dma64_addr_t dma_addr)
{
return dma_addr & ~PAGE_MASK;
}
EXPORT_SYMBOL(pci_dac_dma_to_offset);
void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev,
dma64_addr_t dma_addr, size_t len, int direction)
{
BUG_ON(direction == PCI_DMA_NONE);
}
EXPORT_SYMBOL(pci_dac_dma_sync_single_for_cpu);
void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev,
dma64_addr_t dma_addr, size_t len, int direction)
{
BUG_ON(direction == PCI_DMA_NONE);
}
EXPORT_SYMBOL(pci_dac_dma_sync_single_for_device);
#endif /* CONFIG_PCI */

209
arch/mips/mm/dma-noncoherent.c → arch/mips/mm/dma-default.c
View File

@ -4,28 +4,39 @@
* for more details.
*
* Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
* Copyright (C) 2000, 2001 Ralf Baechle <ralf@gnu.org>
* Copyright (C) 2000, 2001, 06 Ralf Baechle <ralf@linux-mips.org>
* swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
*/
#include <linux/types.h>
#include <linux/dma-mapping.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/dma-mapping.h>
#include <asm/cache.h>
#include <asm/io.h>
#include <dma-coherence.h>
/*
* Warning on the terminology - Linux calls an uncached area coherent;
* MIPS terminology calls memory areas with hardware maintained coherency
* coherent.
*/
static inline int cpu_is_noncoherent_r10000(struct device *dev)
{
return !plat_device_is_coherent(dev) &&
(current_cpu_data.cputype == CPU_R10000 &&
current_cpu_data.cputype == CPU_R12000);
}
void *dma_alloc_noncoherent(struct device *dev, size_t size,
dma_addr_t * dma_handle, gfp_t gfp)
{
void *ret;
/* ignore region specifiers */
gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
@ -35,7 +46,7 @@ void *dma_alloc_noncoherent(struct device *dev, size_t size,
if (ret != NULL) {
memset(ret, 0, size);
*dma_handle = virt_to_phys(ret);
*dma_handle = plat_map_dma_mem(dev, ret, size);
}
return ret;
@ -48,10 +59,21 @@ void *dma_alloc_coherent(struct device *dev, size_t size,
{
void *ret;
ret = dma_alloc_noncoherent(dev, size, dma_handle, gfp);
/* ignore region specifiers */
gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff))
gfp |= GFP_DMA;
ret = (void *) __get_free_pages(gfp, get_order(size));
if (ret) {
dma_cache_wback_inv((unsigned long) ret, size);
ret = UNCAC_ADDR(ret);
memset(ret, 0, size);
*dma_handle = plat_map_dma_mem(dev, ret, size);
if (!plat_device_is_coherent(dev)) {
dma_cache_wback_inv((unsigned long) ret, size);
ret = UNCAC_ADDR(ret);
}
}
return ret;
@ -72,7 +94,9 @@ void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
{
unsigned long addr = (unsigned long) vaddr;
addr = CAC_ADDR(addr);
if (!plat_device_is_coherent(dev))
addr = CAC_ADDR(addr);
free_pages(addr, get_order(size));
}
@ -104,9 +128,10 @@ dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
{
unsigned long addr = (unsigned long) ptr;
__dma_sync(addr, size, direction);
if (!plat_device_is_coherent(dev))
__dma_sync(addr, size, direction);
return virt_to_phys(ptr);
return plat_map_dma_mem(dev, ptr, size);
}
EXPORT_SYMBOL(dma_map_single);
@ -114,10 +139,11 @@ EXPORT_SYMBOL(dma_map_single);
void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
enum dma_data_direction direction)
{
unsigned long addr;
addr = dma_addr + PAGE_OFFSET;
if (cpu_is_noncoherent_r10000(dev))
__dma_sync(plat_dma_addr_to_phys(dma_addr) + PAGE_OFFSET, size,
direction);
//__dma_sync(addr, size, direction);
plat_unmap_dma_mem(dma_addr);
}
EXPORT_SYMBOL(dma_unmap_single);
@ -133,11 +159,10 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
unsigned long addr;
addr = (unsigned long) page_address(sg->page);
if (addr) {
if (!plat_device_is_coherent(dev) && addr)
__dma_sync(addr + sg->offset, sg->length, direction);
sg->dma_address = (dma_addr_t)page_to_phys(sg->page)
+ sg->offset;
}
sg->dma_address = plat_map_dma_mem_page(dev, sg->page) +
sg->offset;
}
return nents;
@ -148,14 +173,16 @@ EXPORT_SYMBOL(dma_map_sg);
dma_addr_t dma_map_page(struct device *dev, struct page *page,
unsigned long offset, size_t size, enum dma_data_direction direction)
{
unsigned long addr;
BUG_ON(direction == DMA_NONE);
addr = (unsigned long) page_address(page) + offset;
dma_cache_wback_inv(addr, size);
if (!plat_device_is_coherent(dev)) {
unsigned long addr;
return page_to_phys(page) + offset;
addr = (unsigned long) page_address(page) + offset;
dma_cache_wback_inv(addr, size);
}
return plat_map_dma_mem_page(dev, page) + offset;
}
EXPORT_SYMBOL(dma_map_page);
@ -165,12 +192,14 @@ void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
{
BUG_ON(direction == DMA_NONE);
if (direction != DMA_TO_DEVICE) {
if (!plat_device_is_coherent(dev) && direction != DMA_TO_DEVICE) {
unsigned long addr;
addr = dma_address + PAGE_OFFSET;
addr = plat_dma_addr_to_phys(dma_address);
dma_cache_wback_inv(addr, size);
}
plat_unmap_dma_mem(dma_address);
}
EXPORT_SYMBOL(dma_unmap_page);
@ -183,13 +212,15 @@ void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
BUG_ON(direction == DMA_NONE);
if (direction == DMA_TO_DEVICE)
return;
for (i = 0; i < nhwentries; i++, sg++) {
addr = (unsigned long) page_address(sg->page);
if (addr)
__dma_sync(addr + sg->offset, sg->length, direction);
if (!plat_device_is_coherent(dev) &&
direction != DMA_TO_DEVICE) {
addr = (unsigned long) page_address(sg->page);
if (addr)
__dma_sync(addr + sg->offset, sg->length,
direction);
}
plat_unmap_dma_mem(sg->dma_address);
}
}
@ -198,12 +229,14 @@ EXPORT_SYMBOL(dma_unmap_sg);
void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
size_t size, enum dma_data_direction direction)
{
unsigned long addr;
BUG_ON(direction == DMA_NONE);
addr = dma_handle + PAGE_OFFSET;
__dma_sync(addr, size, direction);
if (cpu_is_noncoherent_r10000(dev)) {
unsigned long addr;
addr = PAGE_OFFSET + plat_dma_addr_to_phys(dma_handle);
__dma_sync(addr, size, direction);
}
}
EXPORT_SYMBOL(dma_sync_single_for_cpu);
@ -211,12 +244,14 @@ EXPORT_SYMBOL(dma_sync_single_for_cpu);
void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
size_t size, enum dma_data_direction direction)
{
unsigned long addr;
BUG_ON(direction == DMA_NONE);
addr = dma_handle + PAGE_OFFSET;
__dma_sync(addr, size, direction);
if (cpu_is_noncoherent_r10000(dev)) {
unsigned long addr;
addr = plat_dma_addr_to_phys(dma_handle);
__dma_sync(addr, size, direction);
}
}
EXPORT_SYMBOL(dma_sync_single_for_device);
@ -224,12 +259,14 @@ EXPORT_SYMBOL(dma_sync_single_for_device);
void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
unsigned long offset, size_t size, enum dma_data_direction direction)
{
unsigned long addr;
BUG_ON(direction == DMA_NONE);
addr = dma_handle + offset + PAGE_OFFSET;
__dma_sync(addr, size, direction);
if (cpu_is_noncoherent_r10000(dev)) {
unsigned long addr;
addr = PAGE_OFFSET + plat_dma_addr_to_phys(dma_handle);
__dma_sync(addr + offset, size, direction);
}
}
EXPORT_SYMBOL(dma_sync_single_range_for_cpu);
@ -237,12 +274,14 @@ EXPORT_SYMBOL(dma_sync_single_range_for_cpu);
void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
unsigned long offset, size_t size, enum dma_data_direction direction)
{
unsigned long addr;
BUG_ON(direction == DMA_NONE);
addr = dma_handle + offset + PAGE_OFFSET;
__dma_sync(addr, size, direction);
if (cpu_is_noncoherent_r10000(dev)) {
unsigned long addr;
addr = PAGE_OFFSET + plat_dma_addr_to_phys(dma_handle);
__dma_sync(addr + offset, size, direction);
}
}
EXPORT_SYMBOL(dma_sync_single_range_for_device);
@ -255,9 +294,12 @@ void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
BUG_ON(direction == DMA_NONE);
/* Make sure that gcc doesn't leave the empty loop body. */
for (i = 0; i < nelems; i++, sg++)
__dma_sync((unsigned long)page_address(sg->page),
sg->length, direction);
for (i = 0; i < nelems; i++, sg++) {
if (!plat_device_is_coherent(dev))
__dma_sync((unsigned long)page_address(sg->page),
sg->length, direction);
plat_unmap_dma_mem(sg->dma_address);
}
}
EXPORT_SYMBOL(dma_sync_sg_for_cpu);
@ -270,9 +312,12 @@ void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nele
BUG_ON(direction == DMA_NONE);
/* Make sure that gcc doesn't leave the empty loop body. */
for (i = 0; i < nelems; i++, sg++)
__dma_sync((unsigned long)page_address(sg->page),
sg->length, direction);
for (i = 0; i < nelems; i++, sg++) {
if (!plat_device_is_coherent(dev))
__dma_sync((unsigned long)page_address(sg->page),
sg->length, direction);
plat_unmap_dma_mem(sg->dma_address);
}
}
EXPORT_SYMBOL(dma_sync_sg_for_device);
@ -301,70 +346,18 @@ EXPORT_SYMBOL(dma_supported);
int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
{
return 1;
return plat_device_is_coherent(dev);
}
EXPORT_SYMBOL(dma_is_consistent);
void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
enum dma_data_direction direction)
enum dma_data_direction direction)
{
if (direction == DMA_NONE)
return;
BUG_ON(direction == DMA_NONE);
dma_cache_wback_inv((unsigned long)vaddr, size);
if (!plat_device_is_coherent(dev))
dma_cache_wback_inv((unsigned long)vaddr, size);
}
EXPORT_SYMBOL(dma_cache_sync);
/* The DAC routines are a PCIism.. */
#ifdef CONFIG_PCI
#include <linux/pci.h>
dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev,
struct page *page, unsigned long offset, int direction)
{
return (dma64_addr_t)page_to_phys(page) + offset;
}
EXPORT_SYMBOL(pci_dac_page_to_dma);
struct page *pci_dac_dma_to_page(struct pci_dev *pdev,
dma64_addr_t dma_addr)
{
return mem_map + (dma_addr >> PAGE_SHIFT);
}
EXPORT_SYMBOL(pci_dac_dma_to_page);
unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev,
dma64_addr_t dma_addr)
{
return dma_addr & ~PAGE_MASK;
}
EXPORT_SYMBOL(pci_dac_dma_to_offset);
void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev,
dma64_addr_t dma_addr, size_t len, int direction)
{
BUG_ON(direction == PCI_DMA_NONE);
dma_cache_wback_inv(dma_addr + PAGE_OFFSET, len);
}
EXPORT_SYMBOL(pci_dac_dma_sync_single_for_cpu);
void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev,
dma64_addr_t dma_addr, size_t len, int direction)
{
BUG_ON(direction == PCI_DMA_NONE);
dma_cache_wback_inv(dma_addr + PAGE_OFFSET, len);
}
EXPORT_SYMBOL(pci_dac_dma_sync_single_for_device);
#endif /* CONFIG_PCI */

257
arch/mips/mm/dma-ip27.c
View File

@ -1,257 +0,0 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
* Copyright (C) 2000, 2001 Ralf Baechle <ralf@gnu.org>
* swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
*/
#include <linux/types.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/pci.h>
#include <asm/cache.h>
#include <asm/pci/bridge.h>
#define pdev_to_baddr(pdev, addr) \
(BRIDGE_CONTROLLER(pdev->bus)->baddr + (addr))
#define dev_to_baddr(dev, addr) \
pdev_to_baddr(to_pci_dev(dev), (addr))
void *dma_alloc_noncoherent(struct device *dev, size_t size,
dma_addr_t * dma_handle, gfp_t gfp)
{
void *ret;
/* ignore region specifiers */
gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff))
gfp |= GFP_DMA;
ret = (void *) __get_free_pages(gfp, get_order(size));
if (ret != NULL) {
memset(ret, 0, size);
*dma_handle = dev_to_baddr(dev, virt_to_phys(ret));
}
return ret;
}
EXPORT_SYMBOL(dma_alloc_noncoherent);
void *dma_alloc_coherent(struct device *dev, size_t size,
dma_addr_t * dma_handle, gfp_t gfp)
__attribute__((alias("dma_alloc_noncoherent")));
EXPORT_SYMBOL(dma_alloc_coherent);
void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
dma_addr_t dma_handle)
{
unsigned long addr = (unsigned long) vaddr;
free_pages(addr, get_order(size));
}
EXPORT_SYMBOL(dma_free_noncoherent);
void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
dma_addr_t dma_handle) __attribute__((alias("dma_free_noncoherent")));
EXPORT_SYMBOL(dma_free_coherent);
dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
return dev_to_baddr(dev, __pa(ptr));
}
EXPORT_SYMBOL(dma_map_single);
void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
EXPORT_SYMBOL(dma_unmap_single);
int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
enum dma_data_direction direction)
{
int i;
BUG_ON(direction == DMA_NONE);
for (i = 0; i < nents; i++, sg++) {
sg->dma_address = (dma_addr_t) dev_to_baddr(dev,
page_to_phys(sg->page) + sg->offset);
}
return nents;
}
EXPORT_SYMBOL(dma_map_sg);
dma_addr_t dma_map_page(struct device *dev, struct page *page,
unsigned long offset, size_t size, enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
return dev_to_baddr(dev, page_to_phys(page) + offset);
}
EXPORT_SYMBOL(dma_map_page);
void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
EXPORT_SYMBOL(dma_unmap_page);
void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
EXPORT_SYMBOL(dma_unmap_sg);
void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
EXPORT_SYMBOL(dma_sync_single_for_cpu);
void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
EXPORT_SYMBOL(dma_sync_single_for_device);
void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
unsigned long offset, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
EXPORT_SYMBOL(dma_sync_single_range_for_cpu);
void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
unsigned long offset, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
EXPORT_SYMBOL(dma_sync_single_range_for_device);
void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
EXPORT_SYMBOL(dma_sync_sg_for_cpu);
void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
EXPORT_SYMBOL(dma_sync_sg_for_device);
int dma_mapping_error(dma_addr_t dma_addr)
{
return 0;
}
EXPORT_SYMBOL(dma_mapping_error);
int dma_supported(struct device *dev, u64 mask)
{
/*
* we fall back to GFP_DMA when the mask isn't all 1s,
* so we can't guarantee allocations that must be
* within a tighter range than GFP_DMA..
*/
if (mask < 0x00ffffff)
return 0;
return 1;
}
EXPORT_SYMBOL(dma_supported);
int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
{
return 1;
}
EXPORT_SYMBOL(dma_is_consistent);
void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
EXPORT_SYMBOL(dma_cache_sync);
dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev,
struct page *page, unsigned long offset, int direction)
{
dma64_addr_t addr = page_to_phys(page) + offset;
return (dma64_addr_t) pdev_to_baddr(pdev, addr);
}
EXPORT_SYMBOL(pci_dac_page_to_dma);
struct page *pci_dac_dma_to_page(struct pci_dev *pdev,
dma64_addr_t dma_addr)
{
struct bridge_controller *bc = BRIDGE_CONTROLLER(pdev->bus);
return pfn_to_page((dma_addr - bc->baddr) >> PAGE_SHIFT);
}
EXPORT_SYMBOL(pci_dac_dma_to_page);
unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev,
dma64_addr_t dma_addr)
{
return dma_addr & ~PAGE_MASK;
}
EXPORT_SYMBOL(pci_dac_dma_to_offset);
void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev,
dma64_addr_t dma_addr, size_t len, int direction)
{
BUG_ON(direction == PCI_DMA_NONE);
}
EXPORT_SYMBOL(pci_dac_dma_sync_single_for_cpu);
void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev,
dma64_addr_t dma_addr, size_t len, int direction)
{
BUG_ON(direction == PCI_DMA_NONE);
}
EXPORT_SYMBOL(pci_dac_dma_sync_single_for_device);

383
arch/mips/mm/dma-ip32.c
View File

@ -1,383 +0,0 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
* Copyright (C) 2000, 2001 Ralf Baechle <ralf@gnu.org>
* Copyright (C) 2005 Ilya A. Volynets-Evenbakh <ilya@total-knowledge.com>
* swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
* IP32 changes by Ilya.
*/
#include <linux/types.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/dma-mapping.h>
#include <asm/cache.h>
#include <asm/io.h>
#include <asm/ip32/crime.h>
/*
* Warning on the terminology - Linux calls an uncached area coherent;
* MIPS terminology calls memory areas with hardware maintained coherency
* coherent.
*/
/*
* Few notes.
* 1. CPU sees memory as two chunks: 0-256M@0x0, and the rest @0x40000000+256M
* 2. PCI sees memory as one big chunk @0x0 (or we could use 0x40000000 for native-endian)
* 3. All other devices see memory as one big chunk at 0x40000000
* 4. Non-PCI devices will pass NULL as struct device*
* Thus we translate differently, depending on device.
*/
#define RAM_OFFSET_MASK 0x3fffffff
void *dma_alloc_noncoherent(struct device *dev, size_t size,
dma_addr_t * dma_handle, gfp_t gfp)
{
void *ret;
/* ignore region specifiers */
gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff))
gfp |= GFP_DMA;
ret = (void *) __get_free_pages(gfp, get_order(size));
if (ret != NULL) {
unsigned long addr = virt_to_phys(ret)&RAM_OFFSET_MASK;
memset(ret, 0, size);
if(dev==NULL)
addr+= CRIME_HI_MEM_BASE;
*dma_handle = addr;
}
return ret;
}
EXPORT_SYMBOL(dma_alloc_noncoherent);
void *dma_alloc_coherent(struct device *dev, size_t size,
dma_addr_t * dma_handle, gfp_t gfp)
{
void *ret;
ret = dma_alloc_noncoherent(dev, size, dma_handle, gfp);
if (ret) {
dma_cache_wback_inv((unsigned long) ret, size);
ret = UNCAC_ADDR(ret);
}
return ret;
}
EXPORT_SYMBOL(dma_alloc_coherent);
void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
dma_addr_t dma_handle)
{
free_pages((unsigned long) vaddr, get_order(size));
}
EXPORT_SYMBOL(dma_free_noncoherent);
void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
dma_addr_t dma_handle)
{
unsigned long addr = (unsigned long) vaddr;
addr = CAC_ADDR(addr);
free_pages(addr, get_order(size));
}
EXPORT_SYMBOL(dma_free_coherent);
static inline void __dma_sync(unsigned long addr, size_t size,
enum dma_data_direction direction)
{
switch (direction) {
case DMA_TO_DEVICE:
dma_cache_wback(addr, size);
break;
case DMA_FROM_DEVICE:
dma_cache_inv(addr, size);
break;
case DMA_BIDIRECTIONAL:
dma_cache_wback_inv(addr, size);
break;
default:
BUG();
}
}
dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
enum dma_data_direction direction)
{
unsigned long addr = (unsigned long) ptr;
switch (direction) {
case DMA_TO_DEVICE:
dma_cache_wback(addr, size);
break;
case DMA_FROM_DEVICE:
dma_cache_inv(addr, size);
break;
case DMA_BIDIRECTIONAL:
dma_cache_wback_inv(addr, size);
break;
default:
BUG();
}
addr = virt_to_phys(ptr)&RAM_OFFSET_MASK;
if(dev == NULL)
addr+=CRIME_HI_MEM_BASE;
return (dma_addr_t)addr;
}
EXPORT_SYMBOL(dma_map_single);
void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
enum dma_data_direction direction)
{
switch (direction) {
case DMA_TO_DEVICE:
break;
case DMA_FROM_DEVICE:
break;
case DMA_BIDIRECTIONAL:
break;
default:
BUG();
}
}
EXPORT_SYMBOL(dma_unmap_single);
int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
enum dma_data_direction direction)
{
int i;
BUG_ON(direction == DMA_NONE);
for (i = 0; i < nents; i++, sg++) {
unsigned long addr;
addr = (unsigned long) page_address(sg->page)+sg->offset;
if (addr)
__dma_sync(addr, sg->length, direction);
addr = __pa(addr)&RAM_OFFSET_MASK;
if(dev == NULL)
addr += CRIME_HI_MEM_BASE;
sg->dma_address = (dma_addr_t)addr;
}
return nents;
}
EXPORT_SYMBOL(dma_map_sg);
dma_addr_t dma_map_page(struct device *dev, struct page *page,
unsigned long offset, size_t size, enum dma_data_direction direction)
{
unsigned long addr;
BUG_ON(direction == DMA_NONE);
addr = (unsigned long) page_address(page) + offset;
dma_cache_wback_inv(addr, size);
addr = __pa(addr)&RAM_OFFSET_MASK;
if(dev == NULL)
addr += CRIME_HI_MEM_BASE;
return (dma_addr_t)addr;
}
EXPORT_SYMBOL(dma_map_page);
void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
if (direction != DMA_TO_DEVICE) {
unsigned long addr;
dma_address&=RAM_OFFSET_MASK;
addr = dma_address + PAGE_OFFSET;
if(dma_address>=256*1024*1024)
addr+=CRIME_HI_MEM_BASE;
dma_cache_wback_inv(addr, size);
}
}
EXPORT_SYMBOL(dma_unmap_page);
void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
enum dma_data_direction direction)
{
unsigned long addr;
int i;
BUG_ON(direction == DMA_NONE);
if (direction == DMA_TO_DEVICE)
return;
for (i = 0; i < nhwentries; i++, sg++) {
addr = (unsigned long) page_address(sg->page);
if (!addr)
continue;
dma_cache_wback_inv(addr + sg->offset, sg->length);
}
}
EXPORT_SYMBOL(dma_unmap_sg);
void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
size_t size, enum dma_data_direction direction)
{
unsigned long addr;
BUG_ON(direction == DMA_NONE);
dma_handle&=RAM_OFFSET_MASK;
addr = dma_handle + PAGE_OFFSET;
if(dma_handle>=256*1024*1024)
addr+=CRIME_HI_MEM_BASE;
__dma_sync(addr, size, direction);
}
EXPORT_SYMBOL(dma_sync_single_for_cpu);
void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
size_t size, enum dma_data_direction direction)
{
unsigned long addr;
BUG_ON(direction == DMA_NONE);
dma_handle&=RAM_OFFSET_MASK;
addr = dma_handle + PAGE_OFFSET;
if(dma_handle>=256*1024*1024)
addr+=CRIME_HI_MEM_BASE;
__dma_sync(addr, size, direction);
}
EXPORT_SYMBOL(dma_sync_single_for_device);
void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
unsigned long offset, size_t size, enum dma_data_direction direction)
{
unsigned long addr;
BUG_ON(direction == DMA_NONE);
dma_handle&=RAM_OFFSET_MASK;
addr = dma_handle + offset + PAGE_OFFSET;
if(dma_handle>=256*1024*1024)
addr+=CRIME_HI_MEM_BASE;
__dma_sync(addr, size, direction);
}
EXPORT_SYMBOL(dma_sync_single_range_for_cpu);
void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
unsigned long offset, size_t size, enum dma_data_direction direction)
{
unsigned long addr;
BUG_ON(direction == DMA_NONE);
dma_handle&=RAM_OFFSET_MASK;
addr = dma_handle + offset + PAGE_OFFSET;
if(dma_handle>=256*1024*1024)
addr+=CRIME_HI_MEM_BASE;
__dma_sync(addr, size, direction);
}
EXPORT_SYMBOL(dma_sync_single_range_for_device);
void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
enum dma_data_direction direction)
{
int i;
BUG_ON(direction == DMA_NONE);
/* Make sure that gcc doesn't leave the empty loop body. */
for (i = 0; i < nelems; i++, sg++)
__dma_sync((unsigned long)page_address(sg->page),
sg->length, direction);
}
EXPORT_SYMBOL(dma_sync_sg_for_cpu);
void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
enum dma_data_direction direction)
{
int i;
BUG_ON(direction == DMA_NONE);
/* Make sure that gcc doesn't leave the empty loop body. */
for (i = 0; i < nelems; i++, sg++)
__dma_sync((unsigned long)page_address(sg->page),
sg->length, direction);
}
EXPORT_SYMBOL(dma_sync_sg_for_device);
int dma_mapping_error(dma_addr_t dma_addr)
{
return 0;
}
EXPORT_SYMBOL(dma_mapping_error);
int dma_supported(struct device *dev, u64 mask)
{
/*
* we fall back to GFP_DMA when the mask isn't all 1s,
* so we can't guarantee allocations that must be
* within a tighter range than GFP_DMA..
*/
if (mask < 0x00ffffff)
return 0;
return 1;
}
EXPORT_SYMBOL(dma_supported);
int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
{
return 1;
}
EXPORT_SYMBOL(dma_is_consistent);
void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
enum dma_data_direction direction)
{
if (direction == DMA_NONE)
return;
dma_cache_wback_inv((unsigned long)vaddr, size);
}
EXPORT_SYMBOL(dma_cache_sync);

2
arch/mips/pci/Makefile
View File

@ -2,7 +2,7 @@
# Makefile for the PCI specific kernel interface routines under Linux.
#
obj-y += pci.o
obj-y += pci.o pci-dac.o
#
# PCI bus host bridge specific code

79
arch/mips/pci/pci-dac.c Normal file
View File

@ -0,0 +1,79 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
* Copyright (C) 2000, 2001, 06 Ralf Baechle <ralf@linux-mips.org>
* swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
*/
#include <linux/types.h>
#include <linux/dma-mapping.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/string.h>
#include <asm/cache.h>
#include <asm/io.h>
#include <dma-coherence.h>
#include <linux/pci.h>
dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev,
struct page *page, unsigned long offset, int direction)
{
struct device *dev = &pdev->dev;
BUG_ON(direction == DMA_NONE);
if (!plat_device_is_coherent(dev)) {
unsigned long addr;
addr = (unsigned long) page_address(page) + offset;
dma_cache_wback_inv(addr, PAGE_SIZE);
}
return plat_map_dma_mem_page(dev, page) + offset;
}
EXPORT_SYMBOL(pci_dac_page_to_dma);
struct page *pci_dac_dma_to_page(struct pci_dev *pdev,
dma64_addr_t dma_addr)
{
return pfn_to_page(plat_dma_addr_to_phys(dma_addr) >> PAGE_SHIFT);
}
EXPORT_SYMBOL(pci_dac_dma_to_page);
unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev,
dma64_addr_t dma_addr)
{
return dma_addr & ~PAGE_MASK;
}
EXPORT_SYMBOL(pci_dac_dma_to_offset);
void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev,
dma64_addr_t dma_addr, size_t len, int direction)
{
BUG_ON(direction == PCI_DMA_NONE);
if (!plat_device_is_coherent(&pdev->dev))
dma_cache_wback_inv(dma_addr + PAGE_OFFSET, len);
}
EXPORT_SYMBOL(pci_dac_dma_sync_single_for_cpu);
void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev,
dma64_addr_t dma_addr, size_t len, int direction)
{
BUG_ON(direction == PCI_DMA_NONE);
if (!plat_device_is_coherent(&pdev->dev))
dma_cache_wback_inv(dma_addr + PAGE_OFFSET, len);
}
EXPORT_SYMBOL(pci_dac_dma_sync_single_for_device);

2
arch/powerpc/Kconfig
View File

@ -876,7 +876,7 @@ config ARCH_SPARSEMEM_ENABLE
config ARCH_SPARSEMEM_DEFAULT
def_bool y
depends on (SMP && PPC_PSERIES) || PPC_CELL
depends on (SMP && PPC_PSERIES) || PPC_PS3
config ARCH_POPULATES_NODE_MAP
def_bool y

148
arch/powerpc/boot/dts/kuroboxHD.dts Normal file
View File

@ -0,0 +1,148 @@
/*
* Device Tree Souce for Buffalo KuroboxHD
*
* Choose CONFIG_LINKSTATION to build a kernel for KuroboxHD, or use
* the default configuration linkstation_defconfig.
*
* Based on sandpoint.dts
*
* 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
*
* This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
XXXX add flash parts, rtc, ??
build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
*/
/ {
linux,phandle = <1000>;
model = "KuroboxHD";
compatible = "linkstation";
#address-cells = <1>;
#size-cells = <1>;
cpus {
linux,phandle = <2000>;
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
PowerPC,603e { /* Really 8241 */
linux,phandle = <2100>;
linux,boot-cpu;
device_type = "cpu";
reg = <0>;
clock-frequency = <bebc200>; /* Fixed by bootwrapper */
timebase-frequency = <1743000>; /* Fixed by bootwrapper */
bus-frequency = <0>; /* From bootloader */
/* Following required by dtc but not used */
i-cache-line-size = <0>;
d-cache-line-size = <0>;
i-cache-size = <4000>;
d-cache-size = <4000>;
};
};
memory {
linux,phandle = <3000>;
device_type = "memory";
reg = <00000000 04000000>;
};
soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
linux,phandle = <4000>;
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
device_type = "soc";
compatible = "mpc10x";
store-gathering = <0>; /* 0 == off, !0 == on */
reg = <80000000 00100000>;
ranges = <80000000 80000000 70000000 /* pci mem space */
fc000000 fc000000 00100000 /* EUMB */
fe000000 fe000000 00c00000 /* pci i/o space */
fec00000 fec00000 00300000 /* pci cfg regs */
fef00000 fef00000 00100000>; /* pci iack */
i2c@80003000 {
linux,phandle = <4300>;
device_type = "i2c";
compatible = "fsl-i2c";
reg = <80003000 1000>;
interrupts = <5 2>;
interrupt-parent = <4400>;
};
serial@80004500 {
linux,phandle = <4511>;
device_type = "serial";
compatible = "ns16550";
reg = <80004500 8>;
clock-frequency = <5d08d88>;
current-speed = <2580>;
interrupts = <9 2>;
interrupt-parent = <4400>;
};
serial@80004600 {
linux,phandle = <4512>;
device_type = "serial";
compatible = "ns16550";
reg = <80004600 8>;
clock-frequency = <5d08d88>;
current-speed = <e100>;
interrupts = <a 0>;
interrupt-parent = <4400>;
};
pic@80040000 {
linux,phandle = <4400>;
#interrupt-cells = <2>;
#address-cells = <0>;
device_type = "open-pic";
compatible = "chrp,open-pic";
interrupt-controller;
reg = <80040000 40000>;
built-in;
};
pci@fec00000 {
linux,phandle = <4500>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
device_type = "pci";
compatible = "mpc10x-pci";
reg = <fec00000 400000>;
ranges = <01000000 0 0 fe000000 0 00c00000
02000000 0 80000000 80000000 0 70000000>;
bus-range = <0 ff>;
clock-frequency = <7f28155>;
interrupt-parent = <4400>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x11 - IRQ0 ETH */
5800 0 0 1 4400 0 1
5800 0 0 2 4400 1 1
5800 0 0 3 4400 2 1
5800 0 0 4 4400 3 1
/* IDSEL 0x12 - IRQ1 IDE0 */
6000 0 0 1 4400 1 1
6000 0 0 2 4400 2 1
6000 0 0 3 4400 3 1
6000 0 0 4 4400 0 1
/* IDSEL 0x14 - IRQ3 USB2.0 */
7000 0 0 1 4400 3 1
7000 0 0 2 4400 3 1
7000 0 0 3 4400 3 1
7000 0 0 4 4400 3 1
>;
};
};
};

135
arch/powerpc/boot/dts/lite5200.dts
View File

@ -1,7 +1,7 @@
/*
* Lite5200 board Device Tree Source
*
* Copyright 2006 Secret Lab Technologies Ltd.
* Copyright 2006-2007 Secret Lab Technologies Ltd.
* Grant Likely <grant.likely@secretlab.ca>
*
* This program is free software; you can redistribute it and/or modify it
@ -17,8 +17,9 @@
*/
/ {
model = "Lite5200";
compatible = "lite5200\0lite52xx\0mpc5200\0mpc52xx";
model = "fsl,lite5200";
// revision = "1.0";
compatible = "fsl,lite5200\0generic-mpc5200";
#address-cells = <1>;
#size-cells = <1>;
@ -47,14 +48,17 @@
};
soc5200@f0000000 {
model = "fsl,mpc5200";
revision = "" // from bootloader
#interrupt-cells = <3>;
device_type = "soc";
ranges = <0 f0000000 f0010000>;
reg = <f0000000 00010000>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
compatible = "mpc5200-cdm\0mpc52xx-cdm";
compatible = "mpc5200-cdm";
reg = <200 38>;
};
@ -64,77 +68,86 @@
interrupt-controller;
#interrupt-cells = <3>;
device_type = "interrupt-controller";
compatible = "mpc5200-pic\0mpc52xx-pic";
compatible = "mpc5200-pic";
reg = <500 80>;
built-in;
};
gpt@600 { // General Purpose Timer
compatible = "mpc5200-gpt\0mpc52xx-gpt";
compatible = "mpc5200-gpt";
device_type = "gpt";
cell-index = <0>;
reg = <600 10>;
interrupts = <1 9 0>;
interrupt-parent = <500>;
has-wdt;
};
gpt@610 { // General Purpose Timer
compatible = "mpc5200-gpt\0mpc52xx-gpt";
compatible = "mpc5200-gpt";
device_type = "gpt";
cell-index = <1>;
reg = <610 10>;
interrupts = <1 a 0>;
interrupt-parent = <500>;
};
gpt@620 { // General Purpose Timer
compatible = "mpc5200-gpt\0mpc52xx-gpt";
compatible = "mpc5200-gpt";
device_type = "gpt";
cell-index = <2>;
reg = <620 10>;
interrupts = <1 b 0>;
interrupt-parent = <500>;
};
gpt@630 { // General Purpose Timer
compatible = "mpc5200-gpt\0mpc52xx-gpt";
compatible = "mpc5200-gpt";
device_type = "gpt";
cell-index = <3>;
reg = <630 10>;
interrupts = <1 c 0>;
interrupt-parent = <500>;
};
gpt@640 { // General Purpose Timer
compatible = "mpc5200-gpt\0mpc52xx-gpt";
compatible = "mpc5200-gpt";
device_type = "gpt";
cell-index = <4>;
reg = <640 10>;
interrupts = <1 d 0>;
interrupt-parent = <500>;
};
gpt@650 { // General Purpose Timer
compatible = "mpc5200-gpt\0mpc52xx-gpt";
compatible = "mpc5200-gpt";
device_type = "gpt";
cell-index = <5>;
reg = <650 10>;
interrupts = <1 e 0>;
interrupt-parent = <500>;
};
gpt@660 { // General Purpose Timer
compatible = "mpc5200-gpt\0mpc52xx-gpt";
compatible = "mpc5200-gpt";
device_type = "gpt";
cell-index = <6>;
reg = <660 10>;
interrupts = <1 f 0>;
interrupt-parent = <500>;
};
gpt@670 { // General Purpose Timer
compatible = "mpc5200-gpt\0mpc52xx-gpt";
compatible = "mpc5200-gpt";
device_type = "gpt";
cell-index = <7>;
reg = <670 10>;
interrupts = <1 10 0>;
interrupt-parent = <500>;
};
rtc@800 { // Real time clock
compatible = "mpc5200-rtc\0mpc52xx-rtc";
compatible = "mpc5200-rtc";
device_type = "rtc";
reg = <800 100>;
interrupts = <1 5 0 1 6 0>;
@ -143,7 +156,8 @@
mscan@900 {
device_type = "mscan";
compatible = "mpc5200-mscan\0mpc52xx-mscan";
compatible = "mpc5200-mscan";
cell-index = <0>;
interrupts = <2 11 0>;
interrupt-parent = <500>;
reg = <900 80>;
@ -151,21 +165,22 @@
mscan@980 {
device_type = "mscan";
compatible = "mpc5200-mscan\0mpc52xx-mscan";
compatible = "mpc5200-mscan";
cell-index = <1>;
interrupts = <1 12 0>;
interrupt-parent = <500>;
reg = <980 80>;
};
gpio@b00 {
compatible = "mpc5200-gpio\0mpc52xx-gpio";
compatible = "mpc5200-gpio";
reg = <b00 40>;
interrupts = <1 7 0>;
interrupt-parent = <500>;
};
gpio-wkup@b00 {
compatible = "mpc5200-gpio-wkup\0mpc52xx-gpio-wkup";
compatible = "mpc5200-gpio-wkup";
reg = <c00 40>;
interrupts = <1 8 0 0 3 0>;
interrupt-parent = <500>;
@ -176,7 +191,7 @@
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
compatible = "mpc5200-pci\0mpc52xx-pci";
compatible = "mpc5200-pci";
reg = <d00 100>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <c000 0 0 1 500 0 0 3
@ -194,7 +209,7 @@
spi@f00 {
device_type = "spi";
compatible = "mpc5200-spi\0mpc52xx-spi";
compatible = "mpc5200-spi";
reg = <f00 20>;
interrupts = <2 d 0 2 e 0>;
interrupt-parent = <500>;
@ -202,7 +217,7 @@
usb@1000 {
device_type = "usb-ohci-be";
compatible = "mpc5200-ohci\0mpc52xx-ohci\0ohci-be";
compatible = "mpc5200-ohci\0ohci-be";
reg = <1000 ff>;
interrupts = <2 6 0>;
interrupt-parent = <500>;
@ -210,7 +225,7 @@
bestcomm@1200 {
device_type = "dma-controller";
compatible = "mpc5200-bestcomm\0mpc52xx-bestcomm";
compatible = "mpc5200-bestcomm";
reg = <1200 80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
@ -220,67 +235,73 @@
};
xlb@1f00 {
compatible = "mpc5200-xlb\0mpc52xx-xlb";
compatible = "mpc5200-xlb";
reg = <1f00 100>;
};
serial@2000 { // PSC1
device_type = "serial";
compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart";
compatible = "mpc5200-psc-uart";
port-number = <0>; // Logical port assignment
cell-index = <0>;
reg = <2000 100>;
interrupts = <2 1 0>;
interrupt-parent = <500>;
};
// PSC2 in spi mode example
spi@2200 { // PSC2
device_type = "spi";
compatible = "mpc5200-psc-spi\0mpc52xx-psc-spi";
reg = <2200 100>;
interrupts = <2 2 0>;
interrupt-parent = <500>;
};
// PSC2 in ac97 mode example
//ac97@2200 { // PSC2
// device_type = "sound";
// compatible = "mpc5200-psc-ac97";
// cell-index = <1>;
// reg = <2200 100>;
// interrupts = <2 2 0>;
// interrupt-parent = <500>;
//};
// PSC3 in CODEC mode example
i2s@2400 { // PSC3
device_type = "sound";
compatible = "mpc5200-psc-i2s\0mpc52xx-psc-i2s";
reg = <2400 100>;
interrupts = <2 3 0>;
interrupt-parent = <500>;
};
//i2s@2400 { // PSC3
// device_type = "sound";
// compatible = "mpc5200-psc-i2s";
// cell-index = <2>;
// reg = <2400 100>;
// interrupts = <2 3 0>;
// interrupt-parent = <500>;
//};
// PSC4 unconfigured
// PSC4 in uart mode example
//serial@2600 { // PSC4
// device_type = "serial";
// compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart";
// compatible = "mpc5200-psc-uart";
// cell-index = <3>;
// reg = <2600 100>;
// interrupts = <2 b 0>;
// interrupt-parent = <500>;
//};
// PSC5 unconfigured
// PSC5 in uart mode example
//serial@2800 { // PSC5
// device_type = "serial";
// compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart";
// compatible = "mpc5200-psc-uart";
// cell-index = <4>;
// reg = <2800 100>;
// interrupts = <2 c 0>;
// interrupt-parent = <500>;
//};
// PSC6 in AC97 mode example
ac97@2c00 { // PSC6
device_type = "sound";
compatible = "mpc5200-psc-ac97\0mpc52xx-psc-ac97";
reg = <2c00 100>;
interrupts = <2 4 0>;
interrupt-parent = <500>;
};
// PSC6 in spi mode example
//spi@2c00 { // PSC6
// device_type = "spi";
// compatible = "mpc5200-psc-spi";
// cell-index = <5>;
// reg = <2c00 100>;
// interrupts = <2 4 0>;
// interrupt-parent = <500>;
//};
ethernet@3000 {
device_type = "network";
compatible = "mpc5200-fec\0mpc52xx-fec";
compatible = "mpc5200-fec";
reg = <3000 800>;
mac-address = [ 02 03 04 05 06 07 ]; // Bad!
interrupts = <2 5 0>;
@ -289,7 +310,7 @@
ata@3a00 {
device_type = "ata";
compatible = "mpc5200-ata\0mpc52xx-ata";
compatible = "mpc5200-ata";
reg = <3a00 100>;
interrupts = <2 7 0>;
interrupt-parent = <500>;
@ -297,7 +318,8 @@
i2c@3d00 {
device_type = "i2c";
compatible = "mpc5200-i2c\0mpc52xx-i2c";
compatible = "mpc5200-i2c";
cell-index = <0>;
reg = <3d00 40>;
interrupts = <2 f 0>;
interrupt-parent = <500>;
@ -305,14 +327,15 @@
i2c@3d40 {
device_type = "i2c";
compatible = "mpc5200-i2c\0mpc52xx-i2c";
compatible = "mpc5200-i2c";
cell-index = <1>;
reg = <3d40 40>;
interrupts = <2 10 0>;
interrupt-parent = <500>;
};
sram@8000 {
device_type = "sram";
compatible = "mpc5200-sram\0mpc52xx-sram\0sram";
compatible = "mpc5200-sram\0sram";
reg = <8000 4000>;
};
};

135
arch/powerpc/boot/dts/lite5200b.dts
View File

@ -1,7 +1,7 @@
/*
* Lite5200B board Device Tree Source
*
* Copyright 2006 Secret Lab Technologies Ltd.
* Copyright 2006-2007 Secret Lab Technologies Ltd.
* Grant Likely <grant.likely@secretlab.ca>
*
* This program is free software; you can redistribute it and/or modify it
@ -17,8 +17,9 @@
*/
/ {
model = "Lite5200b";
compatible = "lite5200b\0lite52xx\0mpc5200b\0mpc52xx";
model = "fsl,lite5200b";
// revision = "1.0";
compatible = "fsl,lite5200b\0generic-mpc5200";
#address-cells = <1>;
#size-cells = <1>;
@ -47,14 +48,17 @@
};
soc5200@f0000000 {
model = "fsl,mpc5200b";
revision = ""; // from bootloader
#interrupt-cells = <3>;
device_type = "soc";
ranges = <0 f0000000 f0010000>;
reg = <f0000000 00010000>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
compatible = "mpc5200b-cdm\0mpc52xx-cdm";
compatible = "mpc5200b-cdm\0mpc5200-cdm";
reg = <200 38>;
};
@ -64,77 +68,86 @@
interrupt-controller;
#interrupt-cells = <3>;
device_type = "interrupt-controller";
compatible = "mpc5200b-pic\0mpc52xx-pic";
compatible = "mpc5200b-pic\0mpc5200-pic";
reg = <500 80>;
built-in;
};
gpt@600 { // General Purpose Timer
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
cell-index = <0>;
reg = <600 10>;
interrupts = <1 9 0>;
interrupt-parent = <500>;
has-wdt;
};
gpt@610 { // General Purpose Timer
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
cell-index = <1>;
reg = <610 10>;
interrupts = <1 a 0>;
interrupt-parent = <500>;
};
gpt@620 { // General Purpose Timer
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
cell-index = <2>;
reg = <620 10>;
interrupts = <1 b 0>;
interrupt-parent = <500>;
};
gpt@630 { // General Purpose Timer
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
cell-index = <3>;
reg = <630 10>;
interrupts = <1 c 0>;
interrupt-parent = <500>;
};
gpt@640 { // General Purpose Timer
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
cell-index = <4>;
reg = <640 10>;
interrupts = <1 d 0>;
interrupt-parent = <500>;
};
gpt@650 { // General Purpose Timer
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
cell-index = <5>;
reg = <650 10>;
interrupts = <1 e 0>;
interrupt-parent = <500>;
};
gpt@660 { // General Purpose Timer
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
cell-index = <6>;
reg = <660 10>;
interrupts = <1 f 0>;
interrupt-parent = <500>;
};
gpt@670 { // General Purpose Timer
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
cell-index = <7>;
reg = <670 10>;
interrupts = <1 10 0>;
interrupt-parent = <500>;
};
rtc@800 { // Real time clock
compatible = "mpc5200b-rtc\0mpc52xx-rtc";
compatible = "mpc5200b-rtc\0mpc5200-rtc";
device_type = "rtc";
reg = <800 100>;
interrupts = <1 5 0 1 6 0>;
@ -143,7 +156,8 @@
mscan@900 {
device_type = "mscan";
compatible = "mpc5200b-mscan\0mpc52xx-mscan";
compatible = "mpc5200b-mscan\0mpc5200-mscan";
cell-index = <0>;
interrupts = <2 11 0>;
interrupt-parent = <500>;
reg = <900 80>;
@ -151,21 +165,22 @@
mscan@980 {
device_type = "mscan";
compatible = "mpc5200b-mscan\0mpc52xx-mscan";
compatible = "mpc5200b-mscan\0mpc5200-mscan";
cell-index = <1>;
interrupts = <1 12 0>;
interrupt-parent = <500>;
reg = <980 80>;
};
gpio@b00 {
compatible = "mpc5200b-gpio\0mpc52xx-gpio";
compatible = "mpc5200b-gpio\0mpc5200-gpio";
reg = <b00 40>;
interrupts = <1 7 0>;
interrupt-parent = <500>;
};
gpio-wkup@b00 {
compatible = "mpc5200b-gpio-wkup\0mpc52xx-gpio-wkup";
compatible = "mpc5200b-gpio-wkup\0mpc5200-gpio-wkup";
reg = <c00 40>;
interrupts = <1 8 0 0 3 0>;
interrupt-parent = <500>;
@ -176,7 +191,7 @@
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
compatible = "mpc5200b-pci\0mpc52xx-pci";
compatible = "mpc5200b-pci\0mpc5200-pci";
reg = <d00 100>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <c000 0 0 1 500 0 0 3 // 1st slot
@ -199,7 +214,7 @@
spi@f00 {
device_type = "spi";
compatible = "mpc5200b-spi\0mpc52xx-spi";
compatible = "mpc5200b-spi\0mpc5200-spi";
reg = <f00 20>;
interrupts = <2 d 0 2 e 0>;
interrupt-parent = <500>;
@ -207,7 +222,7 @@
usb@1000 {
device_type = "usb-ohci-be";
compatible = "mpc5200b-ohci\0mpc52xx-ohci\0ohci-be";
compatible = "mpc5200b-ohci\0mpc5200-ohci\0ohci-be";
reg = <1000 ff>;
interrupts = <2 6 0>;
interrupt-parent = <500>;
@ -215,7 +230,7 @@
bestcomm@1200 {
device_type = "dma-controller";
compatible = "mpc5200b-bestcomm\0mpc52xx-bestcomm";
compatible = "mpc5200b-bestcomm\0mpc5200-bestcomm";
reg = <1200 80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
@ -225,67 +240,73 @@
};
xlb@1f00 {
compatible = "mpc5200b-xlb\0mpc52xx-xlb";
compatible = "mpc5200b-xlb\0mpc5200-xlb";
reg = <1f00 100>;
};
serial@2000 { // PSC1
device_type = "serial";
compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart";
compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
port-number = <0>; // Logical port assignment
cell-index = <0>;
reg = <2000 100>;
interrupts = <2 1 0>;
interrupt-parent = <500>;
};
// PSC2 in spi mode example
spi@2200 { // PSC2
device_type = "spi";
compatible = "mpc5200b-psc-spi\0mpc52xx-psc-spi";
reg = <2200 100>;
interrupts = <2 2 0>;
interrupt-parent = <500>;
};
// PSC2 in ac97 mode example
//ac97@2200 { // PSC2
// device_type = "sound";
// compatible = "mpc5200b-psc-ac97\0mpc5200-psc-ac97";
// cell-index = <1>;
// reg = <2200 100>;
// interrupts = <2 2 0>;
// interrupt-parent = <500>;
//};
// PSC3 in CODEC mode example
i2s@2400 { // PSC3
device_type = "sound";
compatible = "mpc5200b-psc-i2s\0mpc52xx-psc-i2s";
reg = <2400 100>;
interrupts = <2 3 0>;
interrupt-parent = <500>;
};
//i2s@2400 { // PSC3
// device_type = "sound";
// compatible = "mpc5200b-psc-i2s"; //not 5200 compatible
// cell-index = <2>;
// reg = <2400 100>;
// interrupts = <2 3 0>;
// interrupt-parent = <500>;
//};
// PSC4 unconfigured
// PSC4 in uart mode example
//serial@2600 { // PSC4
// device_type = "serial";
// compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart";
// compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
// cell-index = <3>;
// reg = <2600 100>;
// interrupts = <2 b 0>;
// interrupt-parent = <500>;
//};
// PSC5 unconfigured
// PSC5 in uart mode example
//serial@2800 { // PSC5
// device_type = "serial";
// compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart";
// compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
// cell-index = <4>;
// reg = <2800 100>;
// interrupts = <2 c 0>;
// interrupt-parent = <500>;
//};
// PSC6 in AC97 mode example
ac97@2c00 { // PSC6
device_type = "sound";
compatible = "mpc5200b-psc-ac97\0mpc52xx-psc-ac97";
reg = <2c00 100>;
interrupts = <2 4 0>;
interrupt-parent = <500>;
};
// PSC6 in spi mode example
//spi@2c00 { // PSC6
// device_type = "spi";
// compatible = "mpc5200b-psc-spi\0mpc5200-psc-spi";
// cell-index = <5>;
// reg = <2c00 100>;
// interrupts = <2 4 0>;
// interrupt-parent = <500>;
//};
ethernet@3000 {
device_type = "network";
compatible = "mpc5200b-fec\0mpc52xx-fec";
compatible = "mpc5200b-fec\0mpc5200-fec";
reg = <3000 800>;
mac-address = [ 02 03 04 05 06 07 ]; // Bad!
interrupts = <2 5 0>;
@ -294,7 +315,7 @@
ata@3a00 {
device_type = "ata";
compatible = "mpc5200b-ata\0mpc52xx-ata";
compatible = "mpc5200b-ata\0mpc5200-ata";
reg = <3a00 100>;
interrupts = <2 7 0>;
interrupt-parent = <500>;
@ -302,7 +323,8 @@
i2c@3d00 {
device_type = "i2c";
compatible = "mpc5200b-i2c\0mpc52xx-i2c";
compatible = "mpc5200b-i2c\0mpc5200-i2c";
cell-index = <0>;
reg = <3d00 40>;
interrupts = <2 f 0>;
interrupt-parent = <500>;
@ -310,14 +332,15 @@
i2c@3d40 {
device_type = "i2c";
compatible = "mpc5200b-i2c\0mpc52xx-i2c";
compatible = "mpc5200b-i2c\0mpc5200-i2c";
cell-index = <1>;
reg = <3d40 40>;
interrupts = <2 10 0>;
interrupt-parent = <500>;
};
sram@8000 {
device_type = "sram";
compatible = "mpc5200b-sram\0mpc52xx-sram\0sram";
compatible = "mpc5200b-sram\0mpc5200-sram\0sram";
reg = <8000 4000>;
};
};

219
arch/powerpc/boot/dts/mpc8313erdb.dts Normal file
View File

@ -0,0 +1,219 @@
/*
* MPC8313E RDB Device Tree Source
*
* Copyright 2005, 2006, 2007 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/ {
model = "MPC8313ERDB";
compatible = "MPC83xx";
#address-cells = <1>;
#size-cells = <1>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
PowerPC,8313@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <20>; // 32 bytes
i-cache-line-size = <20>; // 32 bytes
d-cache-size = <4000>; // L1, 16K
i-cache-size = <4000>; // L1, 16K
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
32-bit;
};
};
memory {
device_type = "memory";
reg = <00000000 08000000>; // 128MB at 0
};
soc8313@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
device_type = "soc";
ranges = <0 e0000000 00100000>;
reg = <e0000000 00000200>;
bus-frequency = <0>;
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
reg = <200 100>;
};
i2c@3000 {
device_type = "i2c";
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
interrupt-parent = <700>;
dfsrr;
};
i2c@3100 {
device_type = "i2c";
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
interrupt-parent = <700>;
dfsrr;
};
spi@7000 {
device_type = "spi";
compatible = "mpc83xx_spi";
reg = <7000 1000>;
interrupts = <10 8>;
interrupt-parent = <700>;
mode = <0>;
};
/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
usb@23000 {
device_type = "usb";
compatible = "fsl-usb2-dr";
reg = <23000 1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <26 2>;
phy_type = "utmi_wide";
};
mdio@24520 {
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <24520>;
ethernet-phy@1 {
linux,phandle = <2452001>;
interrupt-parent = <700>;
interrupts = <13 2>;
reg = <1>;
device_type = "ethernet-phy";
};
ethernet-phy@4 {
linux,phandle = <2452004>;
interrupt-parent = <700>;
interrupts = <14 2>;
reg = <4>;
device_type = "ethernet-phy";
};
};
ethernet@24000 {
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <24000 1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <25 8 24 8 23 8>;
interrupt-parent = <700>;
phy-handle = <2452001>;
};
ethernet@25000 {
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <25000 1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <22 8 21 8 20 8>;
interrupt-parent = <700>;
phy-handle = <2452004>;
};
serial@4500 {
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>;
clock-frequency = <0>;
interrupts = <9 8>;
interrupt-parent = <700>;
};
serial@4600 {
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>;
clock-frequency = <0>;
interrupts = <a 8>;
interrupt-parent = <700>;
};
pci@8500 {
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0E -mini PCI */
7000 0 0 1 700 12 8
7000 0 0 2 700 12 8
7000 0 0 3 700 12 8
7000 0 0 4 700 12 8
/* IDSEL 0x0F - PCI slot */
7800 0 0 1 700 11 8
7800 0 0 2 700 12 8
7800 0 0 3 700 11 8
7800 0 0 4 700 12 8>;
interrupt-parent = <700>;
interrupts = <42 8>;
bus-range = <0 0>;
ranges = <02000000 0 90000000 90000000 0 10000000
42000000 0 80000000 80000000 0 10000000
01000000 0 00000000 e2000000 0 00100000>;
clock-frequency = <3f940aa>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <8500 100>;
compatible = "83xx";
device_type = "pci";
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
reg = <30000 7000>;
interrupts = <b 8>;
interrupt-parent = <700>;
/* Rev. 2.2 */
num-channels = <1>;
channel-fifo-len = <18>;
exec-units-mask = <0000004c>;
descriptor-types-mask = <0122003f>;
};
/* IPIC
* interrupts cell = <intr #, sense>
* sense values match linux IORESOURCE_IRQ_* defines:
* sense == 8: Level, low assertion
* sense == 2: Edge, high-to-low change
*/
pic@700 {
linux,phandle = <700>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <700 100>;
built-in;
device_type = "ipic";
};
};
};

187
arch/powerpc/boot/dts/mpc8349emitxgp.dts Normal file
View File

@ -0,0 +1,187 @@
/*
* MPC8349E-mITX-GP Device Tree Source
*
* Copyright 2007 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/ {
model = "MPC8349EMITXGP";
compatible = "MPC834xMITXGP";
#address-cells = <1>;
#size-cells = <1>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
PowerPC,8349@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <20>;
i-cache-line-size = <20>;
d-cache-size = <8000>;
i-cache-size = <8000>;
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
32-bit;
};
};
memory {
device_type = "memory";
reg = <00000000 10000000>;
};
soc8349@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
device_type = "soc";
ranges = <0 e0000000 00100000>;
reg = <e0000000 00000200>;
bus-frequency = <0>; // from bootloader
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
reg = <200 100>;
};
i2c@3000 {
device_type = "i2c";
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
interrupt-parent = <700>;
dfsrr;
};
i2c@3100 {
device_type = "i2c";
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
interrupt-parent = <700>;
dfsrr;
};
spi@7000 {
device_type = "spi";
compatible = "mpc83xx_spi";
reg = <7000 1000>;
interrupts = <10 8>;
interrupt-parent = <700>;
mode = <0>;
};
usb@23000 {
device_type = "usb";
compatible = "fsl-usb2-dr";
reg = <23000 1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <26 2>;
dr_mode = "otg";
phy_type = "ulpi";
};
mdio@24520 {
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <24520>;
/* Vitesse 8201 */
ethernet-phy@1c {
linux,phandle = <245201c>;
interrupt-parent = <700>;
interrupts = <12 2>;
reg = <1c>;
device_type = "ethernet-phy";
};
};
ethernet@24000 {
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <24000 1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <20 8 21 8 22 8>;
interrupt-parent = <700>;
phy-handle = <245201c>;
};
serial@4500 {
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>;
clock-frequency = <0>; // from bootloader
interrupts = <9 8>;
interrupt-parent = <700>;
};
serial@4600 {
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>;
clock-frequency = <0>; // from bootloader
interrupts = <a 8>;
interrupt-parent = <700>;
};
pci@8600 {
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0F - PCI Slot */
7800 0 0 1 700 14 8 /* PCI_INTA */
7800 0 0 2 700 15 8 /* PCI_INTB */
>;
interrupt-parent = <700>;
interrupts = <43 8>;
bus-range = <1 1>;
ranges = <42000000 0 a0000000 a0000000 0 10000000
02000000 0 b0000000 b0000000 0 10000000
01000000 0 00000000 e3000000 0 01000000>;
clock-frequency = <3f940aa>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <8600 100>;
compatible = "83xx";
device_type = "pci";
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
reg = <30000 10000>;
interrupts = <b 8>;
interrupt-parent = <700>;
num-channels = <4>;
channel-fifo-len = <18>;
exec-units-mask = <0000007e>;
descriptor-types-mask = <01010ebf>;
};
pic@700 {
linux,phandle = <700>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <700 100>;
built-in;
device_type = "ipic";
};
};
};

6
arch/powerpc/boot/dts/mpc8349emds.dts → arch/powerpc/boot/dts/mpc834x_mds.dts
View File

@ -39,6 +39,11 @@
reg = <00000000 10000000>; // 256MB at 0
};
bcsr@e2400000 {
device_type = "board-control";
reg = <e2400000 8000>;
};
soc8349@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
@ -103,6 +108,7 @@
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <26 2>;
dr_mode = "otg";
phy_type = "ulpi";
};

380
arch/powerpc/boot/dts/mpc8568mds.dts Normal file
View File

@ -0,0 +1,380 @@
/*
* MPC8568E MDS Device Tree Source
*
* Copyright 2007 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/*
/memreserve/ 00000000 1000000;
*/
/ {
model = "MPC8568EMDS";
compatible = "MPC85xxMDS";
#address-cells = <1>;
#size-cells = <1>;
linux,phandle = <100>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <200>;
PowerPC,8568@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <20>; // 32 bytes
i-cache-line-size = <20>; // 32 bytes
d-cache-size = <8000>; // L1, 32K
i-cache-size = <8000>; // L1, 32K
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
32-bit;
linux,phandle = <201>;
};
};
memory {
device_type = "memory";
linux,phandle = <300>;
reg = <00000000 10000000>;
};
bcsr@f8000000 {
device_type = "board-control";
reg = <f8000000 8000>;
};
soc8568@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
device_type = "soc";
ranges = <0 e0000000 00100000>;
reg = <e0000000 00100000>;
bus-frequency = <0>;
i2c@3000 {
device_type = "i2c";
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <1b 2>;
interrupt-parent = <40000>;
dfsrr;
};
i2c@3100 {
device_type = "i2c";
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <1b 2>;
interrupt-parent = <40000>;
dfsrr;
};
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
linux,phandle = <24520>;
ethernet-phy@0 {
linux,phandle = <2452000>;
interrupt-parent = <40000>;
interrupts = <31 1>;
reg = <0>;
device_type = "ethernet-phy";
};
ethernet-phy@1 {
linux,phandle = <2452001>;
interrupt-parent = <40000>;
interrupts = <32 1>;
reg = <1>;
device_type = "ethernet-phy";
};
ethernet-phy@2 {
linux,phandle = <2452002>;
interrupt-parent = <40000>;
interrupts = <31 1>;
reg = <2>;
device_type = "ethernet-phy";
};
ethernet-phy@3 {
linux,phandle = <2452003>;
interrupt-parent = <40000>;
interrupts = <32 1>;
reg = <3>;
device_type = "ethernet-phy";
};
};
ethernet@24000 {
#address-cells = <1>;
#size-cells = <0>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <24000 1000>;
mac-address = [ 00 00 00 00 00 00 ];
interrupts = <d 2 e 2 12 2>;
interrupt-parent = <40000>;
phy-handle = <2452002>;
};
ethernet@25000 {
#address-cells = <1>;
#size-cells = <0>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <25000 1000>;
mac-address = [ 00 00 00 00 00 00];
interrupts = <13 2 14 2 18 2>;
interrupt-parent = <40000>;
phy-handle = <2452003>;
};
serial@4500 {
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>;
clock-frequency = <0>;
interrupts = <1a 2>;
interrupt-parent = <40000>;
};
serial@4600 {
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>;
clock-frequency = <0>;
interrupts = <1a 2>;
interrupt-parent = <40000>;
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
reg = <30000 f000>;
interrupts = <1d 2>;
interrupt-parent = <40000>;
num-channels = <4>;
channel-fifo-len = <18>;
exec-units-mask = <000000fe>;
descriptor-types-mask = <012b0ebf>;
};
pic@40000 {
linux,phandle = <40000>;
clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <40000 40000>;
built-in;
compatible = "chrp,open-pic";
device_type = "open-pic";
big-endian;
};
par_io@e0100 {
reg = <e0100 100>;
device_type = "par_io";
num-ports = <7>;
ucc_pin@01 {
linux,phandle = <e010001>;
pio-map = <
/* port pin dir open_drain assignment has_irq */
4 0a 1 0 2 0 /* TxD0 */
4 09 1 0 2 0 /* TxD1 */
4 08 1 0 2 0 /* TxD2 */
4 07 1 0 2 0 /* TxD3 */
4 17 1 0 2 0 /* TxD4 */
4 16 1 0 2 0 /* TxD5 */
4 15 1 0 2 0 /* TxD6 */
4 14 1 0 2 0 /* TxD7 */
4 0f 2 0 2 0 /* RxD0 */
4 0e 2 0 2 0 /* RxD1 */
4 0d 2 0 2 0 /* RxD2 */
4 0c 2 0 2 0 /* RxD3 */
4 1d 2 0 2 0 /* RxD4 */
4 1c 2 0 2 0 /* RxD5 */
4 1b 2 0 2 0 /* RxD6 */
4 1a 2 0 2 0 /* RxD7 */
4 0b 1 0 2 0 /* TX_EN */
4 18 1 0 2 0 /* TX_ER */
4 0f 2 0 2 0 /* RX_DV */
4 1e 2 0 2 0 /* RX_ER */
4 11 2 0 2 0 /* RX_CLK */
4 13 1 0 2 0 /* GTX_CLK */
1 1f 2 0 3 0>; /* GTX125 */
};
ucc_pin@02 {
linux,phandle = <e010002>;
pio-map = <
/* port pin dir open_drain assignment has_irq */
5 0a 1 0 2 0 /* TxD0 */
5 09 1 0 2 0 /* TxD1 */
5 08 1 0 2 0 /* TxD2 */
5 07 1 0 2 0 /* TxD3 */
5 17 1 0 2 0 /* TxD4 */
5 16 1 0 2 0 /* TxD5 */
5 15 1 0 2 0 /* TxD6 */
5 14 1 0 2 0 /* TxD7 */
5 0f 2 0 2 0 /* RxD0 */
5 0e 2 0 2 0 /* RxD1 */
5 0d 2 0 2 0 /* RxD2 */
5 0c 2 0 2 0 /* RxD3 */
5 1d 2 0 2 0 /* RxD4 */
5 1c 2 0 2 0 /* RxD5 */
5 1b 2 0 2 0 /* RxD6 */
5 1a 2 0 2 0 /* RxD7 */
5 0b 1 0 2 0 /* TX_EN */
5 18 1 0 2 0 /* TX_ER */
5 10 2 0 2 0 /* RX_DV */
5 1e 2 0 2 0 /* RX_ER */
5 11 2 0 2 0 /* RX_CLK */
5 13 1 0 2 0 /* GTX_CLK */
1 1f 2 0 3 0 /* GTX125 */
4 06 3 0 2 0 /* MDIO */
4 05 1 0 2 0>; /* MDC */
};
};
};
qe@e0080000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "qe";
model = "QE";
ranges = <0 e0080000 00040000>;
reg = <e0080000 480>;
brg-frequency = <0>;
bus-frequency = <179A7B00>;
muram@10000 {
device_type = "muram";
ranges = <0 00010000 0000c000>;
data-only@0{
reg = <0 c000>;
};
};
spi@4c0 {
device_type = "spi";
compatible = "fsl_spi";
reg = <4c0 40>;
interrupts = <2>;
interrupt-parent = <80>;
mode = "cpu";
};
spi@500 {
device_type = "spi";
compatible = "fsl_spi";
reg = <500 40>;
interrupts = <1>;
interrupt-parent = <80>;
mode = "cpu";
};
ucc@2000 {
device_type = "network";
compatible = "ucc_geth";
model = "UCC";
device-id = <1>;
reg = <2000 200>;
interrupts = <20>;
interrupt-parent = <80>;
mac-address = [ 00 04 9f 00 23 23 ];
rx-clock = <0>;
tx-clock = <19>;
phy-handle = <212000>;
pio-handle = <e010001>;
};
ucc@3000 {
device_type = "network";
compatible = "ucc_geth";
model = "UCC";
device-id = <2>;
reg = <3000 200>;
interrupts = <21>;
interrupt-parent = <80>;
mac-address = [ 00 11 22 33 44 55 ];
rx-clock = <0>;
tx-clock = <14>;
phy-handle = <212001>;
pio-handle = <e010002>;
};
mdio@2120 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2120 18>;
device_type = "mdio";
compatible = "ucc_geth_phy";
/* These are the same PHYs as on
* gianfar's MDIO bus */
ethernet-phy@00 {
linux,phandle = <212000>;
interrupt-parent = <40000>;
interrupts = <31 1>;
reg = <0>;
device_type = "ethernet-phy";
interface = <6>; //ENET_1000_GMII
};
ethernet-phy@01 {
linux,phandle = <212001>;
interrupt-parent = <40000>;
interrupts = <32 1>;
reg = <1>;
device_type = "ethernet-phy";
interface = <6>;
};
ethernet-phy@02 {
linux,phandle = <212002>;
interrupt-parent = <40000>;
interrupts = <31 1>;
reg = <2>;
device_type = "ethernet-phy";
interface = <6>; //ENET_1000_GMII
};
ethernet-phy@03 {
linux,phandle = <212003>;
interrupt-parent = <40000>;
interrupts = <32 1>;
reg = <3>;
device_type = "ethernet-phy";
interface = <6>; //ENET_1000_GMII
};
};
qeic@80 {
linux,phandle = <80>;
interrupt-controller;
device_type = "qeic";
#address-cells = <0>;
#interrupt-cells = <1>;
reg = <80 80>;
built-in;
big-endian;
interrupts = <1e 2 1e 2>; //high:30 low:30
interrupt-parent = <40000>;
};
};
};

118
arch/powerpc/configs/linkstation_defconfig
View File

@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.20-rc5
# Mon Jan 22 22:17:58 2007
# Linux kernel version: 2.6.20-rc6
# Sun Jan 28 23:13:56 2007
#
# CONFIG_PPC64 is not set
CONFIG_PPC32=y
@ -58,7 +58,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION="-kuroboxHG"
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
@ -206,7 +206,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_PROC_DEVICETREE=y
# CONFIG_CMDLINE_BOOL is not set
# CONFIG_PM is not set
# CONFIG_SECCOMP is not set
CONFIG_SECCOMP=y
CONFIG_ISA_DMA_API=y
#
@ -312,39 +312,40 @@ CONFIG_NF_CONNTRACK=m
# CONFIG_NF_CT_ACCT is not set
# CONFIG_NF_CONNTRACK_MARK is not set
# CONFIG_NF_CONNTRACK_EVENTS is not set
# CONFIG_NF_CT_PROTO_SCTP is not set
# CONFIG_NF_CONNTRACK_AMANDA is not set
CONFIG_NF_CT_PROTO_GRE=m
CONFIG_NF_CT_PROTO_SCTP=m
CONFIG_NF_CONNTRACK_AMANDA=m
CONFIG_NF_CONNTRACK_FTP=m
# CONFIG_NF_CONNTRACK_H323 is not set
CONFIG_NF_CONNTRACK_H323=m
CONFIG_NF_CONNTRACK_IRC=m
# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set
# CONFIG_NF_CONNTRACK_PPTP is not set
# CONFIG_NF_CONNTRACK_SIP is not set
CONFIG_NF_CONNTRACK_NETBIOS_NS=m
CONFIG_NF_CONNTRACK_PPTP=m
CONFIG_NF_CONNTRACK_SIP=m
CONFIG_NF_CONNTRACK_TFTP=m
CONFIG_NETFILTER_XTABLES=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
CONFIG_NETFILTER_XT_TARGET_MARK=m
# CONFIG_NETFILTER_XT_TARGET_MARK is not set
# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
CONFIG_NETFILTER_XT_TARGET_NFLOG=m
# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
# CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set
# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
CONFIG_NETFILTER_XT_MATCH_ESP=m
CONFIG_NETFILTER_XT_MATCH_HELPER=m
CONFIG_NETFILTER_XT_MATCH_LENGTH=m
CONFIG_NETFILTER_XT_MATCH_LIMIT=m
# CONFIG_NETFILTER_XT_MATCH_ESP is not set
# CONFIG_NETFILTER_XT_MATCH_HELPER is not set
# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set
# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set
CONFIG_NETFILTER_XT_MATCH_MAC=m
CONFIG_NETFILTER_XT_MATCH_MARK=m
# CONFIG_NETFILTER_XT_MATCH_MARK is not set
# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
# CONFIG_NETFILTER_XT_MATCH_REALM is not set
# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
# CONFIG_NETFILTER_XT_MATCH_STATE is not set
CONFIG_NETFILTER_XT_MATCH_STATE=m
# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
# CONFIG_NETFILTER_XT_MATCH_STRING is not set
# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
@ -359,12 +360,12 @@ CONFIG_NF_CONNTRACK_PROC_COMPAT=y
CONFIG_IP_NF_IPTABLES=m
CONFIG_IP_NF_MATCH_IPRANGE=m
# CONFIG_IP_NF_MATCH_TOS is not set
# CONFIG_IP_NF_MATCH_RECENT is not set
CONFIG_IP_NF_MATCH_RECENT=m
# CONFIG_IP_NF_MATCH_ECN is not set
# CONFIG_IP_NF_MATCH_AH is not set
# CONFIG_IP_NF_MATCH_TTL is not set
# CONFIG_IP_NF_MATCH_OWNER is not set
# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
CONFIG_IP_NF_MATCH_OWNER=m
CONFIG_IP_NF_MATCH_ADDRTYPE=m
CONFIG_IP_NF_FILTER=m
CONFIG_IP_NF_TARGET_REJECT=m
# CONFIG_IP_NF_TARGET_LOG is not set
@ -374,16 +375,17 @@ CONFIG_NF_NAT=m
CONFIG_NF_NAT_NEEDED=y
CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_TARGET_REDIRECT=m
CONFIG_IP_NF_TARGET_NETMAP=m
CONFIG_IP_NF_TARGET_SAME=m
# CONFIG_IP_NF_TARGET_NETMAP is not set
# CONFIG_IP_NF_TARGET_SAME is not set
# CONFIG_NF_NAT_SNMP_BASIC is not set
CONFIG_NF_NAT_PROTO_GRE=m
CONFIG_NF_NAT_FTP=m
CONFIG_NF_NAT_IRC=m
CONFIG_NF_NAT_TFTP=m
# CONFIG_NF_NAT_AMANDA is not set
# CONFIG_NF_NAT_PPTP is not set
# CONFIG_NF_NAT_H323 is not set
# CONFIG_NF_NAT_SIP is not set
CONFIG_NF_NAT_AMANDA=m
CONFIG_NF_NAT_PPTP=m
CONFIG_NF_NAT_H323=m
CONFIG_NF_NAT_SIP=m
CONFIG_IP_NF_MANGLE=m
CONFIG_IP_NF_TARGET_TOS=m
CONFIG_IP_NF_TARGET_ECN=m
@ -472,6 +474,7 @@ CONFIG_MTD_PARTITIONS=y
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
@ -518,6 +521,7 @@ CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_START=0xffc00000
CONFIG_MTD_PHYSMAP_LEN=0x400000
CONFIG_MTD_PHYSMAP_BANKWIDTH=1
# CONFIG_MTD_PHYSMAP_OF is not set
# CONFIG_MTD_PLATRAM is not set
#
@ -540,6 +544,7 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=1
# NAND Flash Device Drivers
#
# CONFIG_MTD_NAND is not set
# CONFIG_MTD_NAND_CAFE is not set
#
# OneNAND Flash Device Drivers
@ -696,7 +701,7 @@ CONFIG_ATA=y
# CONFIG_PATA_HPT37X is not set
# CONFIG_PATA_HPT3X2N is not set
# CONFIG_PATA_HPT3X3 is not set
# CONFIG_PATA_IT821X is not set
CONFIG_PATA_IT821X=y
# CONFIG_PATA_JMICRON is not set
# CONFIG_PATA_TRIFLEX is not set
# CONFIG_PATA_MARVELL is not set
@ -763,11 +768,33 @@ CONFIG_TUN=m
#
# PHY device support
#
# CONFIG_PHYLIB is not set
#
# Ethernet (10 or 100Mbit)
#
# CONFIG_NET_ETHERNET is not set
CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
# CONFIG_CASSINI is not set
# CONFIG_NET_VENDOR_3COM is not set
#
# Tulip family network device support
#
CONFIG_NET_TULIP=y
# CONFIG_DE2104X is not set
CONFIG_TULIP=y
# CONFIG_TULIP_MWI is not set
CONFIG_TULIP_MMIO=y
# CONFIG_TULIP_NAPI is not set
# CONFIG_DE4X5 is not set
# CONFIG_WINBOND_840 is not set
# CONFIG_DM9102 is not set
# CONFIG_ULI526X is not set
# CONFIG_HP100 is not set
# CONFIG_NET_PCI is not set
#
# Ethernet (1000 Mbit)
@ -829,7 +856,8 @@ CONFIG_NET_RADIO=y
# CONFIG_USB_ZD1201 is not set
# CONFIG_HOSTAP is not set
# CONFIG_BCM43XX is not set
# CONFIG_ZD1211RW is not set
CONFIG_ZD1211RW=m
# CONFIG_ZD1211RW_DEBUG is not set
CONFIG_NET_WIRELESS=y
#
@ -1098,7 +1126,7 @@ CONFIG_DUMMY_CONSOLE=y
#
# HID Devices
#
CONFIG_HID=y
CONFIG_HID=m
#
# USB support
@ -1115,7 +1143,6 @@ CONFIG_USB=y
CONFIG_USB_DEVICEFS=y
# CONFIG_USB_BANDWIDTH is not set
# CONFIG_USB_DYNAMIC_MINORS is not set
# CONFIG_USB_MULTITHREAD_PROBE is not set
# CONFIG_USB_OTG is not set
#
@ -1136,7 +1163,7 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
# USB Device Class drivers
#
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set
CONFIG_USB_PRINTER=m
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
@ -1371,7 +1398,11 @@ CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
# CONFIG_XFS_FS is not set
CONFIG_XFS_FS=m
# CONFIG_XFS_QUOTA is not set
# CONFIG_XFS_SECURITY is not set
# CONFIG_XFS_POSIX_ACL is not set
# CONFIG_XFS_RT is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
@ -1461,7 +1492,12 @@ CONFIG_SUNRPC_GSS=y
CONFIG_RPCSEC_GSS_KRB5=y
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
CONFIG_CIFS=m
# CONFIG_CIFS_STATS is not set
# CONFIG_CIFS_WEAK_PW_HASH is not set
# CONFIG_CIFS_XATTR is not set
# CONFIG_CIFS_DEBUG2 is not set
# CONFIG_CIFS_EXPERIMENTAL is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
@ -1495,7 +1531,7 @@ CONFIG_NLS_CODEPAGE_437=m
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
CONFIG_NLS_CODEPAGE_932=m
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
@ -1526,12 +1562,14 @@ CONFIG_NLS_UTF8=m
# Library routines
#
CONFIG_BITREVERSE=y
# CONFIG_CRC_CCITT is not set
CONFIG_CRC_CCITT=m
# CONFIG_CRC16 is not set
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=m
CONFIG_ZLIB_DEFLATE=m
CONFIG_TEXTSEARCH=y
CONFIG_TEXTSEARCH_KMP=m
CONFIG_PLIST=y
CONFIG_IOMAP_COPY=y

1409
arch/powerpc/configs/mpc8313_rdb_defconfig Normal file
View File

File diff suppressed because it is too large Load Diff

232
arch/powerpc/configs/mpc834x_itx_defconfig
View File

@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.20-rc5
# Fri Jan 26 00:19:02 2007
# Linux kernel version: 2.6.20
# Wed Feb 7 13:12:18 2007
#
# CONFIG_PPC64 is not set
CONFIG_PPC32=y
@ -34,9 +34,9 @@ CONFIG_DEFAULT_UIMAGE=y
CONFIG_PPC_83xx=y
# CONFIG_PPC_85xx is not set
# CONFIG_PPC_86xx is not set
# CONFIG_PPC_8xx is not set
# CONFIG_40x is not set
# CONFIG_44x is not set
# CONFIG_8xx is not set
# CONFIG_E200 is not set
CONFIG_6xx=y
CONFIG_83xx=y
@ -178,7 +178,6 @@ CONFIG_FSL_SOC=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCIEPORTBUS is not set
# CONFIG_PCI_DEBUG is not set
#
# PCCARD (PCMCIA/CardBus) support
@ -303,7 +302,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_SYS_HYPERVISOR is not set
#
@ -523,6 +521,7 @@ CONFIG_SCSI_SPI_ATTRS=y
# Serial ATA (prod) and Parallel ATA (experimental) drivers
#
CONFIG_ATA=y
# CONFIG_ATA_NONSTANDARD is not set
# CONFIG_SATA_AHCI is not set
# CONFIG_SATA_SVW is not set
# CONFIG_ATA_PIIX is not set
@ -647,37 +646,7 @@ CONFIG_CICADA_PHY=y
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
# CONFIG_CASSINI is not set
# CONFIG_NET_VENDOR_3COM is not set
#
# Tulip family network device support
#
# CONFIG_NET_TULIP is not set
# CONFIG_HP100 is not set
CONFIG_NET_PCI=y
# CONFIG_PCNET32 is not set
# CONFIG_AMD8111_ETH is not set
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_B44 is not set
# CONFIG_FORCEDETH is not set
# CONFIG_DGRS is not set
# CONFIG_EEPRO100 is not set
CONFIG_E100=y
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_8139CP is not set
# CONFIG_8139TOO is not set
# CONFIG_SIS900 is not set
# CONFIG_EPIC100 is not set
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
# CONFIG_NET_ETHERNET is not set
#
# Ethernet (1000 Mbit)
@ -693,7 +662,6 @@ CONFIG_E100=y
# CONFIG_SKGE is not set
# CONFIG_SKY2 is not set
# CONFIG_SK98LIN is not set
# CONFIG_VIA_VELOCITY is not set
# CONFIG_TIGON3 is not set
# CONFIG_BNX2 is not set
CONFIG_GIANFAR=y
@ -746,26 +714,7 @@ CONFIG_GFAR_NAPI=y
#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
# CONFIG_INPUT is not set
#
# Hardware I/O ports
@ -784,7 +733,7 @@ CONFIG_INPUT=y
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_PCI=y
# CONFIG_SERIAL_8250_PCI is not set
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
# CONFIG_SERIAL_8250_EXTENDED is not set
@ -887,7 +836,7 @@ CONFIG_I2C_MPC=y
# CONFIG_SENSORS_DS1337 is not set
# CONFIG_SENSORS_DS1374 is not set
# CONFIG_SENSORS_EEPROM is not set
# CONFIG_SENSORS_PCF8574 is not set
CONFIG_SENSORS_PCF8574=y
# CONFIG_SENSORS_PCA9539 is not set
# CONFIG_SENSORS_PCF8591 is not set
# CONFIG_SENSORS_M41T00 is not set
@ -901,7 +850,6 @@ CONFIG_I2C_MPC=y
# SPI support
#
CONFIG_SPI=y
# CONFIG_SPI_DEBUG is not set
CONFIG_SPI_MASTER=y
#
@ -922,52 +870,8 @@ CONFIG_SPI_MPC83xx=y
#
# Hardware Monitoring support
#
CONFIG_HWMON=y
# CONFIG_HWMON is not set
# CONFIG_HWMON_VID is not set
# CONFIG_SENSORS_ABITUGURU is not set
# CONFIG_SENSORS_ADM1021 is not set
# CONFIG_SENSORS_ADM1025 is not set
# CONFIG_SENSORS_ADM1026 is not set
# CONFIG_SENSORS_ADM1031 is not set
# CONFIG_SENSORS_ADM9240 is not set
# CONFIG_SENSORS_ASB100 is not set
# CONFIG_SENSORS_ATXP1 is not set
# CONFIG_SENSORS_DS1621 is not set
# CONFIG_SENSORS_F71805F is not set
# CONFIG_SENSORS_FSCHER is not set
# CONFIG_SENSORS_FSCPOS is not set
# CONFIG_SENSORS_GL518SM is not set
# CONFIG_SENSORS_GL520SM is not set
# CONFIG_SENSORS_IT87 is not set
# CONFIG_SENSORS_LM63 is not set
# CONFIG_SENSORS_LM70 is not set
# CONFIG_SENSORS_LM75 is not set
# CONFIG_SENSORS_LM77 is not set
# CONFIG_SENSORS_LM78 is not set
# CONFIG_SENSORS_LM80 is not set
# CONFIG_SENSORS_LM83 is not set
# CONFIG_SENSORS_LM85 is not set
# CONFIG_SENSORS_LM87 is not set
# CONFIG_SENSORS_LM90 is not set
# CONFIG_SENSORS_LM92 is not set
# CONFIG_SENSORS_MAX1619 is not set
# CONFIG_SENSORS_PC87360 is not set
# CONFIG_SENSORS_PC87427 is not set
# CONFIG_SENSORS_SIS5595 is not set
# CONFIG_SENSORS_SMSC47M1 is not set
# CONFIG_SENSORS_SMSC47M192 is not set
# CONFIG_SENSORS_SMSC47B397 is not set
# CONFIG_SENSORS_VIA686A is not set
# CONFIG_SENSORS_VT1211 is not set
# CONFIG_SENSORS_VT8231 is not set
# CONFIG_SENSORS_W83781D is not set
# CONFIG_SENSORS_W83791D is not set
# CONFIG_SENSORS_W83792D is not set
# CONFIG_SENSORS_W83793 is not set
# CONFIG_SENSORS_W83L785TS is not set
# CONFIG_SENSORS_W83627HF is not set
# CONFIG_SENSORS_W83627EHF is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
#
# Multimedia devices
@ -983,7 +887,7 @@ CONFIG_HWMON=y
#
# Graphics support
#
CONFIG_FIRMWARE_EDID=y
# CONFIG_FIRMWARE_EDID is not set
# CONFIG_FB is not set
# CONFIG_FB_IBM_GXT4500 is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
@ -993,11 +897,6 @@ CONFIG_FIRMWARE_EDID=y
#
# CONFIG_SOUND is not set
#
# HID Devices
#
CONFIG_HID=y
#
# USB support
#
@ -1023,10 +922,8 @@ CONFIG_USB_EHCI_HCD=y
# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
# CONFIG_USB_EHCI_TT_NEWSCHED is not set
# CONFIG_USB_ISP116X_HCD is not set
CONFIG_USB_OHCI_HCD=y
# CONFIG_USB_OHCI_BIG_ENDIAN is not set
CONFIG_USB_OHCI_LITTLE_ENDIAN=y
CONFIG_USB_UHCI_HCD=y
# CONFIG_USB_OHCI_HCD is not set
# CONFIG_USB_UHCI_HCD is not set
# CONFIG_USB_SL811_HCD is not set
#
@ -1058,25 +955,10 @@ CONFIG_USB_STORAGE=y
#
# USB Input Devices
#
# CONFIG_USB_HID is not set
#
# USB HID Boot Protocol drivers
#
# CONFIG_USB_KBD is not set
# CONFIG_USB_MOUSE is not set
# CONFIG_USB_AIPTEK is not set
# CONFIG_USB_WACOM is not set
# CONFIG_USB_ACECAD is not set
# CONFIG_USB_KBTAB is not set
# CONFIG_USB_POWERMATE is not set
# CONFIG_USB_TOUCHSCREEN is not set
# CONFIG_USB_YEALINK is not set
# CONFIG_USB_XPAD is not set
# CONFIG_USB_ATI_REMOTE is not set
# CONFIG_USB_ATI_REMOTE2 is not set
# CONFIG_USB_KEYSPAN_REMOTE is not set
# CONFIG_USB_APPLETOUCH is not set
#
# USB Imaging devices
@ -1133,25 +1015,7 @@ CONFIG_USB_MON=y
#
# USB Gadget Support
#
CONFIG_USB_GADGET=y
# CONFIG_USB_GADGET_DEBUG_FILES is not set
CONFIG_USB_GADGET_SELECTED=y
CONFIG_USB_GADGET_NET2280=y
CONFIG_USB_NET2280=y
# CONFIG_USB_GADGET_PXA2XX is not set
# CONFIG_USB_GADGET_GOKU is not set
# CONFIG_USB_GADGET_LH7A40X is not set
# CONFIG_USB_GADGET_OMAP is not set
# CONFIG_USB_GADGET_AT91 is not set
# CONFIG_USB_GADGET_DUMMY_HCD is not set
CONFIG_USB_GADGET_DUALSPEED=y
# CONFIG_USB_ZERO is not set
CONFIG_USB_ETH=y
CONFIG_USB_ETH_RNDIS=y
# CONFIG_USB_GADGETFS is not set
# CONFIG_USB_FILE_STORAGE is not set
# CONFIG_USB_G_SERIAL is not set
# CONFIG_USB_MIDI_GADGET is not set
# CONFIG_USB_GADGET is not set
#
# MMC/SD Card support
@ -1273,8 +1137,11 @@ CONFIG_DNOTIFY=y
#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
CONFIG_FAT_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_NTFS_FS is not set
#
@ -1340,7 +1207,7 @@ CONFIG_PARTITION_ADVANCED=y
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
CONFIG_MAC_PARTITION=y
CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
@ -1356,7 +1223,46 @@ CONFIG_MSDOS_PARTITION=y
#
# Native Language Support
#
# CONFIG_NLS is not set
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_CODEPAGE_437 is not set
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
#
# Distributed Lock Manager
@ -1388,27 +1294,9 @@ CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_HEADERS_CHECK is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=14
CONFIG_DETECT_SOFTLOCKUP=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_MUTEXES is not set
# CONFIG_DEBUG_RWSEMS is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_DEBUG_KOBJECT is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_LIST is not set
CONFIG_FORCED_INLINING=y
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_DEBUGGER is not set
# CONFIG_BDI_SWITCH is not set
# CONFIG_BOOTX_TEXT is not set
# CONFIG_SERIAL_TEXT_DEBUG is not set
# CONFIG_PPC_EARLY_DEBUG is not set

1174
arch/powerpc/configs/mpc834x_itxgp_defconfig Normal file
View File

File diff suppressed because it is too large Load Diff

9
arch/powerpc/configs/mpc834x_mds_defconfig
View File

@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.20-rc5
# Fri Jan 26 00:19:27 2007
# Linux kernel version: 2.6.20
# Thu Feb 8 01:00:48 2007
#
# CONFIG_PPC64 is not set
CONFIG_PPC32=y
@ -34,9 +34,9 @@ CONFIG_DEFAULT_UIMAGE=y
CONFIG_PPC_83xx=y
# CONFIG_PPC_85xx is not set
# CONFIG_PPC_86xx is not set
# CONFIG_PPC_8xx is not set
# CONFIG_40x is not set
# CONFIG_44x is not set
# CONFIG_8xx is not set
# CONFIG_E200 is not set
CONFIG_6xx=y
CONFIG_83xx=y
@ -128,8 +128,9 @@ CONFIG_PPC_GEN550=y
#
# Platform support
#
# CONFIG_MPC8313_RDB is not set
# CONFIG_MPC832x_MDS is not set
CONFIG_MPC834x_SYS=y
CONFIG_MPC834x_MDS=y
# CONFIG_MPC834x_ITX is not set
# CONFIG_MPC8360E_PB is not set
CONFIG_MPC834x=y

992
arch/powerpc/configs/mpc8568mds_defconfig Normal file
View File

@ -0,0 +1,992 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.20-rc5
# Wed Feb 7 23:54:25 2007
#
# CONFIG_PPC64 is not set
CONFIG_PPC32=y
CONFIG_PPC_MERGE=y
CONFIG_MMU=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_IRQ_PER_CPU=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_ARCH_HAS_ILOG2_U32=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_PPC=y
CONFIG_EARLY_PRINTK=y
CONFIG_GENERIC_NVRAM=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_PPC_OF=y
CONFIG_PPC_UDBG_16550=y
# CONFIG_GENERIC_TBSYNC is not set
CONFIG_AUDIT_ARCH=y
CONFIG_GENERIC_BUG=y
CONFIG_DEFAULT_UIMAGE=y
#
# Processor support
#
# CONFIG_CLASSIC32 is not set
# CONFIG_PPC_82xx is not set
# CONFIG_PPC_83xx is not set
CONFIG_PPC_85xx=y
# CONFIG_PPC_86xx is not set
# CONFIG_40x is not set
# CONFIG_44x is not set
# CONFIG_8xx is not set
# CONFIG_E200 is not set
CONFIG_85xx=y
CONFIG_E500=y
# CONFIG_PPC_DCR_NATIVE is not set
# CONFIG_PPC_DCR_MMIO is not set
CONFIG_BOOKE=y
CONFIG_FSL_BOOKE=y
# CONFIG_PHYS_64BIT is not set
CONFIG_SPE=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_IPC_NS is not set
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_UTS_NS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
CONFIG_SYSCTL_SYSCALL=y
# CONFIG_KALLSYMS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
# CONFIG_EPOLL is not set
CONFIG_SHMEM=y
CONFIG_SLAB=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
# CONFIG_SLOB is not set
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_KMOD is not set
#
# Block layer
#
CONFIG_BLOCK=y
# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_LSF is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
CONFIG_DEFAULT_AS=y
# CONFIG_DEFAULT_DEADLINE is not set
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
# CONFIG_WANT_EARLY_SERIAL is not set
#
# Platform support
#
# CONFIG_MPC8540_ADS is not set
# CONFIG_MPC8560_ADS is not set
# CONFIG_MPC85xx_CDS is not set
CONFIG_MPC8568_MDS=y
CONFIG_MPC85xx=y
CONFIG_PPC_INDIRECT_PCI_BE=y
CONFIG_MPIC=y
#
# Kernel options
#
# CONFIG_HIGHMEM is not set
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_MATH_EMULATION=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_ARCH_FLATMEM_ENABLE=y
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_PROC_DEVICETREE=y
# CONFIG_CMDLINE_BOOL is not set
# CONFIG_PM is not set
CONFIG_SECCOMP=y
CONFIG_ISA_DMA_API=y
#
# Bus options
#
# CONFIG_MPIC_WEIRD is not set
# CONFIG_PPC_I8259 is not set
CONFIG_PPC_INDIRECT_PCI=y
CONFIG_FSL_SOC=y
# CONFIG_PCI is not set
# CONFIG_PCI_DOMAINS is not set
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
#
# PCI Hotplug Support
#
#
# Advanced setup
#
# CONFIG_ADVANCED_OPTIONS is not set
#
# Default settings for advanced configuration options are used
#
CONFIG_HIGHMEM_START=0xfe000000
CONFIG_LOWMEM_SIZE=0x30000000
CONFIG_KERNEL_START=0xc0000000
CONFIG_TASK_SIZE=0x80000000
CONFIG_BOOT_LOAD=0x00800000
#
# Networking
#
CONFIG_NET=y
#
# Networking options
#
# CONFIG_NETDEBUG is not set
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_UNIX=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
CONFIG_SYN_COOKIES=y
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
CONFIG_INET_XFRM_MODE_TRANSPORT=y
CONFIG_INET_XFRM_MODE_TUNNEL=y
CONFIG_INET_XFRM_MODE_BEET=y
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
#
# DCCP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_DCCP is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_SCTP is not set
#
# TIPC Configuration (EXPERIMENTAL)
#
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_IEEE80211 is not set
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_SYS_HYPERVISOR is not set
#
# Connector - unified userspace <-> kernelspace linker
#
# CONFIG_CONNECTOR is not set
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=32768
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
#
# Misc devices
#
# CONFIG_TIFM_CORE is not set
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_IDE is not set
#
# SCSI device support
#
# CONFIG_RAID_ATTRS is not set
CONFIG_SCSI=y
# CONFIG_SCSI_TGT is not set
# CONFIG_SCSI_NETLINK is not set
CONFIG_SCSI_PROC_FS=y
#
# SCSI support type (disk, tape, CD-ROM)
#
# CONFIG_BLK_DEV_SD is not set
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set
# CONFIG_CHR_DEV_SCH is not set
#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_MULTI_LUN is not set
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
# CONFIG_SCSI_SCAN_ASYNC is not set
#
# SCSI Transports
#
# CONFIG_SCSI_SPI_ATTRS is not set
# CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
# CONFIG_SCSI_SAS_ATTRS is not set
# CONFIG_SCSI_SAS_LIBSAS is not set
#
# SCSI low-level drivers
#
# CONFIG_ISCSI_TCP is not set
# CONFIG_SCSI_DEBUG is not set
#
# Serial ATA (prod) and Parallel ATA (experimental) drivers
#
# CONFIG_ATA is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
#
# I2O device support
#
#
# Macintosh device drivers
#
# CONFIG_MAC_EMUMOUSEBTN is not set
# CONFIG_WINDFARM is not set
#
# Network device support
#
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
#
# PHY device support
#
CONFIG_PHYLIB=y
#
# MII PHY device drivers
#
CONFIG_MARVELL_PHY=y
# CONFIG_DAVICOM_PHY is not set
# CONFIG_QSEMI_PHY is not set
# CONFIG_LXT_PHY is not set
# CONFIG_CICADA_PHY is not set
# CONFIG_VITESSE_PHY is not set
# CONFIG_SMSC_PHY is not set
# CONFIG_BROADCOM_PHY is not set
# CONFIG_FIXED_PHY is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
#
# Ethernet (1000 Mbit)
#
CONFIG_GIANFAR=y
CONFIG_GFAR_NAPI=y
#
# Ethernet (10000 Mbit)
#
#
# Token Ring devices
#
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
#
# ISDN subsystem
#
# CONFIG_ISDN is not set
#
# Telephony Support
#
# CONFIG_PHONE is not set
#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
# CONFIG_SERIO is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
# CONFIG_SERIAL_8250_EXTENDED is not set
#
# Non-8250 serial port support
#
# CONFIG_SERIAL_UARTLITE is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
#
# Watchdog Device Drivers
#
# CONFIG_SOFT_WATCHDOG is not set
# CONFIG_BOOKE_WDT is not set
CONFIG_HW_RANDOM=y
# CONFIG_NVRAM is not set
CONFIG_GEN_RTC=y
# CONFIG_GEN_RTC_X is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
# CONFIG_TCG_TPM is not set
#
# I2C support
#
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
#
# I2C Algorithms
#
# CONFIG_I2C_ALGOBIT is not set
# CONFIG_I2C_ALGOPCF is not set
# CONFIG_I2C_ALGOPCA is not set
#
# I2C Hardware Bus support
#
CONFIG_I2C_MPC=y
# CONFIG_I2C_OCORES is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_STUB is not set
# CONFIG_I2C_PCA_ISA is not set
#
# Miscellaneous I2C Chip support
#
# CONFIG_SENSORS_DS1337 is not set
# CONFIG_SENSORS_DS1374 is not set
# CONFIG_SENSORS_EEPROM is not set
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_SENSORS_PCA9539 is not set
# CONFIG_SENSORS_PCF8591 is not set
# CONFIG_SENSORS_M41T00 is not set
# CONFIG_SENSORS_MAX6875 is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_I2C_DEBUG_CHIP is not set
#
# SPI support
#
# CONFIG_SPI is not set
# CONFIG_SPI_MASTER is not set
#
# Dallas's 1-wire bus
#
# CONFIG_W1 is not set
#
# Hardware Monitoring support
#
CONFIG_HWMON=y
# CONFIG_HWMON_VID is not set
# CONFIG_SENSORS_ABITUGURU is not set
# CONFIG_SENSORS_ADM1021 is not set
# CONFIG_SENSORS_ADM1025 is not set
# CONFIG_SENSORS_ADM1026 is not set
# CONFIG_SENSORS_ADM1031 is not set
# CONFIG_SENSORS_ADM9240 is not set
# CONFIG_SENSORS_ASB100 is not set
# CONFIG_SENSORS_ATXP1 is not set
# CONFIG_SENSORS_DS1621 is not set
# CONFIG_SENSORS_F71805F is not set
# CONFIG_SENSORS_FSCHER is not set
# CONFIG_SENSORS_FSCPOS is not set
# CONFIG_SENSORS_GL518SM is not set
# CONFIG_SENSORS_GL520SM is not set
# CONFIG_SENSORS_IT87 is not set
# CONFIG_SENSORS_LM63 is not set
# CONFIG_SENSORS_LM75 is not set
# CONFIG_SENSORS_LM77 is not set
# CONFIG_SENSORS_LM78 is not set
# CONFIG_SENSORS_LM80 is not set
# CONFIG_SENSORS_LM83 is not set
# CONFIG_SENSORS_LM85 is not set
# CONFIG_SENSORS_LM87 is not set
# CONFIG_SENSORS_LM90 is not set
# CONFIG_SENSORS_LM92 is not set
# CONFIG_SENSORS_MAX1619 is not set
# CONFIG_SENSORS_PC87360 is not set
# CONFIG_SENSORS_PC87427 is not set
# CONFIG_SENSORS_SMSC47M1 is not set
# CONFIG_SENSORS_SMSC47M192 is not set
# CONFIG_SENSORS_SMSC47B397 is not set
# CONFIG_SENSORS_VT1211 is not set
# CONFIG_SENSORS_W83781D is not set
# CONFIG_SENSORS_W83791D is not set
# CONFIG_SENSORS_W83792D is not set
# CONFIG_SENSORS_W83793 is not set
# CONFIG_SENSORS_W83L785TS is not set
# CONFIG_SENSORS_W83627HF is not set
# CONFIG_SENSORS_W83627EHF is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# Graphics support
#
CONFIG_FIRMWARE_EDID=y
# CONFIG_FB is not set
# CONFIG_FB_IBM_GXT4500 is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Sound
#
# CONFIG_SOUND is not set
#
# HID Devices
#
CONFIG_HID=y
#
# USB support
#
# CONFIG_USB_ARCH_HAS_HCD is not set
# CONFIG_USB_ARCH_HAS_OHCI is not set
# CONFIG_USB_ARCH_HAS_EHCI is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
#
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# MMC/SD Card support
#
# CONFIG_MMC is not set
#
# LED devices
#
# CONFIG_NEW_LEDS is not set
#
# LED drivers
#
#
# LED Triggers
#
#
# InfiniBand support
#
#
# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
#
#
# Real Time Clock
#
# CONFIG_RTC_CLASS is not set
#
# DMA Engine support
#
# CONFIG_DMA_ENGINE is not set
#
# DMA Clients
#
#
# DMA Devices
#
#
# Virtualization
#
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT2_FS_XIP is not set
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_XATTR=y
# CONFIG_EXT3_FS_POSIX_ACL is not set
# CONFIG_EXT3_FS_SECURITY is not set
# CONFIG_EXT4DEV_FS is not set
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_PROC_SYSCTL=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
# CONFIG_CONFIGFS_FS is not set
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
CONFIG_NFS_V4=y
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
CONFIG_RPCSEC_GSS_KRB5=y
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
# CONFIG_9P_FS is not set
#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
# CONFIG_MSDOS_PARTITION is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_KARMA_PARTITION is not set
# CONFIG_EFI_PARTITION is not set
#
# Native Language Support
#
# CONFIG_NLS is not set
#
# Distributed Lock Manager
#
# CONFIG_DLM is not set
#
# Library routines
#
CONFIG_BITREVERSE=y
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_PLIST=y
CONFIG_IOMAP_COPY=y
#
# Instrumentation Support
#
CONFIG_PROFILING=y
CONFIG_OPROFILE=y
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_HEADERS_CHECK is not set
CONFIG_DEBUG_KERNEL=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_DETECT_SOFTLOCKUP=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_MUTEXES is not set
# CONFIG_DEBUG_RWSEMS is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_DEBUG_KOBJECT is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_LIST is not set
CONFIG_FORCED_INLINING=y
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_DEBUGGER=y
# CONFIG_XMON is not set
# CONFIG_BDI_SWITCH is not set
CONFIG_BOOTX_TEXT=y
CONFIG_PPC_EARLY_DEBUG=y
# CONFIG_PPC_EARLY_DEBUG_LPAR is not set
# CONFIG_PPC_EARLY_DEBUG_G5 is not set
# CONFIG_PPC_EARLY_DEBUG_RTAS_PANEL is not set
# CONFIG_PPC_EARLY_DEBUG_RTAS_CONSOLE is not set
# CONFIG_PPC_EARLY_DEBUG_MAPLE is not set
# CONFIG_PPC_EARLY_DEBUG_ISERIES is not set
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
CONFIG_CRYPTO=y
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_MANAGER=y
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_XCBC is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_MD4 is not set
CONFIG_CRYPTO_MD5=y
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_WP512 is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_GF128MUL is not set
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_CBC=y
# CONFIG_CRYPTO_LRW is not set
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_TWOFISH is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_AES is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_TEST is not set
#
# Hardware crypto devices
#

9
arch/powerpc/kernel/btext.c
View File

@ -18,6 +18,7 @@
#include <asm/io.h>
#include <asm/lmb.h>
#include <asm/processor.h>
#include <asm/udbg.h>
#define NO_SCROLL
@ -912,3 +913,11 @@ static unsigned char vga_font[cmapsz] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00,
};
void __init udbg_init_btext(void)
{
/* If btext is enabled, we might have a BAT setup for early display,
* thus we do enable some very basic udbg output
*/
udbg_putc = btext_drawchar;
}

2
arch/powerpc/kernel/cputable.c
View File

@ -44,7 +44,7 @@ extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
extern void __restore_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
extern void __restore_cpu_pa6t(void);
extern void __restore_cpu_ppc970(void);
#endif /* CONFIG_PPC64 */

2
arch/powerpc/kernel/head_44x.S
View File

@ -32,8 +32,6 @@
#include <asm/page.h>
#include <asm/mmu.h>
#include <asm/pgtable.h>
#include <asm/ibm4xx.h>
#include <asm/ibm44x.h>
#include <asm/cputable.h>
#include <asm/thread_info.h>
#include <asm/ppc_asm.h>

7
arch/powerpc/kernel/head_fsl_booke.S
View File

@ -206,7 +206,8 @@ skpinv: addi r6,r6,1 /* Increment */
rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */
mtspr SPRN_MAS0,r7
tlbre
li r6,0
mfspr r6,SPRN_MAS1
rlwinm r6,r6,0,2,0 /* clear IPROT */
mtspr SPRN_MAS1,r6
tlbwe
/* Invalidate TLB1 */
@ -248,6 +249,8 @@ skpinv: addi r6,r6,1 /* Increment */
rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */
mtspr SPRN_MAS0,r7
tlbre
mfspr r8,SPRN_MAS1
rlwinm r8,r8,0,2,0 /* clear IPROT */
mtspr SPRN_MAS1,r8
tlbwe
/* Invalidate TLB1 */
@ -889,7 +892,6 @@ load_up_spe:
REST_GPR(9, r11)
REST_GPR(12, r11)
lwz r11,GPR11(r11)
SYNC
rfi
/*
@ -953,7 +955,6 @@ _GLOBAL(giveup_altivec)
_GLOBAL(giveup_spe)
mfmsr r5
oris r5,r5,MSR_SPE@h
SYNC
mtmsr r5 /* enable use of SPE now */
isync
cmpi 0,r3,0

15
arch/powerpc/kernel/legacy_serial.c
View File

@ -124,6 +124,10 @@ static int __init add_legacy_soc_port(struct device_node *np,
if (get_property(np, "clock-frequency", NULL) == NULL)
return -1;
/* if rtas uses this device, don't try to use it as well */
if (get_property(np, "used-by-rtas", NULL) != NULL)
return -1;
/* Get the address */
addrp = of_get_address(soc_dev, 0, NULL, NULL);
if (addrp == NULL)
@ -334,6 +338,17 @@ void __init find_legacy_serial_ports(void)
of_node_put(tsi);
}
/* First fill our array with opb bus ports */
for (np = NULL; (np = of_find_compatible_node(np, "serial", "ns16750")) != NULL;) {
struct device_node *opb = of_get_parent(np);
if (opb && !strcmp(opb->type, "opb")) {
index = add_legacy_soc_port(np, np);
if (index >= 0 && np == stdout)
legacy_serial_console = index;
}
of_node_put(opb);
}
#ifdef CONFIG_PCI
/* Next, try to locate PCI ports */
for (np = NULL; (np = of_find_all_nodes(np));) {

81
arch/powerpc/kernel/prom_init.c
View File

@ -2117,11 +2117,92 @@ static void __init fixup_device_tree_pmac(void)
#define fixup_device_tree_pmac()
#endif
#ifdef CONFIG_PPC_EFIKA
/* The current fw of the Efika has a device tree needs quite a few
* fixups to be compliant with the mpc52xx bindings. It's currently
* unknown if it will ever be compliant (come on bPlan ...) so we do fixups.
* NOTE that we (barely) tolerate it because the EFIKA was out before
* the bindings were finished, for any new boards -> RTFM ! */
struct subst_entry {
char *path;
char *property;
void *value;
int value_len;
};
static void __init fixup_device_tree_efika(void)
{
/* Substitution table */
#define prop_cstr(x) x, sizeof(x)
int prop_sound_irq[3] = { 2, 2, 0 };
int prop_bcomm_irq[3*16] = { 3,0,0, 3,1,0, 3,2,0, 3,3,0,
3,4,0, 3,5,0, 3,6,0, 3,7,0,
3,8,0, 3,9,0, 3,10,0, 3,11,0,
3,12,0, 3,13,0, 3,14,0, 3,15,0 };
struct subst_entry efika_subst_table[] = {
{ "/", "device_type", prop_cstr("efika") },
{ "/builtin", "compatible", prop_cstr("soc") },
{ "/builtin/ata", "compatible", prop_cstr("mpc5200b-ata\0mpc5200-ata"), },
{ "/builtin/bestcomm", "compatible", prop_cstr("mpc5200b-bestcomm\0mpc5200-bestcomm") },
{ "/builtin/bestcomm", "interrupts", prop_bcomm_irq, sizeof(prop_bcomm_irq) },
{ "/builtin/ethernet", "compatible", prop_cstr("mpc5200b-fec\0mpc5200-fec") },
{ "/builtin/pic", "compatible", prop_cstr("mpc5200b-pic\0mpc5200-pic") },
{ "/builtin/serial", "compatible", prop_cstr("mpc5200b-psc-uart\0mpc5200-psc-uart") },
{ "/builtin/sound", "compatible", prop_cstr("mpc5200b-psc-ac97\0mpc5200-psc-ac97") },
{ "/builtin/sound", "interrupts", prop_sound_irq, sizeof(prop_sound_irq) },
{ "/builtin/sram", "compatible", prop_cstr("mpc5200b-sram\0mpc5200-sram") },
{ "/builtin/sram", "device_type", prop_cstr("sram") },
{}
};
#undef prop_cstr
/* Vars */
u32 node;
char prop[64];
int rv, i;
/* Check if we're really running on a EFIKA */
node = call_prom("finddevice", 1, 1, ADDR("/"));
if (!PHANDLE_VALID(node))
return;
rv = prom_getprop(node, "model", prop, sizeof(prop));
if (rv == PROM_ERROR)
return;
if (strcmp(prop, "EFIKA5K2"))
return;
prom_printf("Applying EFIKA device tree fixups\n");
/* Process substitution table */
for (i=0; efika_subst_table[i].path; i++) {
struct subst_entry *se = &efika_subst_table[i];
node = call_prom("finddevice", 1, 1, ADDR(se->path));
if (!PHANDLE_VALID(node)) {
prom_printf("fixup_device_tree_efika: ",
"skipped entry %x - not found\n", i);
continue;
}
rv = prom_setprop(node, se->path, se->property,
se->value, se->value_len );
if (rv == PROM_ERROR)
prom_printf("fixup_device_tree_efika: ",
"skipped entry %x - setprop error\n", i);
}
}
#else
#define fixup_device_tree_efika()
#endif
static void __init fixup_device_tree(void)
{
fixup_device_tree_maple();
fixup_device_tree_chrp();
fixup_device_tree_pmac();
fixup_device_tree_efika();
}
static void __init prom_find_boot_cpu(void)

8
arch/powerpc/kernel/setup_32.c
View File

@ -116,12 +116,8 @@ unsigned long __init early_init(unsigned long dt_ptr)
*/
void __init machine_init(unsigned long dt_ptr, unsigned long phys)
{
/* If btext is enabled, we might have a BAT setup for early display,
* thus we do enable some very basic udbg output
*/
#ifdef CONFIG_BOOTX_TEXT
udbg_putc = btext_drawchar;
#endif
/* Enable early debugging if any specified (see udbg.h) */
udbg_early_init();
/* Do some early initialization based on the flat device tree */
early_init_devtree(__va(dt_ptr));

23
arch/powerpc/kernel/smp.c
View File

@ -78,29 +78,6 @@ int smt_enabled_at_boot = 1;
static void (*crash_ipi_function_ptr)(struct pt_regs *) = NULL;
#ifdef CONFIG_MPIC
int __init smp_mpic_probe(void)
{
int nr_cpus;
DBG("smp_mpic_probe()...\n");
nr_cpus = cpus_weight(cpu_possible_map);
DBG("nr_cpus: %d\n", nr_cpus);
if (nr_cpus > 1)
mpic_request_ipis();
return nr_cpus;
}
void __devinit smp_mpic_setup_cpu(int cpu)
{
mpic_setup_this_cpu();
}
#endif /* CONFIG_MPIC */
#ifdef CONFIG_PPC64
void __devinit smp_generic_kick_cpu(int nr)
{

2
arch/powerpc/kernel/udbg.c
View File

@ -49,6 +49,8 @@ void __init udbg_early_init(void)
udbg_init_debug_beat();
#elif defined(CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE)
udbg_init_pas_realmode();
#elif defined(CONFIG_BOOTX_TEXT)
udbg_init_btext();
#endif
}

34
arch/powerpc/kernel/vdso.c
View File

@ -49,24 +49,23 @@
/* Max supported size for symbol names */
#define MAX_SYMNAME 64
#define VDSO32_MAXPAGES (((0x3000 + PAGE_MASK) >> PAGE_SHIFT) + 2)
#define VDSO64_MAXPAGES (((0x3000 + PAGE_MASK) >> PAGE_SHIFT) + 2)
extern char vdso32_start, vdso32_end;
static void *vdso32_kbase = &vdso32_start;
unsigned int vdso32_pages;
static struct page *vdso32_pagelist[VDSO32_MAXPAGES];
static unsigned int vdso32_pages;
static struct page **vdso32_pagelist;
unsigned long vdso32_sigtramp;
unsigned long vdso32_rt_sigtramp;
#ifdef CONFIG_PPC64
extern char vdso64_start, vdso64_end;
static void *vdso64_kbase = &vdso64_start;
unsigned int vdso64_pages;
static struct page *vdso64_pagelist[VDSO64_MAXPAGES];
static unsigned int vdso64_pages;
static struct page **vdso64_pagelist;
unsigned long vdso64_rt_sigtramp;
#endif /* CONFIG_PPC64 */
static int vdso_ready;
/*
* The vdso data page (aka. systemcfg for old ppc64 fans) is here.
* Once the early boot kernel code no longer needs to muck around
@ -182,6 +181,9 @@ int arch_setup_additional_pages(struct linux_binprm *bprm,
unsigned long vdso_base;
int rc;
if (!vdso_ready)
return 0;
#ifdef CONFIG_PPC64
if (test_thread_flag(TIF_32BIT)) {
vdso_pagelist = vdso32_pagelist;
@ -661,7 +663,7 @@ static void __init vdso_setup_syscall_map(void)
}
void __init vdso_init(void)
static int __init vdso_init(void)
{
int i;
@ -716,11 +718,13 @@ void __init vdso_init(void)
#ifdef CONFIG_PPC64
vdso64_pages = 0;
#endif
return;
return 0;
}
/* Make sure pages are in the correct state */
BUG_ON(vdso32_pages + 2 > VDSO32_MAXPAGES);
vdso32_pagelist = kzalloc(sizeof(struct page *) * (vdso32_pages + 2),
GFP_KERNEL);
BUG_ON(vdso32_pagelist == NULL);
for (i = 0; i < vdso32_pages; i++) {
struct page *pg = virt_to_page(vdso32_kbase + i*PAGE_SIZE);
ClearPageReserved(pg);
@ -731,7 +735,9 @@ void __init vdso_init(void)
vdso32_pagelist[i] = NULL;
#ifdef CONFIG_PPC64
BUG_ON(vdso64_pages + 2 > VDSO64_MAXPAGES);
vdso64_pagelist = kzalloc(sizeof(struct page *) * (vdso64_pages + 2),
GFP_KERNEL);
BUG_ON(vdso64_pagelist == NULL);
for (i = 0; i < vdso64_pages; i++) {
struct page *pg = virt_to_page(vdso64_kbase + i*PAGE_SIZE);
ClearPageReserved(pg);
@ -743,7 +749,13 @@ void __init vdso_init(void)
#endif /* CONFIG_PPC64 */
get_page(virt_to_page(vdso_data));
smp_wmb();
vdso_ready = 1;
return 0;
}
arch_initcall(vdso_init);
int in_gate_area_no_task(unsigned long addr)
{

3
arch/powerpc/mm/mem.c
View File

@ -384,9 +384,6 @@ void __init mem_init(void)
initsize >> 10);
mem_init_done = 1;
/* Initialize the vDSO */
vdso_init();
}
/*

2
arch/powerpc/mm/pgtable_32.c
View File

@ -295,7 +295,7 @@ void __init mapin_ram(void)
}
/* is x a power of 4? */
#define is_power_of_4(x) is_power_of_2(x) && (ffs(x) & 1))
#define is_power_of_4(x) is_power_of_2(x) && (ffs(x) & 1)
/*
* Set up a mapping for a block of I/O.

149
arch/powerpc/oprofile/op_model_cell.c
View File

@ -39,10 +39,17 @@
#include "../platforms/cell/interrupt.h"
#define PPU_CYCLES_EVENT_NUM 1 /* event number for CYCLES */
#define PPU_CYCLES_GRP_NUM 1 /* special group number for identifying
* PPU_CYCLES event
*/
#define CBE_COUNT_ALL_CYCLES 0x42800000 /* PPU cycle event specifier */
#define NUM_THREADS 2
#define VIRT_CNTR_SW_TIME_NS 100000000 // 0.5 seconds
#define NUM_THREADS 2 /* number of physical threads in
* physical processor
*/
#define NUM_TRACE_BUS_WORDS 4
#define NUM_INPUT_BUS_WORDS 2
struct pmc_cntrl_data {
unsigned long vcntr;
@ -58,7 +65,7 @@ struct pmc_cntrl_data {
struct pm_signal {
u16 cpu; /* Processor to modify */
u16 sub_unit; /* hw subunit this applies to (if applicable) */
u16 signal_group; /* Signal Group to Enable/Disable */
short int signal_group; /* Signal Group to Enable/Disable */
u8 bus_word; /* Enable/Disable on this Trace/Trigger/Event
* Bus Word(s) (bitmask)
*/
@ -93,7 +100,6 @@ static struct {
u32 pm07_cntrl[NR_PHYS_CTRS];
} pm_regs;
#define GET_SUB_UNIT(x) ((x & 0x0000f000) >> 12)
#define GET_BUS_WORD(x) ((x & 0x000000f0) >> 4)
#define GET_BUS_TYPE(x) ((x & 0x00000300) >> 8)
@ -101,7 +107,6 @@ static struct {
#define GET_COUNT_CYCLES(x) (x & 0x00000001)
#define GET_INPUT_CONTROL(x) ((x & 0x00000004) >> 2)
static DEFINE_PER_CPU(unsigned long[NR_PHYS_CTRS], pmc_values);
static struct pmc_cntrl_data pmc_cntrl[NUM_THREADS][NR_PHYS_CTRS];
@ -129,8 +134,8 @@ static spinlock_t virt_cntr_lock = SPIN_LOCK_UNLOCKED;
static u32 ctr_enabled;
static unsigned char trace_bus[4];
static unsigned char input_bus[2];
static unsigned char trace_bus[NUM_TRACE_BUS_WORDS];
static unsigned char input_bus[NUM_INPUT_BUS_WORDS];
/*
* Firmware interface functions
@ -177,25 +182,40 @@ static void pm_rtas_reset_signals(u32 node)
static void pm_rtas_activate_signals(u32 node, u32 count)
{
int ret;
int j;
int i, j;
struct pm_signal pm_signal_local[NR_PHYS_CTRS];
/* There is no debug setup required for the cycles event.
* Note that only events in the same group can be used.
* Otherwise, there will be conflicts in correctly routing
* the signals on the debug bus. It is the responsiblity
* of the OProfile user tool to check the events are in
* the same group.
*/
i = 0;
for (j = 0; j < count; j++) {
/* fw expects physical cpu # */
pm_signal_local[j].cpu = node;
pm_signal_local[j].signal_group = pm_signal[j].signal_group;
pm_signal_local[j].bus_word = pm_signal[j].bus_word;
pm_signal_local[j].sub_unit = pm_signal[j].sub_unit;
pm_signal_local[j].bit = pm_signal[j].bit;
if (pm_signal[j].signal_group != PPU_CYCLES_GRP_NUM) {
/* fw expects physical cpu # */
pm_signal_local[i].cpu = node;
pm_signal_local[i].signal_group
= pm_signal[j].signal_group;
pm_signal_local[i].bus_word = pm_signal[j].bus_word;
pm_signal_local[i].sub_unit = pm_signal[j].sub_unit;
pm_signal_local[i].bit = pm_signal[j].bit;
i++;
}
}
ret = rtas_ibm_cbe_perftools(SUBFUNC_ACTIVATE, PASSTHRU_ENABLE,
pm_signal_local,
count * sizeof(struct pm_signal));
if (i != 0) {
ret = rtas_ibm_cbe_perftools(SUBFUNC_ACTIVATE, PASSTHRU_ENABLE,
pm_signal_local,
i * sizeof(struct pm_signal));
if (ret)
printk(KERN_WARNING "%s: rtas returned: %d\n",
__FUNCTION__, ret);
if (ret)
printk(KERN_WARNING "%s: rtas returned: %d\n",
__FUNCTION__, ret);
}
}
/*
@ -212,7 +232,7 @@ static void set_pm_event(u32 ctr, int event, u32 unit_mask)
/* Special Event: Count all cpu cycles */
pm_regs.pm07_cntrl[ctr] = CBE_COUNT_ALL_CYCLES;
p = &(pm_signal[ctr]);
p->signal_group = 21;
p->signal_group = PPU_CYCLES_GRP_NUM;
p->bus_word = 1;
p->sub_unit = 0;
p->bit = 0;
@ -232,13 +252,21 @@ static void set_pm_event(u32 ctr, int event, u32 unit_mask)
p->signal_group = event / 100;
p->bus_word = bus_word;
p->sub_unit = unit_mask & 0x0000f000;
p->sub_unit = (unit_mask & 0x0000f000) >> 12;
pm_regs.pm07_cntrl[ctr] = 0;
pm_regs.pm07_cntrl[ctr] |= PM07_CTR_COUNT_CYCLES(count_cycles);
pm_regs.pm07_cntrl[ctr] |= PM07_CTR_POLARITY(polarity);
pm_regs.pm07_cntrl[ctr] |= PM07_CTR_INPUT_CONTROL(input_control);
/* Some of the islands signal selection is based on 64 bit words.
* The debug bus words are 32 bits, the input words to the performance
* counters are defined as 32 bits. Need to convert the 64 bit island
* specification to the appropriate 32 input bit and bus word for the
* performance counter event selection. See the CELL Performance
* monitoring signals manual and the Perf cntr hardware descriptions
* for the details.
*/
if (input_control == 0) {
if (signal_bit > 31) {
signal_bit -= 32;
@ -259,12 +287,12 @@ static void set_pm_event(u32 ctr, int event, u32 unit_mask)
p->bit = signal_bit;
}
for (i = 0; i < 4; i++) {
for (i = 0; i < NUM_TRACE_BUS_WORDS; i++) {
if (bus_word & (1 << i)) {
pm_regs.debug_bus_control |=
(bus_type << (31 - (2 * i) + 1));
for (j = 0; j < 2; j++) {
for (j = 0; j < NUM_INPUT_BUS_WORDS; j++) {
if (input_bus[j] == 0xff) {
input_bus[j] = i;
pm_regs.group_control |=
@ -278,52 +306,58 @@ out:
;
}
static void write_pm_cntrl(int cpu, struct pm_cntrl *pm_cntrl)
static void write_pm_cntrl(int cpu)
{
/* Oprofile will use 32 bit counters, set bits 7:10 to 0 */
/* Oprofile will use 32 bit counters, set bits 7:10 to 0
* pmregs.pm_cntrl is a global
*/
u32 val = 0;
if (pm_cntrl->enable == 1)
if (pm_regs.pm_cntrl.enable == 1)
val |= CBE_PM_ENABLE_PERF_MON;
if (pm_cntrl->stop_at_max == 1)
if (pm_regs.pm_cntrl.stop_at_max == 1)
val |= CBE_PM_STOP_AT_MAX;
if (pm_cntrl->trace_mode == 1)
val |= CBE_PM_TRACE_MODE_SET(pm_cntrl->trace_mode);
if (pm_regs.pm_cntrl.trace_mode == 1)
val |= CBE_PM_TRACE_MODE_SET(pm_regs.pm_cntrl.trace_mode);
if (pm_cntrl->freeze == 1)
if (pm_regs.pm_cntrl.freeze == 1)
val |= CBE_PM_FREEZE_ALL_CTRS;
/* Routine set_count_mode must be called previously to set
* the count mode based on the user selection of user and kernel.
*/
val |= CBE_PM_COUNT_MODE_SET(pm_cntrl->count_mode);
val |= CBE_PM_COUNT_MODE_SET(pm_regs.pm_cntrl.count_mode);
cbe_write_pm(cpu, pm_control, val);
}
static inline void
set_count_mode(u32 kernel, u32 user, struct pm_cntrl *pm_cntrl)
set_count_mode(u32 kernel, u32 user)
{
/* The user must specify user and kernel if they want them. If
* neither is specified, OProfile will count in hypervisor mode
* neither is specified, OProfile will count in hypervisor mode.
* pm_regs.pm_cntrl is a global
*/
if (kernel) {
if (user)
pm_cntrl->count_mode = CBE_COUNT_ALL_MODES;
pm_regs.pm_cntrl.count_mode = CBE_COUNT_ALL_MODES;
else
pm_cntrl->count_mode = CBE_COUNT_SUPERVISOR_MODE;
pm_regs.pm_cntrl.count_mode =
CBE_COUNT_SUPERVISOR_MODE;
} else {
if (user)
pm_cntrl->count_mode = CBE_COUNT_PROBLEM_MODE;
pm_regs.pm_cntrl.count_mode = CBE_COUNT_PROBLEM_MODE;
else
pm_cntrl->count_mode = CBE_COUNT_HYPERVISOR_MODE;
pm_regs.pm_cntrl.count_mode =
CBE_COUNT_HYPERVISOR_MODE;
}
}
static inline void enable_ctr(u32 cpu, u32 ctr, u32 * pm07_cntrl)
{
pm07_cntrl[ctr] |= PM07_CTR_ENABLE(1);
pm07_cntrl[ctr] |= CBE_PM_CTR_ENABLE;
cbe_write_pm07_control(cpu, ctr, pm07_cntrl[ctr]);
}
@ -365,6 +399,14 @@ static void cell_virtual_cntr(unsigned long data)
hdw_thread = 1 ^ hdw_thread;
next_hdw_thread = hdw_thread;
for (i = 0; i < num_counters; i++)
/* There are some per thread events. Must do the
* set event, for the thread that is being started
*/
set_pm_event(i,
pmc_cntrl[next_hdw_thread][i].evnts,
pmc_cntrl[next_hdw_thread][i].masks);
/* The following is done only once per each node, but
* we need cpu #, not node #, to pass to the cbe_xxx functions.
*/
@ -385,12 +427,13 @@ static void cell_virtual_cntr(unsigned long data)
== 0xFFFFFFFF)
/* If the cntr value is 0xffffffff, we must
* reset that to 0xfffffff0 when the current
* thread is restarted. This will generate a new
* interrupt and make sure that we never restore
* the counters to the max value. If the counters
* were restored to the max value, they do not
* increment and no interrupts are generated. Hence
* no more samples will be collected on that cpu.
* thread is restarted. This will generate a
* new interrupt and make sure that we never
* restore the counters to the max value. If
* the counters were restored to the max value,
* they do not increment and no interrupts are
* generated. Hence no more samples will be
* collected on that cpu.
*/
cbe_write_ctr(cpu, i, 0xFFFFFFF0);
else
@ -410,9 +453,6 @@ static void cell_virtual_cntr(unsigned long data)
* Must do the set event, enable_cntr
* for each cpu.
*/
set_pm_event(i,
pmc_cntrl[next_hdw_thread][i].evnts,
pmc_cntrl[next_hdw_thread][i].masks);
enable_ctr(cpu, i,
pm_regs.pm07_cntrl);
} else {
@ -465,8 +505,7 @@ cell_reg_setup(struct op_counter_config *ctr,
pm_regs.pm_cntrl.trace_mode = 0;
pm_regs.pm_cntrl.freeze = 1;
set_count_mode(sys->enable_kernel, sys->enable_user,
&pm_regs.pm_cntrl);
set_count_mode(sys->enable_kernel, sys->enable_user);
/* Setup the thread 0 events */
for (i = 0; i < num_ctrs; ++i) {
@ -498,10 +537,10 @@ cell_reg_setup(struct op_counter_config *ctr,
pmc_cntrl[1][i].vcntr = i;
}
for (i = 0; i < 4; i++)
for (i = 0; i < NUM_TRACE_BUS_WORDS; i++)
trace_bus[i] = 0xff;
for (i = 0; i < 2; i++)
for (i = 0; i < NUM_INPUT_BUS_WORDS; i++)
input_bus[i] = 0xff;
/* Our counters count up, and "count" refers to
@ -560,7 +599,7 @@ static void cell_cpu_setup(struct op_counter_config *cntr)
cbe_write_pm(cpu, pm_start_stop, 0);
cbe_write_pm(cpu, group_control, pm_regs.group_control);
cbe_write_pm(cpu, debug_bus_control, pm_regs.debug_bus_control);
write_pm_cntrl(cpu, &pm_regs.pm_cntrl);
write_pm_cntrl(cpu);
for (i = 0; i < num_counters; ++i) {
if (ctr_enabled & (1 << i)) {
@ -602,7 +641,7 @@ static void cell_global_start(struct op_counter_config *ctr)
}
}
cbe_clear_pm_interrupts(cpu);
cbe_get_and_clear_pm_interrupts(cpu);
cbe_enable_pm_interrupts(cpu, hdw_thread, interrupt_mask);
cbe_enable_pm(cpu);
}
@ -672,7 +711,7 @@ cell_handle_interrupt(struct pt_regs *regs, struct op_counter_config *ctr)
cbe_disable_pm(cpu);
interrupt_mask = cbe_clear_pm_interrupts(cpu);
interrupt_mask = cbe_get_and_clear_pm_interrupts(cpu);
/* If the interrupt mask has been cleared, then the virt cntr
* has cleared the interrupt. When the thread that generated

2
arch/powerpc/platforms/52xx/Makefile
View File

@ -6,5 +6,5 @@ obj-y += mpc52xx_pic.o mpc52xx_common.o
obj-$(CONFIG_PCI) += mpc52xx_pci.o
endif
obj-$(CONFIG_PPC_EFIKA) += efika-setup.o efika-pci.o
obj-$(CONFIG_PPC_EFIKA) += efika.o
obj-$(CONFIG_PPC_LITE5200) += lite5200.o

119
arch/powerpc/platforms/52xx/efika-pci.c
View File

@ -1,119 +0,0 @@
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/string.h>
#include <linux/init.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/prom.h>
#include <asm/machdep.h>
#include <asm/sections.h>
#include <asm/pci-bridge.h>
#include <asm/rtas.h>
#include "efika.h"
#ifdef CONFIG_PCI
/*
* Access functions for PCI config space using RTAS calls.
*/
static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
int len, u32 * val)
{
struct pci_controller *hose = bus->sysdata;
unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
| (((bus->number - hose->first_busno) & 0xff) << 16)
| (hose->index << 24);
int ret = -1;
int rval;
rval = rtas_call(rtas_token("read-pci-config"), 2, 2, &ret, addr, len);
*val = ret;
return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
}
static int rtas_write_config(struct pci_bus *bus, unsigned int devfn,
int offset, int len, u32 val)
{
struct pci_controller *hose = bus->sysdata;
unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
| (((bus->number - hose->first_busno) & 0xff) << 16)
| (hose->index << 24);
int rval;
rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL,
addr, len, val);
return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
}
static struct pci_ops rtas_pci_ops = {
rtas_read_config,
rtas_write_config
};
void __init efika_pcisetup(void)
{
const int *bus_range;
int len;
struct pci_controller *hose;
struct device_node *root;
struct device_node *pcictrl;
root = of_find_node_by_path("/");
if (root == NULL) {
printk(KERN_WARNING EFIKA_PLATFORM_NAME
": Unable to find the root node\n");
return;
}
for (pcictrl = NULL;;) {
pcictrl = of_get_next_child(root, pcictrl);
if ((pcictrl == NULL) || (strcmp(pcictrl->name, "pci") == 0))
break;
}
of_node_put(root);
if (pcictrl == NULL) {
printk(KERN_WARNING EFIKA_PLATFORM_NAME
": Unable to find the PCI bridge node\n");
return;
}
bus_range = get_property(pcictrl, "bus-range", &len);
if (bus_range == NULL || len < 2 * sizeof(int)) {
printk(KERN_WARNING EFIKA_PLATFORM_NAME
": Can't get bus-range for %s\n", pcictrl->full_name);
return;
}
if (bus_range[1] == bus_range[0])
printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI bus %d",
bus_range[0]);
else
printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI buses %d..%d",
bus_range[0], bus_range[1]);
printk(" controlled by %s\n", pcictrl->full_name);
printk("\n");
hose = pcibios_alloc_controller();
if (!hose) {
printk(KERN_WARNING EFIKA_PLATFORM_NAME
": Can't allocate PCI controller structure for %s\n",
pcictrl->full_name);
return;
}
hose->arch_data = of_node_get(pcictrl);
hose->first_busno = bus_range[0];
hose->last_busno = bus_range[1];
hose->ops = &rtas_pci_ops;
pci_process_bridge_OF_ranges(hose, pcictrl, 0);
}
#else
void __init efika_pcisetup(void)
{}
#endif

150
arch/powerpc/platforms/52xx/efika-setup.c
View File

@ -1,150 +0,0 @@
/*
*
* Efika 5K2 platform setup
* Some code really inspired from the lite5200b platform.
*
* Copyright (C) 2006 bplan GmbH
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*
*/
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/reboot.h>
#include <linux/init.h>
#include <linux/utsrelease.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <linux/initrd.h>
#include <linux/timer.h>
#include <linux/pci.h>
#include <asm/pgtable.h>
#include <asm/prom.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/rtas.h>
#include <asm/of_device.h>
#include <asm/of_platform.h>
#include <asm/mpc52xx.h>
#include "efika.h"
static void efika_show_cpuinfo(struct seq_file *m)
{
struct device_node *root;
const char *revision = NULL;
const char *codegendescription = NULL;
const char *codegenvendor = NULL;
root = of_find_node_by_path("/");
if (root) {
revision = get_property(root, "revision", NULL);
codegendescription =
get_property(root, "CODEGEN,description", NULL);
codegenvendor = get_property(root, "CODEGEN,vendor", NULL);
of_node_put(root);
}
if (codegendescription)
seq_printf(m, "machine\t\t: %s\n", codegendescription);
else
seq_printf(m, "machine\t\t: Efika\n");
if (revision)
seq_printf(m, "revision\t: %s\n", revision);
if (codegenvendor)
seq_printf(m, "vendor\t\t: %s\n", codegenvendor);
of_node_put(root);
}
static void __init efika_setup_arch(void)
{
rtas_initialize();
#ifdef CONFIG_BLK_DEV_INITRD
initrd_below_start_ok = 1;
if (initrd_start)
ROOT_DEV = Root_RAM0;
else
#endif
ROOT_DEV = Root_SDA2; /* sda2 (sda1 is for the kernel) */
efika_pcisetup();
if (ppc_md.progress)
ppc_md.progress("Linux/PPC " UTS_RELEASE " runnung on Efika ;-)\n", 0x0);
}
static void __init efika_init(void)
{
struct device_node *np;
struct device_node *cnp = NULL;
const u32 *base;
/* Find every child of the SOC node and add it to of_platform */
np = of_find_node_by_name(NULL, "builtin");
if (np) {
char name[BUS_ID_SIZE];
while ((cnp = of_get_next_child(np, cnp))) {
strcpy(name, cnp->name);
base = get_property(cnp, "reg", NULL);
if (base == NULL)
continue;
snprintf(name+strlen(name), BUS_ID_SIZE, "@%x", *base);
of_platform_device_create(cnp, name, NULL);
printk(KERN_INFO EFIKA_PLATFORM_NAME" : Added %s (type '%s' at '%s') to the known devices\n", name, cnp->type, cnp->full_name);
}
}
if (ppc_md.progress)
ppc_md.progress(" Have fun with your Efika! ", 0x7777);
}
static int __init efika_probe(void)
{
char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
"model", NULL);
if (model == NULL)
return 0;
if (strcmp(model, "EFIKA5K2"))
return 0;
ISA_DMA_THRESHOLD = ~0L;
DMA_MODE_READ = 0x44;
DMA_MODE_WRITE = 0x48;
return 1;
}
define_machine(efika)
{
.name = EFIKA_PLATFORM_NAME,
.probe = efika_probe,
.setup_arch = efika_setup_arch,
.init = efika_init,
.show_cpuinfo = efika_show_cpuinfo,
.init_IRQ = mpc52xx_init_irq,
.get_irq = mpc52xx_get_irq,
.restart = rtas_restart,
.power_off = rtas_power_off,
.halt = rtas_halt,
.set_rtc_time = rtas_set_rtc_time,
.get_rtc_time = rtas_get_rtc_time,
.progress = rtas_progress,
.get_boot_time = rtas_get_boot_time,
.calibrate_decr = generic_calibrate_decr,
.phys_mem_access_prot = pci_phys_mem_access_prot,
};

243
arch/powerpc/platforms/52xx/efika.c Normal file
View File

@ -0,0 +1,243 @@
/*
* Efika 5K2 platform code
* Some code really inspired from the lite5200b platform.
*
* Copyright (C) 2006 bplan GmbH
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/reboot.h>
#include <linux/init.h>
#include <linux/utsrelease.h>
#include <linux/seq_file.h>
#include <linux/string.h>
#include <linux/root_dev.h>
#include <linux/initrd.h>
#include <linux/timer.h>
#include <linux/pci.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/sections.h>
#include <asm/pci-bridge.h>
#include <asm/pgtable.h>
#include <asm/prom.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/rtas.h>
#include <asm/of_device.h>
#include <asm/of_platform.h>
#include <asm/mpc52xx.h>
#define EFIKA_PLATFORM_NAME "Efika"
/* ------------------------------------------------------------------------ */
/* PCI accesses thru RTAS */
/* ------------------------------------------------------------------------ */
#ifdef CONFIG_PCI
/*
* Access functions for PCI config space using RTAS calls.
*/
static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
int len, u32 * val)
{
struct pci_controller *hose = bus->sysdata;
unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
| (((bus->number - hose->first_busno) & 0xff) << 16)
| (hose->index << 24);
int ret = -1;
int rval;
rval = rtas_call(rtas_token("read-pci-config"), 2, 2, &ret, addr, len);
*val = ret;
return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
}
static int rtas_write_config(struct pci_bus *bus, unsigned int devfn,
int offset, int len, u32 val)
{
struct pci_controller *hose = bus->sysdata;
unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
| (((bus->number - hose->first_busno) & 0xff) << 16)
| (hose->index << 24);
int rval;
rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL,
addr, len, val);
return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
}
static struct pci_ops rtas_pci_ops = {
rtas_read_config,
rtas_write_config
};
void __init efika_pcisetup(void)
{
const int *bus_range;
int len;
struct pci_controller *hose;
struct device_node *root;
struct device_node *pcictrl;
root = of_find_node_by_path("/");
if (root == NULL) {
printk(KERN_WARNING EFIKA_PLATFORM_NAME
": Unable to find the root node\n");
return;
}
for (pcictrl = NULL;;) {
pcictrl = of_get_next_child(root, pcictrl);
if ((pcictrl == NULL) || (strcmp(pcictrl->name, "pci") == 0))
break;
}
of_node_put(root);
if (pcictrl == NULL) {
printk(KERN_WARNING EFIKA_PLATFORM_NAME
": Unable to find the PCI bridge node\n");
return;
}
bus_range = get_property(pcictrl, "bus-range", &len);
if (bus_range == NULL || len < 2 * sizeof(int)) {
printk(KERN_WARNING EFIKA_PLATFORM_NAME
": Can't get bus-range for %s\n", pcictrl->full_name);
return;
}
if (bus_range[1] == bus_range[0])
printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI bus %d",
bus_range[0]);
else
printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI buses %d..%d",
bus_range[0], bus_range[1]);
printk(" controlled by %s\n", pcictrl->full_name);
printk("\n");
hose = pcibios_alloc_controller();
if (!hose) {
printk(KERN_WARNING EFIKA_PLATFORM_NAME
": Can't allocate PCI controller structure for %s\n",
pcictrl->full_name);
return;
}
hose->arch_data = of_node_get(pcictrl);
hose->first_busno = bus_range[0];
hose->last_busno = bus_range[1];
hose->ops = &rtas_pci_ops;
pci_process_bridge_OF_ranges(hose, pcictrl, 0);
}
#else
void __init efika_pcisetup(void)
{}
#endif
/* ------------------------------------------------------------------------ */
/* Platform setup */
/* ------------------------------------------------------------------------ */
static void efika_show_cpuinfo(struct seq_file *m)
{
struct device_node *root;
const char *revision = NULL;
const char *codegendescription = NULL;
const char *codegenvendor = NULL;
root = of_find_node_by_path("/");
if (!root)
return;
revision = get_property(root, "revision", NULL);
codegendescription =
get_property(root, "CODEGEN,description", NULL);
codegenvendor = get_property(root, "CODEGEN,vendor", NULL);
if (codegendescription)
seq_printf(m, "machine\t\t: %s\n", codegendescription);
else
seq_printf(m, "machine\t\t: Efika\n");
if (revision)
seq_printf(m, "revision\t: %s\n", revision);
if (codegenvendor)
seq_printf(m, "vendor\t\t: %s\n", codegenvendor);
of_node_put(root);
}
static void __init efika_setup_arch(void)
{
rtas_initialize();
#ifdef CONFIG_BLK_DEV_INITRD
initrd_below_start_ok = 1;
if (initrd_start)
ROOT_DEV = Root_RAM0;
else
#endif
ROOT_DEV = Root_SDA2; /* sda2 (sda1 is for the kernel) */
efika_pcisetup();
if (ppc_md.progress)
ppc_md.progress("Linux/PPC " UTS_RELEASE " running on Efika ;-)\n", 0x0);
}
static int __init efika_probe(void)
{
char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
"model", NULL);
if (model == NULL)
return 0;
if (strcmp(model, "EFIKA5K2"))
return 0;
ISA_DMA_THRESHOLD = ~0L;
DMA_MODE_READ = 0x44;
DMA_MODE_WRITE = 0x48;
return 1;
}
define_machine(efika)
{
.name = EFIKA_PLATFORM_NAME,
.probe = efika_probe,
.setup_arch = efika_setup_arch,
.init = mpc52xx_declare_of_platform_devices,
.show_cpuinfo = efika_show_cpuinfo,
.init_IRQ = mpc52xx_init_irq,
.get_irq = mpc52xx_get_irq,
.restart = rtas_restart,
.power_off = rtas_power_off,
.halt = rtas_halt,
.set_rtc_time = rtas_set_rtc_time,
.get_rtc_time = rtas_get_rtc_time,
.progress = rtas_progress,
.get_boot_time = rtas_get_boot_time,
.calibrate_decr = generic_calibrate_decr,
.phys_mem_access_prot = pci_phys_mem_access_prot,
};

19
arch/powerpc/platforms/52xx/efika.h
View File

@ -1,19 +0,0 @@
/*
* Efika 5K2 platform setup - Header file
*
* Copyright (C) 2006 bplan GmbH
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*
*/
#ifndef __ARCH_POWERPC_EFIKA__
#define __ARCH_POWERPC_EFIKA__
#define EFIKA_PLATFORM_NAME "Efika"
extern void __init efika_pcisetup(void);
#endif

29
arch/powerpc/platforms/52xx/lite5200.c
View File

@ -51,13 +51,13 @@
*/
static void __init
lite52xx_setup_cpu(void)
lite5200_setup_cpu(void)
{
struct mpc52xx_gpio __iomem *gpio;
u32 port_config;
/* Map zones */
gpio = mpc52xx_find_and_map("mpc52xx-gpio");
gpio = mpc52xx_find_and_map("mpc5200-gpio");
if (!gpio) {
printk(KERN_ERR __FILE__ ": "
"Error while mapping GPIO register for port config. "
@ -85,12 +85,12 @@ error:
iounmap(gpio);
}
static void __init lite52xx_setup_arch(void)
static void __init lite5200_setup_arch(void)
{
struct device_node *np;
if (ppc_md.progress)
ppc_md.progress("lite52xx_setup_arch()", 0);
ppc_md.progress("lite5200_setup_arch()", 0);
np = of_find_node_by_type(NULL, "cpu");
if (np) {
@ -105,7 +105,7 @@ static void __init lite52xx_setup_arch(void)
/* CPU & Port mux setup */
mpc52xx_setup_cpu(); /* Generic */
lite52xx_setup_cpu(); /* Platorm specific */
lite5200_setup_cpu(); /* Platorm specific */
#ifdef CONFIG_PCI
np = of_find_node_by_type(np, "pci");
@ -126,7 +126,7 @@ static void __init lite52xx_setup_arch(void)
}
void lite52xx_show_cpuinfo(struct seq_file *m)
void lite5200_show_cpuinfo(struct seq_file *m)
{
struct device_node* np = of_find_all_nodes(NULL);
const char *model = NULL;
@ -143,25 +143,26 @@ void lite52xx_show_cpuinfo(struct seq_file *m)
/*
* Called very early, MMU is off, device-tree isn't unflattened
*/
static int __init lite52xx_probe(void)
static int __init lite5200_probe(void)
{
unsigned long node = of_get_flat_dt_root();
const char *model = of_get_flat_dt_prop(node, "model", NULL);
if (!of_flat_dt_is_compatible(node, "lite52xx"))
if (!of_flat_dt_is_compatible(node, "fsl,lite5200") &&
!of_flat_dt_is_compatible(node, "fsl,lite5200b"))
return 0;
pr_debug("%s board w/ mpc52xx found\n", model ? model : "unknown");
pr_debug("%s board found\n", model ? model : "unknown");
return 1;
}
define_machine(lite52xx) {
.name = "lite52xx",
.probe = lite52xx_probe,
.setup_arch = lite52xx_setup_arch,
define_machine(lite5200) {
.name = "lite5200",
.probe = lite5200_probe,
.setup_arch = lite5200_setup_arch,
.init = mpc52xx_declare_of_platform_devices,
.init_IRQ = mpc52xx_init_irq,
.get_irq = mpc52xx_get_irq,
.show_cpuinfo = lite52xx_show_cpuinfo,
.show_cpuinfo = lite5200_show_cpuinfo,
.calibrate_decr = generic_calibrate_decr,
};

4
arch/powerpc/platforms/52xx/mpc52xx_common.c
View File

@ -83,8 +83,8 @@ mpc52xx_setup_cpu(void)
struct mpc52xx_xlb __iomem *xlb;
/* Map zones */
cdm = mpc52xx_find_and_map("mpc52xx-cdm");
xlb = mpc52xx_find_and_map("mpc52xx-xlb");
cdm = mpc52xx_find_and_map("mpc5200-cdm");
xlb = mpc52xx_find_and_map("mpc5200-xlb");
if (!cdm || !xlb) {
printk(KERN_ERR __FILE__ ": "

10
arch/powerpc/platforms/52xx/mpc52xx_pic.c
View File

@ -383,16 +383,16 @@ void __init mpc52xx_init_irq(void)
struct device_node *picnode;
/* Remap the necessary zones */
picnode = of_find_compatible_node(NULL, NULL, "mpc52xx-pic");
picnode = of_find_compatible_node(NULL, NULL, "mpc5200-pic");
intr = mpc52xx_find_and_map("mpc52xx-pic");
intr = mpc52xx_find_and_map("mpc5200-pic");
if (!intr)
panic(__FILE__ ": find_and_map failed on 'mpc52xx-pic'. "
panic(__FILE__ ": find_and_map failed on 'mpc5200-pic'. "
"Check node !");
sdma = mpc52xx_find_and_map("mpc52xx-bestcomm");
sdma = mpc52xx_find_and_map("mpc5200-bestcomm");
if (!sdma)
panic(__FILE__ ": find_and_map failed on 'mpc52xx-bestcomm'. "
panic(__FILE__ ": find_and_map failed on 'mpc5200-bestcomm'. "
"Check node !");
/* Disable all interrupt sources. */

24
arch/powerpc/platforms/83xx/Kconfig
View File

@ -3,7 +3,13 @@ menu "Platform support"
choice
prompt "Machine Type"
default MPC834x_SYS
default MPC834x_MDS
config MPC8313_RDB
bool "Freescale MPC8313 RDB"
select DEFAULT_UIMAGE
help
This option enables support for the MPC8313 RDB board.
config MPC832x_MDS
bool "Freescale MPC832x MDS"
@ -12,13 +18,13 @@ config MPC832x_MDS
help
This option enables support for the MPC832x MDS evaluation board.
config MPC834x_SYS
bool "Freescale MPC834x SYS"
config MPC834x_MDS
bool "Freescale MPC834x MDS"
select DEFAULT_UIMAGE
help
This option enables support for the MPC 834x SYS evaluation board.
This option enables support for the MPC 834x MDS evaluation board.
Be aware that PCI buses can only function when SYS board is plugged
Be aware that PCI buses can only function when MDS board is plugged
into the PIB (Platform IO Board) board from Freescale which provide
3 PCI slots. The PIBs PCI initialization is the bootloader's
responsibility.
@ -41,6 +47,12 @@ config MPC8360E_PB
endchoice
config PPC_MPC831x
bool
select PPC_UDBG_16550
select PPC_INDIRECT_PCI
default y if MPC8313_RDB
config PPC_MPC832x
bool
select PPC_UDBG_16550
@ -51,7 +63,7 @@ config MPC834x
bool
select PPC_UDBG_16550
select PPC_INDIRECT_PCI
default y if MPC834x_SYS || MPC834x_ITX
default y if MPC834x_MDS || MPC834x_ITX
config PPC_MPC836x
bool

3
arch/powerpc/platforms/83xx/Makefile
View File

@ -3,7 +3,8 @@
#
obj-y := misc.o
obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_MPC834x_SYS) += mpc834x_sys.o
obj-$(CONFIG_MPC8313_RDB) += mpc8313_rdb.o
obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o
obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o
obj-$(CONFIG_MPC8360E_PB) += mpc8360e_pb.o
obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o

99
arch/powerpc/platforms/83xx/mpc8313_rdb.c Normal file
View File

@ -0,0 +1,99 @@
/*
* arch/powerpc/platforms/83xx/mpc8313_rdb.c
*
* Description: MPC8313x RDB board specific routines.
* This file is based on mpc834x_sys.c
* Author: Lo Wlison <r43300@freescale.com>
*
* Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/pci.h>
#include <asm/time.h>
#include <asm/ipic.h>
#include <asm/udbg.h>
#include "mpc83xx.h"
#undef DEBUG
#ifdef DEBUG
#define DBG(fmt...) udbg_printf(fmt)
#else
#define DBG(fmt...)
#endif
#ifndef CONFIG_PCI
unsigned long isa_io_base = 0;
unsigned long isa_mem_base = 0;
#endif
/* ************************************************************************
*
* Setup the architecture
*
*/
static void __init mpc8313_rdb_setup_arch(void)
{
struct device_node *np;
if (ppc_md.progress)
ppc_md.progress("mpc8313_rdb_setup_arch()", 0);
#ifdef CONFIG_PCI
for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
add_bridge(np);
ppc_md.pci_exclude_device = mpc83xx_exclude_device;
#endif
}
void __init mpc8313_rdb_init_IRQ(void)
{
struct device_node *np;
np = of_find_node_by_type(NULL, "ipic");
if (!np)
return;
ipic_init(np, 0);
/* Initialize the default interrupt mapping priorities,
* in case the boot rom changed something on us.
*/
ipic_set_default_priority();
}
/*
* Called very early, MMU is off, device-tree isn't unflattened
*/
static int __init mpc8313_rdb_probe(void)
{
char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
"model", NULL);
if (model == NULL)
return 0;
if (strcmp(model, "MPC8313ERDB"))
return 0;
DBG("MPC8313 RDB found\n");
return 1;
}
define_machine(mpc8313_rdb) {
.name = "MPC8313 RDB",
.probe = mpc8313_rdb_probe,
.setup_arch = mpc8313_rdb_setup_arch,
.init_IRQ = mpc8313_rdb_init_IRQ,
.get_irq = ipic_get_irq,
.restart = mpc83xx_restart,
.time_init = mpc83xx_time_init,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};

2
arch/powerpc/platforms/83xx/mpc834x_itx.c
View File

@ -38,8 +38,6 @@
#include "mpc83xx.h"
#include <platforms/83xx/mpc834x_sys.h>
#ifndef CONFIG_PCI
unsigned long isa_io_base = 0;
unsigned long isa_mem_base = 0;

95
arch/powerpc/platforms/83xx/mpc834x_sys.c → arch/powerpc/platforms/83xx/mpc834x_mds.c
View File

@ -1,7 +1,7 @@
/*
* arch/powerpc/platforms/83xx/mpc834x_sys.c
* arch/powerpc/platforms/83xx/mpc834x_mds.c
*
* MPC834x SYS board specific routines
* MPC834x MDS board specific routines
*
* Maintainer: Kumar Gala <galak@kernel.crashing.org>
*
@ -43,17 +43,87 @@ unsigned long isa_io_base = 0;
unsigned long isa_mem_base = 0;
#endif
#define BCSR5_INT_USB 0x02
/* Note: This is only for PB, not for PB+PIB
* On PB only port0 is connected using ULPI */
static int mpc834x_usb_cfg(void)
{
unsigned long sccr, sicrl;
void __iomem *immap;
void __iomem *bcsr_regs = NULL;
u8 bcsr5;
struct device_node *np = NULL;
int port0_is_dr = 0;
if ((np = of_find_compatible_node(np, "usb", "fsl-usb2-dr")) != NULL)
port0_is_dr = 1;
if ((np = of_find_compatible_node(np, "usb", "fsl-usb2-mph")) != NULL){
if (port0_is_dr) {
printk(KERN_WARNING
"There is only one USB port on PB board! \n");
return -1;
} else if (!port0_is_dr)
/* No usb port enabled */
return -1;
}
immap = ioremap(get_immrbase(), 0x1000);
if (!immap)
return -1;
/* Configure clock */
sccr = in_be32(immap + MPC83XX_SCCR_OFFS);
if (port0_is_dr)
sccr |= MPC83XX_SCCR_USB_DRCM_11; /* 1:3 */
else
sccr |= MPC83XX_SCCR_USB_MPHCM_11; /* 1:3 */
out_be32(immap + MPC83XX_SCCR_OFFS, sccr);
/* Configure Pin */
sicrl = in_be32(immap + MPC83XX_SICRL_OFFS);
/* set port0 only */
if (port0_is_dr)
sicrl |= MPC83XX_SICRL_USB0;
else
sicrl &= ~(MPC83XX_SICRL_USB0);
out_be32(immap + MPC83XX_SICRL_OFFS, sicrl);
iounmap(immap);
/* Map BCSR area */
np = of_find_node_by_name(NULL, "bcsr");
if (np != 0) {
struct resource res;
of_address_to_resource(np, 0, &res);
bcsr_regs = ioremap(res.start, res.end - res.start + 1);
of_node_put(np);
}
if (!bcsr_regs)
return -1;
/*
* if MDS board is plug into PIB board,
* force to use the PHY on MDS board
*/
bcsr5 = in_8(bcsr_regs + 5);
if (!(bcsr5 & BCSR5_INT_USB))
out_8(bcsr_regs + 5, (bcsr5 | BCSR5_INT_USB));
iounmap(bcsr_regs);
return 0;
}
/* ************************************************************************
*
* Setup the architecture
*
*/
static void __init mpc834x_sys_setup_arch(void)
static void __init mpc834x_mds_setup_arch(void)
{
struct device_node *np;
if (ppc_md.progress)
ppc_md.progress("mpc834x_sys_setup_arch()", 0);
ppc_md.progress("mpc834x_mds_setup_arch()", 0);
np = of_find_node_by_type(NULL, "cpu");
if (np != 0) {
@ -65,6 +135,7 @@ static void __init mpc834x_sys_setup_arch(void)
loops_per_jiffy = 50000000 / HZ;
of_node_put(np);
}
#ifdef CONFIG_PCI
for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
add_bridge(np);
@ -72,6 +143,8 @@ static void __init mpc834x_sys_setup_arch(void)
ppc_md.pci_exclude_device = mpc83xx_exclude_device;
#endif
mpc834x_usb_cfg();
#ifdef CONFIG_ROOT_NFS
ROOT_DEV = Root_NFS;
#else
@ -79,7 +152,7 @@ static void __init mpc834x_sys_setup_arch(void)
#endif
}
static void __init mpc834x_sys_init_IRQ(void)
static void __init mpc834x_mds_init_IRQ(void)
{
struct device_node *np;
@ -119,7 +192,7 @@ late_initcall(mpc834x_rtc_hookup);
/*
* Called very early, MMU is off, device-tree isn't unflattened
*/
static int __init mpc834x_sys_probe(void)
static int __init mpc834x_mds_probe(void)
{
/* We always match for now, eventually we should look at the flat
dev tree to ensure this is the board we are suppose to run on
@ -127,11 +200,11 @@ static int __init mpc834x_sys_probe(void)
return 1;
}
define_machine(mpc834x_sys) {
.name = "MPC834x SYS",
.probe = mpc834x_sys_probe,
.setup_arch = mpc834x_sys_setup_arch,
.init_IRQ = mpc834x_sys_init_IRQ,
define_machine(mpc834x_mds) {
.name = "MPC834x MDS",
.probe = mpc834x_mds_probe,
.setup_arch = mpc834x_mds_setup_arch,
.init_IRQ = mpc834x_mds_init_IRQ,
.get_irq = ipic_get_irq,
.restart = mpc83xx_restart,
.time_init = mpc83xx_time_init,

23
arch/powerpc/platforms/83xx/mpc834x_sys.h
View File

@ -1,23 +0,0 @@
/*
* arch/powerpc/platforms/83xx/mpc834x_sys.h
*
* MPC834X SYS common board definitions
*
* Maintainer: Kumar Gala <galak@kernel.crashing.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#ifndef __MACH_MPC83XX_SYS_H__
#define __MACH_MPC83XX_SYS_H__
#define PIRQA MPC83xx_IRQ_EXT4
#define PIRQB MPC83xx_IRQ_EXT5
#define PIRQC MPC83xx_IRQ_EXT6
#define PIRQD MPC83xx_IRQ_EXT7
#endif /* __MACH_MPC83XX_SYS_H__ */

18
arch/powerpc/platforms/83xx/mpc83xx.h
View File

@ -4,6 +4,24 @@
#include <linux/init.h>
#include <linux/device.h>
/* System Clock Control Register */
#define MPC83XX_SCCR_OFFS 0xA08
#define MPC83XX_SCCR_USB_MPHCM_11 0x00c00000
#define MPC83XX_SCCR_USB_MPHCM_01 0x00400000
#define MPC83XX_SCCR_USB_MPHCM_10 0x00800000
#define MPC83XX_SCCR_USB_DRCM_11 0x00300000
#define MPC83XX_SCCR_USB_DRCM_01 0x00100000
#define MPC83XX_SCCR_USB_DRCM_10 0x00200000
/* system i/o configuration register low */
#define MPC83XX_SICRL_OFFS 0x114
#define MPC83XX_SICRL_USB0 0x40000000
#define MPC83XX_SICRL_USB1 0x20000000
/* system i/o configuration register high */
#define MPC83XX_SICRH_OFFS 0x118
#define MPC83XX_SICRH_USB_UTMI 0x00020000
/*
* Declaration for the various functions exported by the
* mpc83xx_* files. Mostly for use by mpc83xx_setup

13
arch/powerpc/platforms/85xx/Kconfig
View File

@ -23,6 +23,13 @@ config MPC85xx_CDS
help
This option enables support for the MPC85xx CDS board
config MPC8568_MDS
bool "Freescale MPC8568 MDS"
select DEFAULT_UIMAGE
# select QUICC_ENGINE
help
This option enables support for the MPC8568 MDS board
endchoice
config MPC8540
@ -36,6 +43,12 @@ config MPC8560
select PPC_INDIRECT_PCI
default y if MPC8560_ADS
config MPC85xx
bool
select PPC_UDBG_16550
select PPC_INDIRECT_PCI
default y if MPC8540_ADS || MPC85xx_CDS || MPC8560_ADS || MPC8568_MDS
config PPC_INDIRECT_PCI_BE
bool
depends on PPC_85xx

1
arch/powerpc/platforms/85xx/Makefile
View File

@ -5,3 +5,4 @@ obj-$(CONFIG_PPC_85xx) += misc.o pci.o
obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
obj-$(CONFIG_MPC8568_MDS) += mpc8568_mds.o

246
arch/powerpc/platforms/85xx/mpc8568_mds.c Normal file
View File

@ -0,0 +1,246 @@
/*
* Copyright (C) Freescale Semicondutor, Inc. 2006-2007. All rights reserved.
*
* Author: Andy Fleming <afleming@freescale.com>
*
* Based on 83xx/mpc8360e_pb.c by:
* Li Yang <LeoLi@freescale.com>
* Yin Olivia <Hong-hua.Yin@freescale.com>
*
* Description:
* MPC8568E MDS PB board specific routines.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/reboot.h>
#include <linux/pci.h>
#include <linux/kdev_t.h>
#include <linux/major.h>
#include <linux/console.h>
#include <linux/delay.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <linux/initrd.h>
#include <linux/module.h>
#include <linux/fsl_devices.h>
#include <asm/of_device.h>
#include <asm/of_platform.h>
#include <asm/system.h>
#include <asm/atomic.h>
#include <asm/time.h>
#include <asm/io.h>
#include <asm/machdep.h>
#include <asm/bootinfo.h>
#include <asm/pci-bridge.h>
#include <asm/mpc85xx.h>
#include <asm/irq.h>
#include <mm/mmu_decl.h>
#include <asm/prom.h>
#include <asm/udbg.h>
#include <sysdev/fsl_soc.h>
#include <asm/qe.h>
#include <asm/qe_ic.h>
#include <asm/mpic.h>
#include "mpc85xx.h"
#undef DEBUG
#ifdef DEBUG
#define DBG(fmt...) udbg_printf(fmt)
#else
#define DBG(fmt...)
#endif
#ifndef CONFIG_PCI
unsigned long isa_io_base = 0;
unsigned long isa_mem_base = 0;
#endif
/* ************************************************************************
*
* Setup the architecture
*
*/
static void __init mpc8568_mds_setup_arch(void)
{
struct device_node *np;
static u8 *bcsr_regs = NULL;
if (ppc_md.progress)
ppc_md.progress("mpc8568_mds_setup_arch()", 0);
np = of_find_node_by_type(NULL, "cpu");
if (np != NULL) {
const unsigned int *fp =
get_property(np, "clock-frequency", NULL);
if (fp != NULL)
loops_per_jiffy = *fp / HZ;
else
loops_per_jiffy = 50000000 / HZ;
of_node_put(np);
}
/* Map BCSR area */
np = of_find_node_by_name(NULL, "bcsr");
if (np != NULL) {
struct resource res;
of_address_to_resource(np, 0, &res);
bcsr_regs = ioremap(res.start, res.end - res.start +1);
of_node_put(np);
}
#ifdef CONFIG_PCI
for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) {
add_bridge(np);
}
of_node_put(np);
#endif
#ifdef CONFIG_QUICC_ENGINE
if ((np = of_find_node_by_name(NULL, "qe")) != NULL) {
qe_reset();
of_node_put(np);
}
if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
struct device_node *ucc = NULL;
par_io_init(np);
of_node_put(np);
for ( ;(ucc = of_find_node_by_name(ucc, "ucc")) != NULL;)
par_io_of_config(ucc);
of_node_put(ucc);
}
if (bcsr_regs) {
u8 bcsr_phy;
/* Reset the Ethernet PHY */
bcsr_phy = in_be8(&bcsr_regs[9]);
bcsr_phy &= ~0x20;
out_be8(&bcsr_regs[9], bcsr_phy);
udelay(1000);
bcsr_phy = in_be8(&bcsr_regs[9]);
bcsr_phy |= 0x20;
out_be8(&bcsr_regs[9], bcsr_phy);
iounmap(bcsr_regs);
}
#endif /* CONFIG_QUICC_ENGINE */
}
static struct of_device_id mpc8568_ids[] = {
{ .type = "soc", },
{ .compatible = "soc", },
{ .type = "qe", },
{},
};
static int __init mpc8568_publish_devices(void)
{
if (!machine_is(mpc8568_mds))
return 0;
/* Publish the QE devices */
of_platform_bus_probe(NULL,mpc8568_ids,NULL);
return 0;
}
device_initcall(mpc8568_publish_devices);
static void __init mpc8568_mds_pic_init(void)
{
struct mpic *mpic;
struct resource r;
struct device_node *np = NULL;
np = of_find_node_by_type(NULL, "open-pic");
if (!np)
return;
if (of_address_to_resource(np, 0, &r)) {
printk(KERN_ERR "Failed to map mpic register space\n");
of_node_put(np);
return;
}
mpic = mpic_alloc(np, r.start,
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
4, 0, " OpenPIC ");
BUG_ON(mpic == NULL);
of_node_put(np);
/* Internal Interrupts */
mpic_assign_isu(mpic, 0, r.start + 0x10200);
mpic_assign_isu(mpic, 1, r.start + 0x10280);
mpic_assign_isu(mpic, 2, r.start + 0x10300);
mpic_assign_isu(mpic, 3, r.start + 0x10380);
mpic_assign_isu(mpic, 4, r.start + 0x10400);
mpic_assign_isu(mpic, 5, r.start + 0x10480);
mpic_assign_isu(mpic, 6, r.start + 0x10500);
mpic_assign_isu(mpic, 7, r.start + 0x10580);
mpic_assign_isu(mpic, 8, r.start + 0x10600);
mpic_assign_isu(mpic, 9, r.start + 0x10680);
mpic_assign_isu(mpic, 10, r.start + 0x10700);
mpic_assign_isu(mpic, 11, r.start + 0x10780);
/* External Interrupts */
mpic_assign_isu(mpic, 12, r.start + 0x10000);
mpic_assign_isu(mpic, 13, r.start + 0x10080);
mpic_assign_isu(mpic, 14, r.start + 0x10100);
mpic_init(mpic);
#ifdef CONFIG_QUICC_ENGINE
np = of_find_node_by_type(NULL, "qeic");
if (!np)
return;
qe_ic_init(np, 0);
of_node_put(np);
#endif /* CONFIG_QUICC_ENGINE */
}
static int __init mpc8568_mds_probe(void)
{
char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
"model", NULL);
if (model == NULL)
return 0;
if (strcmp(model, "MPC8568EMDS"))
return 0;
DBG("MPC8568EMDS found\n");
return 1;
}
define_machine(mpc8568_mds) {
.name = "MPC8568E MDS",
.probe = mpc8568_mds_probe,
.setup_arch = mpc8568_mds_setup_arch,
.init_IRQ = mpc8568_mds_pic_init,
.get_irq = mpic_get_irq,
.restart = mpc85xx_restart,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};

7
arch/powerpc/platforms/85xx/mpc85xx_ads.c
View File

@ -45,8 +45,7 @@ unsigned long isa_mem_base = 0;
#endif
#ifdef CONFIG_PCI
int
mpc85xx_exclude_device(u_char bus, u_char devfn)
static int mpc85xx_exclude_device(u_char bus, u_char devfn)
{
if (bus == 0 && PCI_SLOT(devfn) == 0)
return PCIBIOS_DEVICE_NOT_FOUND;
@ -69,7 +68,7 @@ static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
#endif /* CONFIG_CPM2 */
void __init mpc85xx_ads_pic_init(void)
static void __init mpc85xx_ads_pic_init(void)
{
struct mpic *mpic;
struct resource r;
@ -254,7 +253,7 @@ static void __init mpc85xx_ads_setup_arch(void)
#endif
}
void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
{
uint pvid, svid, phid1;
uint memsize = total_memory;

17
arch/powerpc/platforms/85xx/mpc85xx_cds.c
View File

@ -56,7 +56,6 @@ unsigned long isa_mem_base = 0;
static int cds_pci_slot = 2;
static volatile u8 *cadmus;
#ifdef CONFIG_PCI
#define ARCADIA_HOST_BRIDGE_IDSEL 17
@ -64,8 +63,7 @@ static volatile u8 *cadmus;
extern int mpc85xx_pci2_busno;
int
mpc85xx_exclude_device(u_char bus, u_char devfn)
static int mpc85xx_exclude_device(u_char bus, u_char devfn)
{
if (bus == 0 && PCI_SLOT(devfn) == 0)
return PCIBIOS_DEVICE_NOT_FOUND;
@ -81,8 +79,7 @@ mpc85xx_exclude_device(u_char bus, u_char devfn)
return PCIBIOS_SUCCESSFUL;
}
void __init
mpc85xx_cds_pcibios_fixup(void)
static void __init mpc85xx_cds_pcibios_fixup(void)
{
struct pci_dev *dev;
u_char c;
@ -144,7 +141,7 @@ static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
#endif /* PPC_I8259 */
#endif /* CONFIG_PCI */
void __init mpc85xx_cds_pic_init(void)
static void __init mpc85xx_cds_pic_init(void)
{
struct mpic *mpic;
struct resource r;
@ -224,12 +221,10 @@ void __init mpc85xx_cds_pic_init(void)
#endif /* CONFIG_PPC_I8259 */
}
/*
* Setup the architecture
*/
static void __init
mpc85xx_cds_setup_arch(void)
static void __init mpc85xx_cds_setup_arch(void)
{
struct device_node *cpu;
#ifdef CONFIG_PCI
@ -276,9 +271,7 @@ mpc85xx_cds_setup_arch(void)
#endif
}
void
mpc85xx_cds_show_cpuinfo(struct seq_file *m)
static void mpc85xx_cds_show_cpuinfo(struct seq_file *m)
{
uint pvid, svid, phid1;
uint memsize = total_memory;

2
arch/powerpc/platforms/Makefile
View File

@ -5,9 +5,9 @@ ifeq ($(CONFIG_PPC64),y)
obj-$(CONFIG_PPC_PMAC) += powermac/
endif
endif
obj-$(CONFIG_PPC_MPC52xx) += 52xx/
obj-$(CONFIG_PPC_CHRP) += chrp/
obj-$(CONFIG_4xx) += 4xx/
obj-$(CONFIG_PPC_MPC52xx) += 52xx/
obj-$(CONFIG_PPC_8xx) += 8xx/
obj-$(CONFIG_PPC_82xx) += 82xx/
obj-$(CONFIG_PPC_83xx) += 83xx/

14
arch/powerpc/platforms/cell/pmu.c
View File

@ -345,18 +345,12 @@ EXPORT_SYMBOL_GPL(cbe_read_trace_buffer);
* Enabling/disabling interrupts for the entire performance monitoring unit.
*/
u32 cbe_query_pm_interrupts(u32 cpu)
{
return cbe_read_pm(cpu, pm_status);
}
EXPORT_SYMBOL_GPL(cbe_query_pm_interrupts);
u32 cbe_clear_pm_interrupts(u32 cpu)
u32 cbe_get_and_clear_pm_interrupts(u32 cpu)
{
/* Reading pm_status clears the interrupt bits. */
return cbe_query_pm_interrupts(cpu);
return cbe_read_pm(cpu, pm_status);
}
EXPORT_SYMBOL_GPL(cbe_clear_pm_interrupts);
EXPORT_SYMBOL_GPL(cbe_get_and_clear_pm_interrupts);
void cbe_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask)
{
@ -371,7 +365,7 @@ EXPORT_SYMBOL_GPL(cbe_enable_pm_interrupts);
void cbe_disable_pm_interrupts(u32 cpu)
{
cbe_clear_pm_interrupts(cpu);
cbe_get_and_clear_pm_interrupts(cpu);
cbe_write_pm(cpu, pm_status, 0);
}
EXPORT_SYMBOL_GPL(cbe_disable_pm_interrupts);

102
arch/powerpc/platforms/cell/spu_manage.c
View File

@ -59,63 +59,6 @@ static u64 __init find_spu_unit_number(struct device_node *spe)
return 0;
}
static int __init cell_spuprop_present(struct spu *spu, struct device_node *spe,
const char *prop)
{
const struct address_prop {
unsigned long address;
unsigned int len;
} __attribute__((packed)) *p;
int proplen;
unsigned long start_pfn, nr_pages;
struct pglist_data *pgdata;
struct zone *zone;
int ret;
p = get_property(spe, prop, &proplen);
WARN_ON(proplen != sizeof (*p));
start_pfn = p->address >> PAGE_SHIFT;
nr_pages = ((unsigned long)p->len + PAGE_SIZE - 1) >> PAGE_SHIFT;
pgdata = NODE_DATA(spu->node);
zone = pgdata->node_zones;
ret = __add_pages(zone, start_pfn, nr_pages);
return ret;
}
static void __iomem * __init map_spe_prop(struct spu *spu,
struct device_node *n, const char *name)
{
const struct address_prop {
unsigned long address;
unsigned int len;
} __attribute__((packed)) *prop;
const void *p;
int proplen;
void __iomem *ret = NULL;
int err = 0;
p = get_property(n, name, &proplen);
if (proplen != sizeof (struct address_prop))
return NULL;
prop = p;
err = cell_spuprop_present(spu, n, name);
if (err && (err != -EEXIST))
goto out;
ret = ioremap(prop->address, prop->len);
out:
return ret;
}
static void spu_unmap(struct spu *spu)
{
if (!firmware_has_feature(FW_FEATURE_LPAR))
@ -157,6 +100,23 @@ static int __init spu_map_interrupts_old(struct spu *spu,
return spu->irqs[2] == NO_IRQ ? -EINVAL : 0;
}
static void __iomem * __init spu_map_prop_old(struct spu *spu,
struct device_node *n,
const char *name)
{
const struct address_prop {
unsigned long address;
unsigned int len;
} __attribute__((packed)) *prop;
int proplen;
prop = get_property(n, name, &proplen);
if (prop == NULL || proplen != sizeof (struct address_prop))
return NULL;
return ioremap(prop->address, prop->len);
}
static int __init spu_map_device_old(struct spu *spu)
{
struct device_node *node = spu->devnode;
@ -175,7 +135,7 @@ static int __init spu_map_device_old(struct spu *spu)
/* we use local store as ram, not io memory */
spu->local_store = (void __force *)
map_spe_prop(spu, node, "local-store");
spu_map_prop_old(spu, node, "local-store");
if (!spu->local_store)
goto out;
@ -184,16 +144,16 @@ static int __init spu_map_device_old(struct spu *spu)
goto out_unmap;
spu->problem_phys = *(unsigned long *)prop;
spu->problem = map_spe_prop(spu, node, "problem");
spu->problem = spu_map_prop_old(spu, node, "problem");
if (!spu->problem)
goto out_unmap;
spu->priv2 = map_spe_prop(spu, node, "priv2");
spu->priv2 = spu_map_prop_old(spu, node, "priv2");
if (!spu->priv2)
goto out_unmap;
if (!firmware_has_feature(FW_FEATURE_LPAR)) {
spu->priv1 = map_spe_prop(spu, node, "priv1");
spu->priv1 = spu_map_prop_old(spu, node, "priv1");
if (!spu->priv1)
goto out_unmap;
}
@ -245,34 +205,20 @@ static int spu_map_resource(struct spu *spu, int nr,
void __iomem** virt, unsigned long *phys)
{
struct device_node *np = spu->devnode;
unsigned long start_pfn, nr_pages;
struct pglist_data *pgdata;
struct zone *zone;
struct resource resource = { };
unsigned long len;
int ret;
ret = of_address_to_resource(np, nr, &resource);
if (ret)
goto out;
return ret;
if (phys)
*phys = resource.start;
len = resource.end - resource.start + 1;
*virt = ioremap(resource.start, len);
if (!*virt)
ret = -EINVAL;
start_pfn = resource.start >> PAGE_SHIFT;
nr_pages = (len + PAGE_SIZE - 1) >> PAGE_SHIFT;
pgdata = NODE_DATA(spu->node);
zone = pgdata->node_zones;
ret = __add_pages(zone, start_pfn, nr_pages);
out:
return ret;
return -EINVAL;
return 0;
}
static int __init spu_map_device(struct spu *spu)

137
arch/powerpc/platforms/cell/spufs/context.c
View File

@ -42,7 +42,7 @@ struct spu_context *alloc_spu_context(struct spu_gang *gang)
}
spin_lock_init(&ctx->mmio_lock);
kref_init(&ctx->kref);
init_rwsem(&ctx->state_sema);
mutex_init(&ctx->state_mutex);
init_MUTEX(&ctx->run_sema);
init_waitqueue_head(&ctx->ibox_wq);
init_waitqueue_head(&ctx->wbox_wq);
@ -53,6 +53,10 @@ struct spu_context *alloc_spu_context(struct spu_gang *gang)
ctx->owner = get_task_mm(current);
if (gang)
spu_gang_add_ctx(gang, ctx);
ctx->rt_priority = current->rt_priority;
ctx->policy = current->policy;
ctx->prio = current->prio;
INIT_DELAYED_WORK(&ctx->sched_work, spu_sched_tick);
goto out;
out_free:
kfree(ctx);
@ -65,9 +69,9 @@ void destroy_spu_context(struct kref *kref)
{
struct spu_context *ctx;
ctx = container_of(kref, struct spu_context, kref);
down_write(&ctx->state_sema);
mutex_lock(&ctx->state_mutex);
spu_deactivate(ctx);
up_write(&ctx->state_sema);
mutex_unlock(&ctx->state_mutex);
spu_fini_csa(&ctx->csa);
if (ctx->gang)
spu_gang_remove_ctx(ctx->gang, ctx);
@ -96,107 +100,102 @@ void spu_forget(struct spu_context *ctx)
spu_release(ctx);
}
void spu_acquire(struct spu_context *ctx)
{
down_read(&ctx->state_sema);
}
void spu_release(struct spu_context *ctx)
{
up_read(&ctx->state_sema);
}
void spu_unmap_mappings(struct spu_context *ctx)
{
if (ctx->local_store)
unmap_mapping_range(ctx->local_store, 0, LS_SIZE, 1);
if (ctx->mfc)
unmap_mapping_range(ctx->mfc, 0, 0x4000, 1);
unmap_mapping_range(ctx->mfc, 0, 0x1000, 1);
if (ctx->cntl)
unmap_mapping_range(ctx->cntl, 0, 0x4000, 1);
unmap_mapping_range(ctx->cntl, 0, 0x1000, 1);
if (ctx->signal1)
unmap_mapping_range(ctx->signal1, 0, 0x4000, 1);
unmap_mapping_range(ctx->signal1, 0, PAGE_SIZE, 1);
if (ctx->signal2)
unmap_mapping_range(ctx->signal2, 0, 0x4000, 1);
unmap_mapping_range(ctx->signal2, 0, PAGE_SIZE, 1);
if (ctx->mss)
unmap_mapping_range(ctx->mss, 0, 0x1000, 1);
if (ctx->psmap)
unmap_mapping_range(ctx->psmap, 0, 0x20000, 1);
}
/**
* spu_acquire_exclusive - lock spu contex and protect against userspace access
* @ctx: spu contex to lock
*
* Note:
* Returns 0 and with the context locked on success
* Returns negative error and with the context _unlocked_ on failure.
*/
int spu_acquire_exclusive(struct spu_context *ctx)
{
int ret = 0;
int ret = -EINVAL;
down_write(&ctx->state_sema);
/* ctx is about to be freed, can't acquire any more */
if (!ctx->owner) {
ret = -EINVAL;
goto out;
}
spu_acquire(ctx);
/*
* Context is about to be freed, so we can't acquire it anymore.
*/
if (!ctx->owner)
goto out_unlock;
if (ctx->state == SPU_STATE_SAVED) {
ret = spu_activate(ctx, 0);
if (ret)
goto out;
ctx->state = SPU_STATE_RUNNABLE;
goto out_unlock;
} else {
/* We need to exclude userspace access to the context. */
/*
* We need to exclude userspace access to the context.
*
* To protect against memory access we invalidate all ptes
* and make sure the pagefault handlers block on the mutex.
*/
spu_unmap_mappings(ctx);
}
out:
if (ret)
up_write(&ctx->state_sema);
return 0;
out_unlock:
spu_release(ctx);
return ret;
}
int spu_acquire_runnable(struct spu_context *ctx)
/**
* spu_acquire_runnable - lock spu contex and make sure it is in runnable state
* @ctx: spu contex to lock
*
* Note:
* Returns 0 and with the context locked on success
* Returns negative error and with the context _unlocked_ on failure.
*/
int spu_acquire_runnable(struct spu_context *ctx, unsigned long flags)
{
int ret = 0;
down_read(&ctx->state_sema);
if (ctx->state == SPU_STATE_RUNNABLE) {
ctx->spu->prio = current->prio;
return 0;
}
up_read(&ctx->state_sema);
down_write(&ctx->state_sema);
/* ctx is about to be freed, can't acquire any more */
if (!ctx->owner) {
ret = -EINVAL;
goto out;
}
int ret = -EINVAL;
spu_acquire(ctx);
if (ctx->state == SPU_STATE_SAVED) {
ret = spu_activate(ctx, 0);
/*
* Context is about to be freed, so we can't acquire it anymore.
*/
if (!ctx->owner)
goto out_unlock;
ret = spu_activate(ctx, flags);
if (ret)
goto out;
ctx->state = SPU_STATE_RUNNABLE;
goto out_unlock;
}
downgrade_write(&ctx->state_sema);
/* On success, we return holding the lock */
return ret;
out:
/* Release here, to simplify calling code. */
up_write(&ctx->state_sema);
return 0;
out_unlock:
spu_release(ctx);
return ret;
}
/**
* spu_acquire_saved - lock spu contex and make sure it is in saved state
* @ctx: spu contex to lock
*/
void spu_acquire_saved(struct spu_context *ctx)
{
down_read(&ctx->state_sema);
if (ctx->state == SPU_STATE_SAVED)
return;
up_read(&ctx->state_sema);
down_write(&ctx->state_sema);
if (ctx->state == SPU_STATE_RUNNABLE) {
spu_acquire(ctx);
if (ctx->state != SPU_STATE_SAVED)
spu_deactivate(ctx);
ctx->state = SPU_STATE_SAVED;
}
downgrade_write(&ctx->state_sema);
}

144
arch/powerpc/platforms/cell/spufs/file.c
View File

@ -45,8 +45,8 @@ spufs_mem_open(struct inode *inode, struct file *file)
struct spufs_inode_info *i = SPUFS_I(inode);
struct spu_context *ctx = i->i_ctx;
file->private_data = ctx;
file->f_mapping = inode->i_mapping;
ctx->local_store = inode->i_mapping;
smp_wmb();
return 0;
}
@ -95,39 +95,38 @@ spufs_mem_write(struct file *file, const char __user *buffer,
return ret;
}
static struct page *
spufs_mem_mmap_nopage(struct vm_area_struct *vma,
unsigned long address, int *type)
static unsigned long spufs_mem_mmap_nopfn(struct vm_area_struct *vma,
unsigned long address)
{
struct page *page = NOPAGE_SIGBUS;
struct spu_context *ctx = vma->vm_file->private_data;
unsigned long offset = address - vma->vm_start;
unsigned long pfn, offset = address - vma->vm_start;
offset += vma->vm_pgoff << PAGE_SHIFT;
if (offset >= LS_SIZE)
return NOPFN_SIGBUS;
spu_acquire(ctx);
if (ctx->state == SPU_STATE_SAVED) {
vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
& ~_PAGE_NO_CACHE);
page = vmalloc_to_page(ctx->csa.lscsa->ls + offset);
pfn = vmalloc_to_pfn(ctx->csa.lscsa->ls + offset);
} else {
vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
| _PAGE_NO_CACHE);
page = pfn_to_page((ctx->spu->local_store_phys + offset)
>> PAGE_SHIFT);
| _PAGE_NO_CACHE);
pfn = (ctx->spu->local_store_phys + offset) >> PAGE_SHIFT;
}
vm_insert_pfn(vma, address, pfn);
spu_release(ctx);
if (type)
*type = VM_FAULT_MINOR;
page_cache_get(page);
return page;
return NOPFN_REFAULT;
}
static struct vm_operations_struct spufs_mem_mmap_vmops = {
.nopage = spufs_mem_mmap_nopage,
.nopfn = spufs_mem_mmap_nopfn,
};
static int
@ -136,7 +135,7 @@ spufs_mem_mmap(struct file *file, struct vm_area_struct *vma)
if (!(vma->vm_flags & VM_SHARED))
return -EINVAL;
vma->vm_flags |= VM_IO;
vma->vm_flags |= VM_IO | VM_PFNMAP;
vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
| _PAGE_NO_CACHE);
@ -152,49 +151,42 @@ static const struct file_operations spufs_mem_fops = {
.mmap = spufs_mem_mmap,
};
static struct page *spufs_ps_nopage(struct vm_area_struct *vma,
static unsigned long spufs_ps_nopfn(struct vm_area_struct *vma,
unsigned long address,
int *type, unsigned long ps_offs,
unsigned long ps_offs,
unsigned long ps_size)
{
struct page *page = NOPAGE_SIGBUS;
int fault_type = VM_FAULT_SIGBUS;
struct spu_context *ctx = vma->vm_file->private_data;
unsigned long offset = address - vma->vm_start;
unsigned long area;
unsigned long area, offset = address - vma->vm_start;
int ret;
offset += vma->vm_pgoff << PAGE_SHIFT;
if (offset >= ps_size)
goto out;
return NOPFN_SIGBUS;
ret = spu_acquire_runnable(ctx);
/* error here usually means a signal.. we might want to test
* the error code more precisely though
*/
ret = spu_acquire_runnable(ctx, 0);
if (ret)
goto out;
return NOPFN_REFAULT;
area = ctx->spu->problem_phys + ps_offs;
page = pfn_to_page((area + offset) >> PAGE_SHIFT);
fault_type = VM_FAULT_MINOR;
page_cache_get(page);
vm_insert_pfn(vma, address, (area + offset) >> PAGE_SHIFT);
spu_release(ctx);
out:
if (type)
*type = fault_type;
return page;
return NOPFN_REFAULT;
}
#if SPUFS_MMAP_4K
static struct page *spufs_cntl_mmap_nopage(struct vm_area_struct *vma,
unsigned long address, int *type)
static unsigned long spufs_cntl_mmap_nopfn(struct vm_area_struct *vma,
unsigned long address)
{
return spufs_ps_nopage(vma, address, type, 0x4000, 0x1000);
return spufs_ps_nopfn(vma, address, 0x4000, 0x1000);
}
static struct vm_operations_struct spufs_cntl_mmap_vmops = {
.nopage = spufs_cntl_mmap_nopage,
.nopfn = spufs_cntl_mmap_nopfn,
};
/*
@ -205,7 +197,7 @@ static int spufs_cntl_mmap(struct file *file, struct vm_area_struct *vma)
if (!(vma->vm_flags & VM_SHARED))
return -EINVAL;
vma->vm_flags |= VM_IO;
vma->vm_flags |= VM_IO | VM_PFNMAP;
vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
| _PAGE_NO_CACHE | _PAGE_GUARDED);
@ -243,8 +235,8 @@ static int spufs_cntl_open(struct inode *inode, struct file *file)
struct spu_context *ctx = i->i_ctx;
file->private_data = ctx;
file->f_mapping = inode->i_mapping;
ctx->cntl = inode->i_mapping;
smp_wmb();
return simple_attr_open(inode, file, spufs_cntl_get,
spufs_cntl_set, "0x%08lx");
}
@ -728,8 +720,8 @@ static int spufs_signal1_open(struct inode *inode, struct file *file)
struct spufs_inode_info *i = SPUFS_I(inode);
struct spu_context *ctx = i->i_ctx;
file->private_data = ctx;
file->f_mapping = inode->i_mapping;
ctx->signal1 = inode->i_mapping;
smp_wmb();
return nonseekable_open(inode, file);
}
@ -791,23 +783,23 @@ static ssize_t spufs_signal1_write(struct file *file, const char __user *buf,
return 4;
}
static struct page *spufs_signal1_mmap_nopage(struct vm_area_struct *vma,
unsigned long address, int *type)
static unsigned long spufs_signal1_mmap_nopfn(struct vm_area_struct *vma,
unsigned long address)
{
#if PAGE_SIZE == 0x1000
return spufs_ps_nopage(vma, address, type, 0x14000, 0x1000);
return spufs_ps_nopfn(vma, address, 0x14000, 0x1000);
#elif PAGE_SIZE == 0x10000
/* For 64k pages, both signal1 and signal2 can be used to mmap the whole
* signal 1 and 2 area
*/
return spufs_ps_nopage(vma, address, type, 0x10000, 0x10000);
return spufs_ps_nopfn(vma, address, 0x10000, 0x10000);
#else
#error unsupported page size
#endif
}
static struct vm_operations_struct spufs_signal1_mmap_vmops = {
.nopage = spufs_signal1_mmap_nopage,
.nopfn = spufs_signal1_mmap_nopfn,
};
static int spufs_signal1_mmap(struct file *file, struct vm_area_struct *vma)
@ -815,7 +807,7 @@ static int spufs_signal1_mmap(struct file *file, struct vm_area_struct *vma)
if (!(vma->vm_flags & VM_SHARED))
return -EINVAL;
vma->vm_flags |= VM_IO;
vma->vm_flags |= VM_IO | VM_PFNMAP;
vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
| _PAGE_NO_CACHE | _PAGE_GUARDED);
@ -835,8 +827,8 @@ static int spufs_signal2_open(struct inode *inode, struct file *file)
struct spufs_inode_info *i = SPUFS_I(inode);
struct spu_context *ctx = i->i_ctx;
file->private_data = ctx;
file->f_mapping = inode->i_mapping;
ctx->signal2 = inode->i_mapping;
smp_wmb();
return nonseekable_open(inode, file);
}
@ -899,23 +891,23 @@ static ssize_t spufs_signal2_write(struct file *file, const char __user *buf,
}
#if SPUFS_MMAP_4K
static struct page *spufs_signal2_mmap_nopage(struct vm_area_struct *vma,
unsigned long address, int *type)
static unsigned long spufs_signal2_mmap_nopfn(struct vm_area_struct *vma,
unsigned long address)
{
#if PAGE_SIZE == 0x1000
return spufs_ps_nopage(vma, address, type, 0x1c000, 0x1000);
return spufs_ps_nopfn(vma, address, 0x1c000, 0x1000);
#elif PAGE_SIZE == 0x10000
/* For 64k pages, both signal1 and signal2 can be used to mmap the whole
* signal 1 and 2 area
*/
return spufs_ps_nopage(vma, address, type, 0x10000, 0x10000);
return spufs_ps_nopfn(vma, address, 0x10000, 0x10000);
#else
#error unsupported page size
#endif
}
static struct vm_operations_struct spufs_signal2_mmap_vmops = {
.nopage = spufs_signal2_mmap_nopage,
.nopfn = spufs_signal2_mmap_nopfn,
};
static int spufs_signal2_mmap(struct file *file, struct vm_area_struct *vma)
@ -923,7 +915,7 @@ static int spufs_signal2_mmap(struct file *file, struct vm_area_struct *vma)
if (!(vma->vm_flags & VM_SHARED))
return -EINVAL;
vma->vm_flags |= VM_IO;
vma->vm_flags |= VM_IO | VM_PFNMAP;
vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
| _PAGE_NO_CACHE | _PAGE_GUARDED);
@ -1000,14 +992,14 @@ DEFINE_SIMPLE_ATTRIBUTE(spufs_signal2_type, spufs_signal2_type_get,
spufs_signal2_type_set, "%llu");
#if SPUFS_MMAP_4K
static struct page *spufs_mss_mmap_nopage(struct vm_area_struct *vma,
unsigned long address, int *type)
static unsigned long spufs_mss_mmap_nopfn(struct vm_area_struct *vma,
unsigned long address)
{
return spufs_ps_nopage(vma, address, type, 0x0000, 0x1000);
return spufs_ps_nopfn(vma, address, 0x0000, 0x1000);
}
static struct vm_operations_struct spufs_mss_mmap_vmops = {
.nopage = spufs_mss_mmap_nopage,
.nopfn = spufs_mss_mmap_nopfn,
};
/*
@ -1018,7 +1010,7 @@ static int spufs_mss_mmap(struct file *file, struct vm_area_struct *vma)
if (!(vma->vm_flags & VM_SHARED))
return -EINVAL;
vma->vm_flags |= VM_IO;
vma->vm_flags |= VM_IO | VM_PFNMAP;
vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
| _PAGE_NO_CACHE | _PAGE_GUARDED);
@ -1032,8 +1024,11 @@ static int spufs_mss_mmap(struct file *file, struct vm_area_struct *vma)
static int spufs_mss_open(struct inode *inode, struct file *file)
{
struct spufs_inode_info *i = SPUFS_I(inode);
struct spu_context *ctx = i->i_ctx;
file->private_data = i->i_ctx;
ctx->mss = inode->i_mapping;
smp_wmb();
return nonseekable_open(inode, file);
}
@ -1042,14 +1037,14 @@ static const struct file_operations spufs_mss_fops = {
.mmap = spufs_mss_mmap,
};
static struct page *spufs_psmap_mmap_nopage(struct vm_area_struct *vma,
unsigned long address, int *type)
static unsigned long spufs_psmap_mmap_nopfn(struct vm_area_struct *vma,
unsigned long address)
{
return spufs_ps_nopage(vma, address, type, 0x0000, 0x20000);
return spufs_ps_nopfn(vma, address, 0x0000, 0x20000);
}
static struct vm_operations_struct spufs_psmap_mmap_vmops = {
.nopage = spufs_psmap_mmap_nopage,
.nopfn = spufs_psmap_mmap_nopfn,
};
/*
@ -1060,7 +1055,7 @@ static int spufs_psmap_mmap(struct file *file, struct vm_area_struct *vma)
if (!(vma->vm_flags & VM_SHARED))
return -EINVAL;
vma->vm_flags |= VM_IO;
vma->vm_flags |= VM_IO | VM_PFNMAP;
vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
| _PAGE_NO_CACHE | _PAGE_GUARDED);
@ -1071,8 +1066,11 @@ static int spufs_psmap_mmap(struct file *file, struct vm_area_struct *vma)
static int spufs_psmap_open(struct inode *inode, struct file *file)
{
struct spufs_inode_info *i = SPUFS_I(inode);
struct spu_context *ctx = i->i_ctx;
file->private_data = i->i_ctx;
ctx->psmap = inode->i_mapping;
smp_wmb();
return nonseekable_open(inode, file);
}
@ -1083,14 +1081,14 @@ static const struct file_operations spufs_psmap_fops = {
#if SPUFS_MMAP_4K
static struct page *spufs_mfc_mmap_nopage(struct vm_area_struct *vma,
unsigned long address, int *type)
static unsigned long spufs_mfc_mmap_nopfn(struct vm_area_struct *vma,
unsigned long address)
{
return spufs_ps_nopage(vma, address, type, 0x3000, 0x1000);
return spufs_ps_nopfn(vma, address, 0x3000, 0x1000);
}
static struct vm_operations_struct spufs_mfc_mmap_vmops = {
.nopage = spufs_mfc_mmap_nopage,
.nopfn = spufs_mfc_mmap_nopfn,
};
/*
@ -1101,7 +1099,7 @@ static int spufs_mfc_mmap(struct file *file, struct vm_area_struct *vma)
if (!(vma->vm_flags & VM_SHARED))
return -EINVAL;
vma->vm_flags |= VM_IO;
vma->vm_flags |= VM_IO | VM_PFNMAP;
vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
| _PAGE_NO_CACHE | _PAGE_GUARDED);
@ -1125,6 +1123,8 @@ static int spufs_mfc_open(struct inode *inode, struct file *file)
return -EBUSY;
file->private_data = ctx;
ctx->mfc = inode->i_mapping;
smp_wmb();
return nonseekable_open(inode, file);
}
@ -1309,7 +1309,7 @@ static ssize_t spufs_mfc_write(struct file *file, const char __user *buffer,
if (ret)
goto out;
spu_acquire_runnable(ctx);
spu_acquire_runnable(ctx, 0);
if (file->f_flags & O_NONBLOCK) {
ret = ctx->ops->send_mfc_command(ctx, &cmd);
} else {

16
arch/powerpc/platforms/cell/spufs/run.c
View File

@ -133,7 +133,7 @@ out_drop_priv:
spu_mfc_sr1_set(ctx->spu, sr1);
out_unlock:
spu_release_exclusive(ctx);
spu_release(ctx);
out:
return ret;
}
@ -143,7 +143,7 @@ static inline int spu_run_init(struct spu_context *ctx, u32 * npc)
int ret;
unsigned long runcntl = SPU_RUNCNTL_RUNNABLE;
ret = spu_acquire_runnable(ctx);
ret = spu_acquire_runnable(ctx, SPU_ACTIVATE_NOWAKE);
if (ret)
return ret;
@ -155,7 +155,7 @@ static inline int spu_run_init(struct spu_context *ctx, u32 * npc)
spu_release(ctx);
ret = spu_setup_isolated(ctx);
if (!ret)
ret = spu_acquire_runnable(ctx);
ret = spu_acquire_runnable(ctx, SPU_ACTIVATE_NOWAKE);
}
/* if userspace has set the runcntrl register (eg, to issue an
@ -164,8 +164,10 @@ static inline int spu_run_init(struct spu_context *ctx, u32 * npc)
(SPU_RUNCNTL_RUNNABLE | SPU_RUNCNTL_ISOLATE);
if (runcntl == 0)
runcntl = SPU_RUNCNTL_RUNNABLE;
} else
} else {
spu_start_tick(ctx);
ctx->ops->npc_write(ctx, *npc);
}
ctx->ops->runcntl_write(ctx, runcntl);
return ret;
@ -176,6 +178,7 @@ static inline int spu_run_fini(struct spu_context *ctx, u32 * npc,
{
int ret = 0;
spu_stop_tick(ctx);
*status = ctx->ops->status_read(ctx);
*npc = ctx->ops->npc_read(ctx);
spu_release(ctx);
@ -329,8 +332,10 @@ long spufs_run_spu(struct file *file, struct spu_context *ctx,
}
if (unlikely(ctx->state != SPU_STATE_RUNNABLE)) {
ret = spu_reacquire_runnable(ctx, npc, &status);
if (ret)
if (ret) {
spu_stop_tick(ctx);
goto out2;
}
continue;
}
ret = spu_process_events(ctx);
@ -361,4 +366,3 @@ out:
up(&ctx->run_sema);
return ret;
}

396
arch/powerpc/platforms/cell/spufs/sched.c
View File

@ -44,17 +44,18 @@
#include <asm/spu_priv1.h>
#include "spufs.h"
#define SPU_MIN_TIMESLICE (100 * HZ / 1000)
#define SPU_TIMESLICE (HZ)
#define SPU_BITMAP_SIZE (((MAX_PRIO+BITS_PER_LONG)/BITS_PER_LONG)+1)
struct spu_prio_array {
unsigned long bitmap[SPU_BITMAP_SIZE];
wait_queue_head_t waitq[MAX_PRIO];
DECLARE_BITMAP(bitmap, MAX_PRIO);
struct list_head runq[MAX_PRIO];
spinlock_t runq_lock;
struct list_head active_list[MAX_NUMNODES];
struct mutex active_mutex[MAX_NUMNODES];
};
static struct spu_prio_array *spu_prio;
static struct workqueue_struct *spu_sched_wq;
static inline int node_allowed(int node)
{
@ -68,6 +69,64 @@ static inline int node_allowed(int node)
return 1;
}
void spu_start_tick(struct spu_context *ctx)
{
if (ctx->policy == SCHED_RR)
queue_delayed_work(spu_sched_wq, &ctx->sched_work, SPU_TIMESLICE);
}
void spu_stop_tick(struct spu_context *ctx)
{
if (ctx->policy == SCHED_RR)
cancel_delayed_work(&ctx->sched_work);
}
void spu_sched_tick(struct work_struct *work)
{
struct spu_context *ctx =
container_of(work, struct spu_context, sched_work.work);
struct spu *spu;
int rearm = 1;
mutex_lock(&ctx->state_mutex);
spu = ctx->spu;
if (spu) {
int best = sched_find_first_bit(spu_prio->bitmap);
if (best <= ctx->prio) {
spu_deactivate(ctx);
rearm = 0;
}
}
mutex_unlock(&ctx->state_mutex);
if (rearm)
spu_start_tick(ctx);
}
/**
* spu_add_to_active_list - add spu to active list
* @spu: spu to add to the active list
*/
static void spu_add_to_active_list(struct spu *spu)
{
mutex_lock(&spu_prio->active_mutex[spu->node]);
list_add_tail(&spu->list, &spu_prio->active_list[spu->node]);
mutex_unlock(&spu_prio->active_mutex[spu->node]);
}
/**
* spu_remove_from_active_list - remove spu from active list
* @spu: spu to remove from the active list
*/
static void spu_remove_from_active_list(struct spu *spu)
{
int node = spu->node;
mutex_lock(&spu_prio->active_mutex[node]);
list_del_init(&spu->list);
mutex_unlock(&spu_prio->active_mutex[node]);
}
static inline void mm_needs_global_tlbie(struct mm_struct *mm)
{
int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1;
@ -94,8 +153,12 @@ int spu_switch_event_unregister(struct notifier_block * n)
return blocking_notifier_chain_unregister(&spu_switch_notifier, n);
}
static inline void bind_context(struct spu *spu, struct spu_context *ctx)
/**
* spu_bind_context - bind spu context to physical spu
* @spu: physical spu to bind to
* @ctx: context to bind
*/
static void spu_bind_context(struct spu *spu, struct spu_context *ctx)
{
pr_debug("%s: pid=%d SPU=%d NODE=%d\n", __FUNCTION__, current->pid,
spu->number, spu->node);
@ -104,7 +167,6 @@ static inline void bind_context(struct spu *spu, struct spu_context *ctx)
ctx->spu = spu;
ctx->ops = &spu_hw_ops;
spu->pid = current->pid;
spu->prio = current->prio;
spu->mm = ctx->owner;
mm_needs_global_tlbie(spu->mm);
spu->ibox_callback = spufs_ibox_callback;
@ -118,12 +180,21 @@ static inline void bind_context(struct spu *spu, struct spu_context *ctx)
spu->timestamp = jiffies;
spu_cpu_affinity_set(spu, raw_smp_processor_id());
spu_switch_notify(spu, ctx);
spu_add_to_active_list(spu);
ctx->state = SPU_STATE_RUNNABLE;
}
static inline void unbind_context(struct spu *spu, struct spu_context *ctx)
/**
* spu_unbind_context - unbind spu context from physical spu
* @spu: physical spu to unbind from
* @ctx: context to unbind
*/
static void spu_unbind_context(struct spu *spu, struct spu_context *ctx)
{
pr_debug("%s: unbind pid=%d SPU=%d NODE=%d\n", __FUNCTION__,
spu->pid, spu->number, spu->node);
spu_remove_from_active_list(spu);
spu_switch_notify(spu, NULL);
spu_unmap_mappings(ctx);
spu_save(&ctx->csa, spu);
@ -136,95 +207,98 @@ static inline void unbind_context(struct spu *spu, struct spu_context *ctx)
spu->dma_callback = NULL;
spu->mm = NULL;
spu->pid = 0;
spu->prio = MAX_PRIO;
ctx->ops = &spu_backing_ops;
ctx->spu = NULL;
spu->flags = 0;
spu->ctx = NULL;
}
static inline void spu_add_wq(wait_queue_head_t * wq, wait_queue_t * wait,
int prio)
/**
* spu_add_to_rq - add a context to the runqueue
* @ctx: context to add
*/
static void spu_add_to_rq(struct spu_context *ctx)
{
prepare_to_wait_exclusive(wq, wait, TASK_INTERRUPTIBLE);
set_bit(prio, spu_prio->bitmap);
spin_lock(&spu_prio->runq_lock);
list_add_tail(&ctx->rq, &spu_prio->runq[ctx->prio]);
set_bit(ctx->prio, spu_prio->bitmap);
spin_unlock(&spu_prio->runq_lock);
}
static inline void spu_del_wq(wait_queue_head_t * wq, wait_queue_t * wait,
int prio)
/**
* spu_del_from_rq - remove a context from the runqueue
* @ctx: context to remove
*/
static void spu_del_from_rq(struct spu_context *ctx)
{
u64 flags;
__set_current_state(TASK_RUNNING);
spin_lock_irqsave(&wq->lock, flags);
remove_wait_queue_locked(wq, wait);
if (list_empty(&wq->task_list))
clear_bit(prio, spu_prio->bitmap);
spin_unlock_irqrestore(&wq->lock, flags);
spin_lock(&spu_prio->runq_lock);
list_del_init(&ctx->rq);
if (list_empty(&spu_prio->runq[ctx->prio]))
clear_bit(ctx->prio, spu_prio->bitmap);
spin_unlock(&spu_prio->runq_lock);
}
static void spu_prio_wait(struct spu_context *ctx, u64 flags)
/**
* spu_grab_context - remove one context from the runqueue
* @prio: priority of the context to be removed
*
* This function removes one context from the runqueue for priority @prio.
* If there is more than one context with the given priority the first
* task on the runqueue will be taken.
*
* Returns the spu_context it just removed.
*
* Must be called with spu_prio->runq_lock held.
*/
static struct spu_context *spu_grab_context(int prio)
{
struct list_head *rq = &spu_prio->runq[prio];
if (list_empty(rq))
return NULL;
return list_entry(rq->next, struct spu_context, rq);
}
static void spu_prio_wait(struct spu_context *ctx)
{
int prio = current->prio;
wait_queue_head_t *wq = &spu_prio->waitq[prio];
DEFINE_WAIT(wait);
if (ctx->spu)
return;
spu_add_wq(wq, &wait, prio);
set_bit(SPU_SCHED_WAKE, &ctx->sched_flags);
prepare_to_wait_exclusive(&ctx->stop_wq, &wait, TASK_INTERRUPTIBLE);
if (!signal_pending(current)) {
up_write(&ctx->state_sema);
pr_debug("%s: pid=%d prio=%d\n", __FUNCTION__,
current->pid, current->prio);
mutex_unlock(&ctx->state_mutex);
schedule();
down_write(&ctx->state_sema);
mutex_lock(&ctx->state_mutex);
}
spu_del_wq(wq, &wait, prio);
__set_current_state(TASK_RUNNING);
remove_wait_queue(&ctx->stop_wq, &wait);
clear_bit(SPU_SCHED_WAKE, &ctx->sched_flags);
}
static void spu_prio_wakeup(void)
/**
* spu_reschedule - try to find a runnable context for a spu
* @spu: spu available
*
* This function is called whenever a spu becomes idle. It looks for the
* most suitable runnable spu context and schedules it for execution.
*/
static void spu_reschedule(struct spu *spu)
{
int best = sched_find_first_bit(spu_prio->bitmap);
int best;
spu_free(spu);
spin_lock(&spu_prio->runq_lock);
best = sched_find_first_bit(spu_prio->bitmap);
if (best < MAX_PRIO) {
wait_queue_head_t *wq = &spu_prio->waitq[best];
wake_up_interruptible_nr(wq, 1);
struct spu_context *ctx = spu_grab_context(best);
if (ctx && test_bit(SPU_SCHED_WAKE, &ctx->sched_flags))
wake_up(&ctx->stop_wq);
}
spin_unlock(&spu_prio->runq_lock);
}
static int get_active_spu(struct spu *spu)
{
int node = spu->node;
struct spu *tmp;
int rc = 0;
mutex_lock(&spu_prio->active_mutex[node]);
list_for_each_entry(tmp, &spu_prio->active_list[node], list) {
if (tmp == spu) {
list_del_init(&spu->list);
rc = 1;
break;
}
}
mutex_unlock(&spu_prio->active_mutex[node]);
return rc;
}
static void put_active_spu(struct spu *spu)
{
int node = spu->node;
mutex_lock(&spu_prio->active_mutex[node]);
list_add_tail(&spu->list, &spu_prio->active_list[node]);
mutex_unlock(&spu_prio->active_mutex[node]);
}
static struct spu *spu_get_idle(struct spu_context *ctx, u64 flags)
static struct spu *spu_get_idle(struct spu_context *ctx)
{
struct spu *spu = NULL;
int node = cpu_to_node(raw_smp_processor_id());
@ -241,87 +315,154 @@ static struct spu *spu_get_idle(struct spu_context *ctx, u64 flags)
return spu;
}
static inline struct spu *spu_get(struct spu_context *ctx, u64 flags)
{
/* Future: spu_get_idle() if possible,
* otherwise try to preempt an active
* context.
*/
return spu_get_idle(ctx, flags);
}
/* The three externally callable interfaces
* for the scheduler begin here.
/**
* find_victim - find a lower priority context to preempt
* @ctx: canidate context for running
*
* spu_activate - bind a context to SPU, waiting as needed.
* spu_deactivate - unbind a context from its SPU.
* spu_yield - yield an SPU if others are waiting.
* Returns the freed physical spu to run the new context on.
*/
int spu_activate(struct spu_context *ctx, u64 flags)
static struct spu *find_victim(struct spu_context *ctx)
{
struct spu_context *victim = NULL;
struct spu *spu;
int ret = 0;
int node, n;
for (;;) {
if (ctx->spu)
return 0;
spu = spu_get(ctx, flags);
if (spu != NULL) {
if (ctx->spu != NULL) {
spu_free(spu);
spu_prio_wakeup();
break;
}
bind_context(spu, ctx);
put_active_spu(spu);
break;
/*
* Look for a possible preemption candidate on the local node first.
* If there is no candidate look at the other nodes. This isn't
* exactly fair, but so far the whole spu schedule tries to keep
* a strong node affinity. We might want to fine-tune this in
* the future.
*/
restart:
node = cpu_to_node(raw_smp_processor_id());
for (n = 0; n < MAX_NUMNODES; n++, node++) {
node = (node < MAX_NUMNODES) ? node : 0;
if (!node_allowed(node))
continue;
mutex_lock(&spu_prio->active_mutex[node]);
list_for_each_entry(spu, &spu_prio->active_list[node], list) {
struct spu_context *tmp = spu->ctx;
if (tmp->rt_priority < ctx->rt_priority &&
(!victim || tmp->rt_priority < victim->rt_priority))
victim = spu->ctx;
}
spu_prio_wait(ctx, flags);
if (signal_pending(current)) {
ret = -ERESTARTSYS;
spu_prio_wakeup();
break;
mutex_unlock(&spu_prio->active_mutex[node]);
if (victim) {
/*
* This nests ctx->state_mutex, but we always lock
* higher priority contexts before lower priority
* ones, so this is safe until we introduce
* priority inheritance schemes.
*/
if (!mutex_trylock(&victim->state_mutex)) {
victim = NULL;
goto restart;
}
spu = victim->spu;
if (!spu) {
/*
* This race can happen because we've dropped
* the active list mutex. No a problem, just
* restart the search.
*/
mutex_unlock(&victim->state_mutex);
victim = NULL;
goto restart;
}
spu_unbind_context(spu, victim);
mutex_unlock(&victim->state_mutex);
return spu;
}
}
return ret;
return NULL;
}
/**
* spu_activate - find a free spu for a context and execute it
* @ctx: spu context to schedule
* @flags: flags (currently ignored)
*
* Tries to find a free spu to run @ctx. If no free spu is availble
* add the context to the runqueue so it gets woken up once an spu
* is available.
*/
int spu_activate(struct spu_context *ctx, unsigned long flags)
{
if (ctx->spu)
return 0;
do {
struct spu *spu;
spu = spu_get_idle(ctx);
/*
* If this is a realtime thread we try to get it running by
* preempting a lower priority thread.
*/
if (!spu && ctx->rt_priority)
spu = find_victim(ctx);
if (spu) {
spu_bind_context(spu, ctx);
return 0;
}
spu_add_to_rq(ctx);
if (!(flags & SPU_ACTIVATE_NOWAKE))
spu_prio_wait(ctx);
spu_del_from_rq(ctx);
} while (!signal_pending(current));
return -ERESTARTSYS;
}
/**
* spu_deactivate - unbind a context from it's physical spu
* @ctx: spu context to unbind
*
* Unbind @ctx from the physical spu it is running on and schedule
* the highest priority context to run on the freed physical spu.
*/
void spu_deactivate(struct spu_context *ctx)
{
struct spu *spu;
int needs_idle;
struct spu *spu = ctx->spu;
spu = ctx->spu;
if (!spu)
return;
needs_idle = get_active_spu(spu);
unbind_context(spu, ctx);
if (needs_idle) {
spu_free(spu);
spu_prio_wakeup();
if (spu) {
spu_unbind_context(spu, ctx);
spu_reschedule(spu);
}
}
/**
* spu_yield - yield a physical spu if others are waiting
* @ctx: spu context to yield
*
* Check if there is a higher priority context waiting and if yes
* unbind @ctx from the physical spu and schedule the highest
* priority context to run on the freed physical spu instead.
*/
void spu_yield(struct spu_context *ctx)
{
struct spu *spu;
int need_yield = 0;
if (down_write_trylock(&ctx->state_sema)) {
if (mutex_trylock(&ctx->state_mutex)) {
if ((spu = ctx->spu) != NULL) {
int best = sched_find_first_bit(spu_prio->bitmap);
if (best < MAX_PRIO) {
pr_debug("%s: yielding SPU %d NODE %d\n",
__FUNCTION__, spu->number, spu->node);
spu_deactivate(ctx);
ctx->state = SPU_STATE_SAVED;
need_yield = 1;
} else {
spu->prio = MAX_PRIO;
}
}
up_write(&ctx->state_sema);
mutex_unlock(&ctx->state_mutex);
}
if (unlikely(need_yield))
yield();
@ -331,14 +472,19 @@ int __init spu_sched_init(void)
{
int i;
spu_sched_wq = create_singlethread_workqueue("spusched");
if (!spu_sched_wq)
return 1;
spu_prio = kzalloc(sizeof(struct spu_prio_array), GFP_KERNEL);
if (!spu_prio) {
printk(KERN_WARNING "%s: Unable to allocate priority queue.\n",
__FUNCTION__);
destroy_workqueue(spu_sched_wq);
return 1;
}
for (i = 0; i < MAX_PRIO; i++) {
init_waitqueue_head(&spu_prio->waitq[i]);
INIT_LIST_HEAD(&spu_prio->runq[i]);
__clear_bit(i, spu_prio->bitmap);
}
__set_bit(MAX_PRIO, spu_prio->bitmap);
@ -346,6 +492,7 @@ int __init spu_sched_init(void)
mutex_init(&spu_prio->active_mutex[i]);
INIT_LIST_HEAD(&spu_prio->active_list[i]);
}
spin_lock_init(&spu_prio->runq_lock);
return 0;
}
@ -364,4 +511,5 @@ void __exit spu_sched_exit(void)
mutex_unlock(&spu_prio->active_mutex[node]);
}
kfree(spu_prio);
destroy_workqueue(spu_sched_wq);
}

50
arch/powerpc/platforms/cell/spufs/spufs.h
View File

@ -23,7 +23,7 @@
#define SPUFS_H
#include <linux/kref.h>
#include <linux/rwsem.h>
#include <linux/mutex.h>
#include <linux/spinlock.h>
#include <linux/fs.h>
@ -37,11 +37,13 @@ enum {
};
struct spu_context_ops;
#define SPU_CONTEXT_PREEMPT 0UL
struct spu_gang;
/* ctx->sched_flags */
enum {
SPU_SCHED_WAKE = 0,
};
struct spu_context {
struct spu *spu; /* pointer to a physical SPU */
struct spu_state csa; /* SPU context save area. */
@ -51,10 +53,12 @@ struct spu_context {
struct address_space *cntl; /* 'control' area mappings. */
struct address_space *signal1; /* 'signal1' area mappings. */
struct address_space *signal2; /* 'signal2' area mappings. */
struct address_space *mss; /* 'mss' area mappings. */
struct address_space *psmap; /* 'psmap' area mappings. */
u64 object_id; /* user space pointer for oprofile */
enum { SPU_STATE_RUNNABLE, SPU_STATE_SAVED } state;
struct rw_semaphore state_sema;
struct mutex state_mutex;
struct semaphore run_sema;
struct mm_struct *owner;
@ -75,6 +79,14 @@ struct spu_context {
struct list_head gang_list;
struct spu_gang *gang;
/* scheduler fields */
struct list_head rq;
struct delayed_work sched_work;
unsigned long sched_flags;
unsigned long rt_priority;
int policy;
int prio;
};
struct spu_gang {
@ -159,6 +171,16 @@ void spu_gang_remove_ctx(struct spu_gang *gang, struct spu_context *ctx);
void spu_gang_add_ctx(struct spu_gang *gang, struct spu_context *ctx);
/* context management */
static inline void spu_acquire(struct spu_context *ctx)
{
mutex_lock(&ctx->state_mutex);
}
static inline void spu_release(struct spu_context *ctx)
{
mutex_unlock(&ctx->state_mutex);
}
struct spu_context * alloc_spu_context(struct spu_gang *gang);
void destroy_spu_context(struct kref *kref);
struct spu_context * get_spu_context(struct spu_context *ctx);
@ -166,20 +188,18 @@ int put_spu_context(struct spu_context *ctx);
void spu_unmap_mappings(struct spu_context *ctx);
void spu_forget(struct spu_context *ctx);
void spu_acquire(struct spu_context *ctx);
void spu_release(struct spu_context *ctx);
int spu_acquire_runnable(struct spu_context *ctx);
int spu_acquire_runnable(struct spu_context *ctx, unsigned long flags);
void spu_acquire_saved(struct spu_context *ctx);
int spu_acquire_exclusive(struct spu_context *ctx);
static inline void spu_release_exclusive(struct spu_context *ctx)
{
up_write(&ctx->state_sema);
}
int spu_activate(struct spu_context *ctx, u64 flags);
enum {
SPU_ACTIVATE_NOWAKE = 1,
};
int spu_activate(struct spu_context *ctx, unsigned long flags);
void spu_deactivate(struct spu_context *ctx);
void spu_yield(struct spu_context *ctx);
void spu_start_tick(struct spu_context *ctx);
void spu_stop_tick(struct spu_context *ctx);
void spu_sched_tick(struct work_struct *work);
int __init spu_sched_init(void);
void __exit spu_sched_exit(void);

19
arch/powerpc/platforms/celleb/htab.c
View File

@ -95,7 +95,6 @@ static long beat_lpar_hpte_insert(unsigned long hpte_group,
unsigned long lpar_rc;
unsigned long slot;
unsigned long hpte_v, hpte_r;
unsigned long flags;
/* same as iseries */
if (vflags & HPTE_V_SECONDARY)
@ -115,17 +114,17 @@ static long beat_lpar_hpte_insert(unsigned long hpte_group,
if (rflags & (_PAGE_GUARDED|_PAGE_NO_CACHE))
hpte_r &= ~_PAGE_COHERENT;
spin_lock_irqsave(&beat_htab_lock, flags);
spin_lock(&beat_htab_lock);
if ((lpar_rc = beat_read_mask(hpte_group)) == 0) {
if (!(vflags & HPTE_V_BOLTED))
DBG_LOW(" full\n");
spin_unlock_irqrestore(&beat_htab_lock, flags);
spin_unlock(&beat_htab_lock);
return -1;
}
lpar_rc = beat_insert_htab_entry(0, hpte_group, lpar_rc << 48,
hpte_v, hpte_r, &slot);
spin_unlock_irqrestore(&beat_htab_lock, flags);
spin_unlock(&beat_htab_lock);
/*
* Since we try and ioremap PHBs we don't own, the pte insert
@ -189,7 +188,6 @@ static long beat_lpar_hpte_updatepp(unsigned long slot,
{
unsigned long lpar_rc;
unsigned long dummy0, dummy1, want_v;
unsigned long flags;
want_v = hpte_encode_v(va, psize);
@ -197,17 +195,17 @@ static long beat_lpar_hpte_updatepp(unsigned long slot,
"avpnv=%016lx, slot=%016lx, psize: %d, newpp %016lx ... ",
want_v & HPTE_V_AVPN, slot, psize, newpp);
spin_lock_irqsave(&beat_htab_lock, flags);
spin_lock(&beat_htab_lock);
dummy0 = beat_lpar_hpte_getword0(slot);
if ((dummy0 & ~0x7FUL) != (want_v & ~0x7FUL)) {
DBG_LOW("not found !\n");
spin_unlock_irqrestore(&beat_htab_lock, flags);
spin_unlock(&beat_htab_lock);
return -1;
}
lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7, &dummy0,
&dummy1);
spin_unlock_irqrestore(&beat_htab_lock, flags);
spin_unlock(&beat_htab_lock);
if (lpar_rc != 0 || dummy0 == 0) {
DBG_LOW("not found !\n");
return -1;
@ -256,18 +254,17 @@ static void beat_lpar_hpte_updateboltedpp(unsigned long newpp,
int psize)
{
unsigned long lpar_rc, slot, vsid, va, dummy0, dummy1;
unsigned long flags;
vsid = get_kernel_vsid(ea);
va = (vsid << 28) | (ea & 0x0fffffff);
spin_lock_irqsave(&beat_htab_lock, flags);
spin_lock(&beat_htab_lock);
slot = beat_lpar_hpte_find(va, psize);
BUG_ON(slot == -1);
lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7,
&dummy0, &dummy1);
spin_unlock_irqrestore(&beat_htab_lock, flags);
spin_unlock(&beat_htab_lock);
BUG_ON(lpar_rc != 0);
}

12
arch/powerpc/platforms/embedded6xx/linkstation.c
View File

@ -13,7 +13,6 @@
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/initrd.h>
#include <linux/root_dev.h>
#include <linux/mtd/physmap.h>
#include <asm/time.h>
@ -91,17 +90,6 @@ static void __init linkstation_setup_arch(void)
ARRAY_SIZE(linkstation_physmap_partitions));
#endif
#ifdef CONFIG_BLK_DEV_INITRD
if (initrd_start)
ROOT_DEV = Root_RAM0;
else
#endif
#ifdef CONFIG_ROOT_NFS
ROOT_DEV = Root_NFS;
#else
ROOT_DEV = Root_HDA1;
#endif
/* Lookup PCI host bridges */
for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
add_bridge(np);

42
arch/powerpc/platforms/ps3/spu.c
View File

@ -170,31 +170,6 @@ static int __init construct_spu(struct spu *spu)
return result;
}
static int __init add_spu_pages(unsigned long start_addr, unsigned long size)
{
int result;
unsigned long start_pfn;
unsigned long nr_pages;
struct pglist_data *pgdata;
struct zone *zone;
BUG_ON(!mem_init_done);
start_pfn = start_addr >> PAGE_SHIFT;
nr_pages = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
pgdata = NODE_DATA(0);
zone = pgdata->node_zones;
result = __add_pages(zone, start_pfn, nr_pages);
if (result)
pr_debug("%s:%d: __add_pages failed: (%d)\n",
__func__, __LINE__, result);
return result;
}
static void spu_unmap(struct spu *spu)
{
iounmap(spu->priv2);
@ -206,19 +181,6 @@ static void spu_unmap(struct spu *spu)
static int __init setup_areas(struct spu *spu)
{
struct table {char* name; unsigned long addr; unsigned long size;};
int result;
/* setup pages */
result = add_spu_pages(spu->local_store_phys, LS_SIZE);
if (result)
goto fail_add;
result = add_spu_pages(spu->problem_phys, sizeof(struct spu_problem));
if (result)
goto fail_add;
/* ioremap */
spu_pdata(spu)->shadow = __ioremap(
spu_pdata(spu)->shadow_addr, sizeof(struct spe_shadow),
@ -260,8 +222,8 @@ static int __init setup_areas(struct spu *spu)
fail_ioremap:
spu_unmap(spu);
fail_add:
return result;
return -ENOMEM;
}
static int __init setup_interrupts(struct spu *spu)

1
arch/powerpc/platforms/pseries/Makefile
View File

@ -9,6 +9,7 @@ obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_XICS) += xics.o
obj-$(CONFIG_SCANLOG) += scanlog.o
obj-$(CONFIG_EEH) += eeh.o eeh_cache.o eeh_driver.o eeh_event.o
obj-$(CONFIG_KEXEC) += kexec.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug-cpu.o

17
arch/powerpc/platforms/pseries/firmware.h
View File

@ -1,17 +0,0 @@
/*
* Copyright 2006 IBM Corporation.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _PSERIES_FIRMWARE_H
#define _PSERIES_FIRMWARE_H
#include <asm/firmware.h>
extern void __init fw_feature_init(void);
#endif /* _PSERIES_FIRMWARE_H */

72
arch/powerpc/platforms/pseries/kexec.c Normal file
View File

@ -0,0 +1,72 @@
/*
* Copyright 2006 Michael Ellerman, IBM Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <asm/machdep.h>
#include <asm/page.h>
#include <asm/firmware.h>
#include <asm/kexec.h>
#include <asm/mpic.h>
#include "pseries.h"
#include "xics.h"
#include "plpar_wrappers.h"
static void pseries_kexec_cpu_down(int crash_shutdown, int secondary)
{
/* Don't risk a hypervisor call if we're crashing */
if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) {
unsigned long addr;
addr = __pa(get_slb_shadow());
if (unregister_slb_shadow(hard_smp_processor_id(), addr))
printk("SLB shadow buffer deregistration of "
"cpu %u (hw_cpu_id %d) failed\n",
smp_processor_id(),
hard_smp_processor_id());
addr = __pa(get_lppaca());
if (unregister_vpa(hard_smp_processor_id(), addr)) {
printk("VPA deregistration of cpu %u (hw_cpu_id %d) "
"failed\n", smp_processor_id(),
hard_smp_processor_id());
}
}
}
static void pseries_kexec_cpu_down_mpic(int crash_shutdown, int secondary)
{
pseries_kexec_cpu_down(crash_shutdown, secondary);
mpic_teardown_this_cpu(secondary);
}
void __init setup_kexec_cpu_down_mpic(void)
{
ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_mpic;
}
static void pseries_kexec_cpu_down_xics(int crash_shutdown, int secondary)
{
pseries_kexec_cpu_down(crash_shutdown, secondary);
xics_teardown_cpu(secondary);
}
void __init setup_kexec_cpu_down_xics(void)
{
ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_xics;
}
static int __init pseries_kexec_setup(void)
{
ppc_md.machine_kexec = default_machine_kexec;
ppc_md.machine_kexec_prepare = default_machine_kexec_prepare;
ppc_md.machine_crash_shutdown = default_machine_crash_shutdown;
return 0;
}
__initcall(pseries_kexec_setup);

4
arch/powerpc/platforms/pseries/pci.c
View File

@ -98,6 +98,10 @@ static void fixup_winbond_82c105(struct pci_dev* dev)
if (dev->resource[i].flags & IORESOURCE_IO
&& dev->bus->number == 0 && dev->devfn == 0x81)
dev->resource[i].flags &= ~IORESOURCE_IO;
if (dev->resource[i].start == 0 && dev->resource[i].end) {
dev->resource[i].flags = 0;
dev->resource[i].end = 0;
}
}
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,

36
arch/powerpc/platforms/pseries/pseries.h Normal file
View File

@ -0,0 +1,36 @@
/*
* Copyright 2006 IBM Corporation.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _PSERIES_PSERIES_H
#define _PSERIES_PSERIES_H
extern void __init fw_feature_init(void);
struct pt_regs;
extern int pSeries_system_reset_exception(struct pt_regs *regs);
extern int pSeries_machine_check_exception(struct pt_regs *regs);
#ifdef CONFIG_SMP
extern void smp_init_pseries_mpic(void);
extern void smp_init_pseries_xics(void);
#else
static inline smp_init_pseries_mpic(void) { };
static inline smp_init_pseries_xics(void) { };
#endif
#ifdef CONFIG_KEXEC
extern void setup_kexec_cpu_down_xics(void);
extern void setup_kexec_cpu_down_mpic(void);
#else
static inline setup_kexec_cpu_down_xics(void) { };
static inline setup_kexec_cpu_down_mpic(void) { };
#endif
#endif /* _PSERIES_PSERIES_H */

2
arch/powerpc/platforms/pseries/ras.c
View File

@ -51,7 +51,7 @@
#include <asm/udbg.h>
#include <asm/firmware.h>
#include "ras.h"
#include "pseries.h"
static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX];
static DEFINE_SPINLOCK(ras_log_buf_lock);

9
arch/powerpc/platforms/pseries/ras.h
View File

@ -1,9 +0,0 @@
#ifndef _PSERIES_RAS_H
#define _PSERIES_RAS_H
struct pt_regs;
extern int pSeries_system_reset_exception(struct pt_regs *regs);
extern int pSeries_machine_check_exception(struct pt_regs *regs);
#endif /* _PSERIES_RAS_H */

60
arch/powerpc/platforms/pseries/setup.c
View File

@ -55,7 +55,6 @@
#include <asm/dma.h>
#include <asm/machdep.h>
#include <asm/irq.h>
#include <asm/kexec.h>
#include <asm/time.h>
#include <asm/nvram.h>
#include "xics.h"
@ -65,10 +64,10 @@
#include <asm/i8259.h>
#include <asm/udbg.h>
#include <asm/smp.h>
#include <asm/firmware.h>
#include "plpar_wrappers.h"
#include "ras.h"
#include "firmware.h"
#include "pseries.h"
#ifdef DEBUG
#define DBG(fmt...) udbg_printf(fmt)
@ -77,8 +76,6 @@
#endif
/* move those away to a .h */
extern void smp_init_pseries_mpic(void);
extern void smp_init_pseries_xics(void);
extern void find_udbg_vterm(void);
int fwnmi_active; /* TRUE if an FWNMI handler is present */
@ -221,42 +218,6 @@ static void pseries_lpar_enable_pmcs(void)
get_lppaca()->pmcregs_in_use = 1;
}
#ifdef CONFIG_KEXEC
static void pseries_kexec_cpu_down(int crash_shutdown, int secondary)
{
/* Don't risk a hypervisor call if we're crashing */
if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) {
unsigned long addr;
addr = __pa(get_slb_shadow());
if (unregister_slb_shadow(hard_smp_processor_id(), addr))
printk("SLB shadow buffer deregistration of "
"cpu %u (hw_cpu_id %d) failed\n",
smp_processor_id(),
hard_smp_processor_id());
addr = __pa(get_lppaca());
if (unregister_vpa(hard_smp_processor_id(), addr)) {
printk("VPA deregistration of cpu %u (hw_cpu_id %d) "
"failed\n", smp_processor_id(),
hard_smp_processor_id());
}
}
}
static void pseries_kexec_cpu_down_mpic(int crash_shutdown, int secondary)
{
pseries_kexec_cpu_down(crash_shutdown, secondary);
mpic_teardown_this_cpu(secondary);
}
static void pseries_kexec_cpu_down_xics(int crash_shutdown, int secondary)
{
pseries_kexec_cpu_down(crash_shutdown, secondary);
xics_teardown_cpu(secondary);
}
#endif /* CONFIG_KEXEC */
static void __init pseries_discover_pic(void)
{
struct device_node *np;
@ -269,21 +230,13 @@ static void __init pseries_discover_pic(void)
pSeries_mpic_node = of_node_get(np);
ppc_md.init_IRQ = pseries_mpic_init_IRQ;
ppc_md.get_irq = mpic_get_irq;
#ifdef CONFIG_KEXEC
ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_mpic;
#endif
#ifdef CONFIG_SMP
setup_kexec_cpu_down_mpic();
smp_init_pseries_mpic();
#endif
return;
} else if (strstr(typep, "ppc-xicp")) {
ppc_md.init_IRQ = xics_init_IRQ;
#ifdef CONFIG_KEXEC
ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_xics;
#endif
#ifdef CONFIG_SMP
setup_kexec_cpu_down_xics();
smp_init_pseries_xics();
#endif
return;
}
}
@ -554,9 +507,4 @@ define_machine(pseries) {
.check_legacy_ioport = pSeries_check_legacy_ioport,
.system_reset_exception = pSeries_system_reset_exception,
.machine_check_exception = pSeries_machine_check_exception,
#ifdef CONFIG_KEXEC
.machine_kexec = default_machine_kexec,
.machine_kexec_prepare = default_machine_kexec_prepare,
.machine_crash_shutdown = default_machine_crash_shutdown,
#endif
};

1
arch/powerpc/platforms/pseries/smp.c
View File

@ -48,6 +48,7 @@
#include <asm/vdso_datapage.h>
#include "plpar_wrappers.h"
#include "pseries.h"
#ifdef DEBUG
#include <asm/udbg.h>

78
arch/powerpc/sysdev/fsl_soc.c
View File

@ -441,7 +441,8 @@ static int __init fsl_usb_of_init(void)
{
struct device_node *np;
unsigned int i;
struct platform_device *usb_dev_mph = NULL, *usb_dev_dr = NULL;
struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL,
*usb_dev_dr_client = NULL;
int ret;
for (np = NULL, i = 0;
@ -507,33 +508,72 @@ static int __init fsl_usb_of_init(void)
of_irq_to_resource(np, 0, &r[1]);
usb_dev_dr =
platform_device_register_simple("fsl-ehci", i, r, 2);
if (IS_ERR(usb_dev_dr)) {
ret = PTR_ERR(usb_dev_dr);
prop = get_property(np, "dr_mode", NULL);
if (!prop || !strcmp(prop, "host")) {
usb_data.operating_mode = FSL_USB2_DR_HOST;
usb_dev_dr_host = platform_device_register_simple(
"fsl-ehci", i, r, 2);
if (IS_ERR(usb_dev_dr_host)) {
ret = PTR_ERR(usb_dev_dr_host);
goto err;
}
} else if (prop && !strcmp(prop, "peripheral")) {
usb_data.operating_mode = FSL_USB2_DR_DEVICE;
usb_dev_dr_client = platform_device_register_simple(
"fsl-usb2-udc", i, r, 2);
if (IS_ERR(usb_dev_dr_client)) {
ret = PTR_ERR(usb_dev_dr_client);
goto err;
}
} else if (prop && !strcmp(prop, "otg")) {
usb_data.operating_mode = FSL_USB2_DR_OTG;
usb_dev_dr_host = platform_device_register_simple(
"fsl-ehci", i, r, 2);
if (IS_ERR(usb_dev_dr_host)) {
ret = PTR_ERR(usb_dev_dr_host);
goto err;
}
usb_dev_dr_client = platform_device_register_simple(
"fsl-usb2-udc", i, r, 2);
if (IS_ERR(usb_dev_dr_client)) {
ret = PTR_ERR(usb_dev_dr_client);
goto err;
}
} else {
ret = -EINVAL;
goto err;
}
usb_dev_dr->dev.coherent_dma_mask = 0xffffffffUL;
usb_dev_dr->dev.dma_mask = &usb_dev_dr->dev.coherent_dma_mask;
usb_data.operating_mode = FSL_USB2_DR_HOST;
prop = get_property(np, "phy_type", NULL);
usb_data.phy_mode = determine_usb_phy(prop);
ret =
platform_device_add_data(usb_dev_dr, &usb_data,
sizeof(struct
fsl_usb2_platform_data));
if (ret)
goto unreg_dr;
if (usb_dev_dr_host) {
usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL;
usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host->
dev.coherent_dma_mask;
if ((ret = platform_device_add_data(usb_dev_dr_host,
&usb_data, sizeof(struct
fsl_usb2_platform_data))))
goto unreg_dr;
}
if (usb_dev_dr_client) {
usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL;
usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client->
dev.coherent_dma_mask;
if ((ret = platform_device_add_data(usb_dev_dr_client,
&usb_data, sizeof(struct
fsl_usb2_platform_data))))
goto unreg_dr;
}
}
return 0;
unreg_dr:
if (usb_dev_dr)
platform_device_unregister(usb_dev_dr);
if (usb_dev_dr_host)
platform_device_unregister(usb_dev_dr_host);
if (usb_dev_dr_client)
platform_device_unregister(usb_dev_dr_client);
unreg_mph:
if (usb_dev_mph)
platform_device_unregister(usb_dev_mph);
@ -699,7 +739,7 @@ static int __init fs_enet_of_init(void)
if (ret)
goto unreg;
}
of_node_put(phy);
of_node_put(mdio);

21
arch/powerpc/sysdev/mpic.c
View File

@ -1395,4 +1395,25 @@ void smp_mpic_message_pass(int target, int msg)
break;
}
}
int __init smp_mpic_probe(void)
{
int nr_cpus;
DBG("smp_mpic_probe()...\n");
nr_cpus = cpus_weight(cpu_possible_map);
DBG("nr_cpus: %d\n", nr_cpus);
if (nr_cpus > 1)
mpic_request_ipis();
return nr_cpus;
}
void __devinit smp_mpic_setup_cpu(int cpu)
{
mpic_setup_this_cpu();
}
#endif /* CONFIG_SMP */

6
arch/powerpc/sysdev/qe_lib/ucc_slow.c
View File

@ -179,7 +179,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
uccs->us_info = us_info;
uccs->saved_uccm = 0;
uccs->p_rx_frame = 0;
uccs->us_regs = us_info->us_regs;
uccs->us_regs = us_info->regs;
us_regs = uccs->us_regs;
uccs->p_ucce = (u16 *) & (us_regs->ucce);
uccs->p_uccm = (u16 *) & (us_regs->uccm);
@ -206,7 +206,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
uccs->us_pram = qe_muram_addr(uccs->us_pram_offset);
/* Init Guemr register */
if ((ret = ucc_init_guemr((struct ucc_common *) (us_info->us_regs)))) {
if ((ret = ucc_init_guemr((struct ucc_common *) (us_info->regs)))) {
uccs_err("ucc_slow_init: Could not init the guemr register.");
ucc_slow_free(uccs);
return ret;
@ -214,7 +214,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
/* Set UCC to slow type */
if ((ret = ucc_set_type(us_info->ucc_num,
(struct ucc_common *) (us_info->us_regs),
(struct ucc_common *) (us_info->regs),
UCC_SPEED_TYPE_SLOW))) {
uccs_err("ucc_slow_init: Could not init the guemr register.");
ucc_slow_free(uccs);

1
arch/powerpc/xmon/xmon.c
View File

@ -2811,7 +2811,6 @@ static void dump_spu_fields(struct spu *spu)
DUMP_FIELD(spu, "0x%lx", irqs[2]);
DUMP_FIELD(spu, "0x%x", slb_replace);
DUMP_FIELD(spu, "%d", pid);
DUMP_FIELD(spu, "%d", prio);
DUMP_FIELD(spu, "0x%p", mm);
DUMP_FIELD(spu, "0x%p", ctx);
DUMP_FIELD(spu, "0x%p", rq);

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