forked from Minki/linux
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6: mfd: Avoid twl6040-codec PLL reconfiguration when not needed mfd: Store twl6040-codec mclk configuration
This commit is contained in:
commit
abaaf3e12c
@ -282,6 +282,7 @@ int twl6040_power(struct twl6040 *twl6040, int on)
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/* Default PLL configuration after power up */
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twl6040->pll = TWL6040_SYSCLK_SEL_LPPLL;
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twl6040->sysclk = 19200000;
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twl6040->mclk = 32768;
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} else {
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/* already powered-down */
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if (!twl6040->power_count) {
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@ -305,6 +306,7 @@ int twl6040_power(struct twl6040 *twl6040, int on)
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twl6040_power_down(twl6040);
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}
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twl6040->sysclk = 0;
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twl6040->mclk = 0;
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}
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out:
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@ -324,23 +326,38 @@ int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
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hppllctl = twl6040_reg_read(twl6040, TWL6040_REG_HPPLLCTL);
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lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
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/* Force full reconfiguration when switching between PLL */
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if (pll_id != twl6040->pll) {
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twl6040->sysclk = 0;
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twl6040->mclk = 0;
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}
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switch (pll_id) {
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case TWL6040_SYSCLK_SEL_LPPLL:
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/* low-power PLL divider */
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switch (freq_out) {
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case 17640000:
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lppllctl |= TWL6040_LPLLFIN;
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break;
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case 19200000:
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lppllctl &= ~TWL6040_LPLLFIN;
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break;
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default:
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dev_err(twl6040->dev,
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"freq_out %d not supported\n", freq_out);
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ret = -EINVAL;
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goto pll_out;
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/* Change the sysclk configuration only if it has been canged */
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if (twl6040->sysclk != freq_out) {
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switch (freq_out) {
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case 17640000:
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lppllctl |= TWL6040_LPLLFIN;
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break;
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case 19200000:
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lppllctl &= ~TWL6040_LPLLFIN;
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break;
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default:
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dev_err(twl6040->dev,
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"freq_out %d not supported\n",
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freq_out);
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ret = -EINVAL;
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goto pll_out;
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}
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twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
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lppllctl);
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}
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twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
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/* The PLL in use has not been change, we can exit */
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if (twl6040->pll == pll_id)
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break;
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switch (freq_in) {
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case 32768:
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@ -371,48 +388,56 @@ int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
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goto pll_out;
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}
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hppllctl &= ~TWL6040_MCLK_MSK;
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if (twl6040->mclk != freq_in) {
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hppllctl &= ~TWL6040_MCLK_MSK;
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switch (freq_in) {
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case 12000000:
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/* PLL enabled, active mode */
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hppllctl |= TWL6040_MCLK_12000KHZ |
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TWL6040_HPLLENA;
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break;
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case 19200000:
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/*
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* PLL disabled
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* (enable PLL if MCLK jitter quality
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* doesn't meet specification)
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*/
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hppllctl |= TWL6040_MCLK_19200KHZ;
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break;
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case 26000000:
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/* PLL enabled, active mode */
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hppllctl |= TWL6040_MCLK_26000KHZ |
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TWL6040_HPLLENA;
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break;
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case 38400000:
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/* PLL enabled, active mode */
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hppllctl |= TWL6040_MCLK_38400KHZ |
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TWL6040_HPLLENA;
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break;
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default:
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dev_err(twl6040->dev,
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"freq_in %d not supported\n", freq_in);
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ret = -EINVAL;
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goto pll_out;
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}
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switch (freq_in) {
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case 12000000:
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/* PLL enabled, active mode */
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hppllctl |= TWL6040_MCLK_12000KHZ |
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TWL6040_HPLLENA;
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break;
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case 19200000:
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/*
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* PLL disabled
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* (enable PLL if MCLK jitter quality
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* doesn't meet specification)
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* enable clock slicer to ensure input waveform is
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* square
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*/
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hppllctl |= TWL6040_MCLK_19200KHZ;
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break;
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case 26000000:
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/* PLL enabled, active mode */
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hppllctl |= TWL6040_MCLK_26000KHZ |
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TWL6040_HPLLENA;
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break;
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case 38400000:
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/* PLL enabled, active mode */
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hppllctl |= TWL6040_MCLK_38400KHZ |
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TWL6040_HPLLENA;
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break;
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default:
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dev_err(twl6040->dev,
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"freq_in %d not supported\n", freq_in);
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ret = -EINVAL;
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goto pll_out;
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hppllctl |= TWL6040_HPLLSQRENA;
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twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
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hppllctl);
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usleep_range(500, 700);
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lppllctl |= TWL6040_HPLLSEL;
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twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
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lppllctl);
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lppllctl &= ~TWL6040_LPLLENA;
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twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
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lppllctl);
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}
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/* enable clock slicer to ensure input waveform is square */
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hppllctl |= TWL6040_HPLLSQRENA;
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twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL, hppllctl);
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usleep_range(500, 700);
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lppllctl |= TWL6040_HPLLSEL;
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twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
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lppllctl &= ~TWL6040_LPLLENA;
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twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
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break;
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default:
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dev_err(twl6040->dev, "unknown pll id %d\n", pll_id);
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@ -421,6 +446,7 @@ int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
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}
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twl6040->sysclk = freq_out;
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twl6040->mclk = freq_in;
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twl6040->pll = pll_id;
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pll_out:
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@ -187,8 +187,10 @@ struct twl6040 {
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int rev;
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u8 vibra_ctrl_cache[2];
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/* PLL configuration */
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int pll;
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unsigned int sysclk;
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unsigned int mclk;
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unsigned int irq;
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unsigned int irq_base;
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