drm/amd/powerplay: refine vce dpm update code on Cz.
Program HardMin based on the vce_arbiter.ecclk if ecclk is 0, disable ECLK DPM 0. Otherwise VCE could hang if switching SCLK from DPM 0 to 6/7 Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1402,14 +1402,22 @@ int cz_dpm_update_vce_dpm(struct pp_hwmgr *hwmgr)
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cz_hwmgr->vce_dpm.hard_min_clk,
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cz_hwmgr->vce_dpm.hard_min_clk,
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PPSMC_MSG_SetEclkHardMin));
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PPSMC_MSG_SetEclkHardMin));
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} else {
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} else {
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/*EPR# 419220 -HW limitation to to */
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/*Program HardMin based on the vce_arbiter.ecclk */
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cz_hwmgr->vce_dpm.hard_min_clk = hwmgr->vce_arbiter.ecclk;
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if (hwmgr->vce_arbiter.ecclk == 0) {
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smum_send_msg_to_smc_with_parameter(hwmgr->smumgr,
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smum_send_msg_to_smc_with_parameter(hwmgr->smumgr,
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PPSMC_MSG_SetEclkHardMin,
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PPSMC_MSG_SetEclkHardMin, 0);
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cz_get_eclk_level(hwmgr,
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/* disable ECLK DPM 0. Otherwise VCE could hang if
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cz_hwmgr->vce_dpm.hard_min_clk,
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* switching SCLK from DPM 0 to 6/7 */
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PPSMC_MSG_SetEclkHardMin));
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smum_send_msg_to_smc_with_parameter(hwmgr->smumgr,
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PPSMC_MSG_SetEclkSoftMin, 1);
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} else {
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cz_hwmgr->vce_dpm.hard_min_clk = hwmgr->vce_arbiter.ecclk;
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smum_send_msg_to_smc_with_parameter(hwmgr->smumgr,
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PPSMC_MSG_SetEclkHardMin,
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cz_get_eclk_level(hwmgr,
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cz_hwmgr->vce_dpm.hard_min_clk,
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PPSMC_MSG_SetEclkHardMin));
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}
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}
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}
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return 0;
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return 0;
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}
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}
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