Merge tag 'omap-for-v4.15/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc

Pull "more soc changes for omaps for v4.15 merge window" from Tony Lindgren:

Drop omap legacy platform data for IRQ, DMA and IO resources. With the
dts files fixed up to contain the necessary data for basic resources, we
can drop the related platform data.

Note that this branch depends on the "omap-for-v4.15/fixes-dt-signed"
branch and the patches with dependencies are based on a merge with that
branch.

These patches first ensure things keep working for the legacy "ti,hwmods"
property when we start making it optional, then adds a minimal TI sysc
interconnect target device driver to handle the new generic "ti,sysc"
compatible property. And then we can finally drop the legacy platform
data for IRQ, DMA and IO resources as seen in the diffstats.

* tag 'omap-for-v4.15/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (25 commits)
  bus: ti-sysc: Fix unbalanced pm_runtime_enable by adding remove
  bus: ti-sysc: mark PM functions as __maybe_unused
  ARM: OMAP2+: omap_device: fix error return code in omap_device_copy_resources()
  ARM: OMAP2+: Drop legacy struct omap_hwmod_addr_space
  ARM: OMAP2+: Drop omap_hwmod_dma_info
  ARM: OMAP2+: Drop omap_hwmod_irq_info
  ARM: OMAP4: Remove legacy IRQ for PRM
  ARM: OMAP3: Remove legacy IRQ for PRM
  bus: ti-sysc: Add minimal TI sysc interconnect target driver
  ARM: OMAP2+: Populate legacy resources for dma and smartreflex
  ARM: OMAP2+: Parse module IO range from dts for legacy "ti,hwmods" support
  ARM: dts: Configure SmartReflex only to idle the interconnect target module
  ARM: dts: Add nodes for missing omap4 interconnect target modules
  dt-bindings: bus: Minimal TI sysc interconnect target module binding
  ARM: dts: Add missing hwmod related properties for dra7
  ARM: dts: Add missing hwmod related nodes for am33xx
  ARM: dts: Add missing dma hwmod property for omap5
  ARM: dts: Add missing wdt3 node for omap4
  ARM: dts: Add missing hsi node for omap4
  ARM: dts: Add missing onewire node for omap4
  ...
This commit is contained in:
Arnd Bergmann
2017-10-20 00:43:31 +02:00
39 changed files with 1254 additions and 1710 deletions

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@@ -21,6 +21,8 @@ Required properties:
"ti,omap3-scm"
"ti,omap4-scm-core"
"ti,omap4-scm-padconf-core"
"ti,omap4-scm-wkup"
"ti,omap4-scm-padconf-wkup"
"ti,omap5-scm-core"
"ti,omap5-scm-padconf-core"
"ti,dra7-scm-core"

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@@ -0,0 +1,93 @@
Texas Instruments sysc interconnect target module wrapper binding
Texas Instruments SoCs can have a generic interconnect target module
hardware for devices connected to various interconnects such as L3
interconnect (Arteris NoC) and L4 interconnect (Sonics s3220). The sysc
is mostly used for interaction between module and PRCM. It participates
in the OCP Disconnect Protocol but other than that is mostly independent
of the interconnect.
Each interconnect target module can have one or more devices connected to
it. There is a set of control registers for managing interconnect target
module clocks, idle modes and interconnect level resets for the module.
These control registers are sprinkled into the unused register address
space of the first child device IP block managed by the interconnect
target module and typically are named REVISION, SYSCONFIG and SYSSTATUS.
Required standard properties:
- compatible shall be one of the following generic types:
"ti,sysc-omap2"
"ti,sysc-omap4"
"ti,sysc-omap4-simple"
or one of the following derivative types for hardware
needing special workarounds:
"ti,sysc-omap3430-sr"
"ti,sysc-omap3630-sr"
"ti,sysc-omap4-sr"
"ti,sysc-omap3-sham"
"ti,sysc-omap-aes"
"ti,sysc-mcasp"
"ti,sysc-usb-host-fs"
- reg shall have register areas implemented for the interconnect
target module in question such as revision, sysc and syss
- reg-names shall contain the register names implemented for the
interconnect target module in question such as
"rev, "sysc", and "syss"
- ranges shall contain the interconnect target module IO range
available for one or more child device IP blocks managed
by the interconnect target module, the ranges may include
multiple ranges such as device L4 range for control and
parent L3 range for DMA access
Optional properties:
- clocks clock specifier for each name in the clock-names as
specified in the binding documentation for ti-clkctrl,
typically available for all interconnect targets on TI SoCs
based on omap4 except if it's read-only register in hwauto
mode as for example omap4 L4_CFG_CLKCTRL
- clock-names should contain at least "fck", and optionally also "ick"
depending on the SoC and the interconnect target module
- ti,hwmods optional TI interconnect module name to use legacy
hwmod platform data
Example: Single instance of MUSB controller on omap4 using interconnect ranges
using offsets from l4_cfg second segment (0x4a000000 + 0x80000 = 0x4a0ab000):
target-module@2b000 { /* 0x4a0ab000, ap 84 12.0 */
compatible = "ti,sysc-omap2";
ti,hwmods = "usb_otg_hs";
reg = <0x2b400 0x4>,
<0x2b404 0x4>,
<0x2b408 0x4>;
reg-names = "rev", "sysc", "syss";
clocks = <&l3_init_clkctrl OMAP4_USB_OTG_HS_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x2b000 0x1000>;
usb_otg_hs: otg@0 {
compatible = "ti,omap4-musb";
reg = <0x0 0x7ff>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
usb-phy = <&usb2_phy>;
...
};
};
Note that other SoCs, such as am335x can have multipe child devices. On am335x
there are two MUSB instances, two USB PHY instances, and a single CPPI41 DMA
instance as children of a single interconnet target module.

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@@ -1,10 +1,12 @@
OMAP SSI controller bindings
OMAP Synchronous Serial Interface (SSI) controller implements a legacy
variant of MIPI's High Speed Synchronous Serial Interface (HSI).
OMAP3's Synchronous Serial Interface (SSI) controller implements a
legacy variant of MIPI's High Speed Synchronous Serial Interface (HSI),
while the controller found inside OMAP4 is supposed to be fully compliant
with the HSI standard.
Required properties:
- compatible: Should include "ti,omap3-ssi".
- compatible: Should include "ti,omap3-ssi" or "ti,omap4-hsi"
- reg-names: Contains the values "sys" and "gdd" (in this order).
- reg: Contains a matching register specifier for each entry
in reg-names.
@@ -27,6 +29,7 @@ Each port is represented as a sub-node of the ti,omap3-ssi device.
Required Port sub-node properties:
- compatible: Should be set to the following value
ti,omap3-ssi-port (applicable to OMAP34xx devices)
ti,omap4-hsi-port (applicable to OMAP44xx devices)
- reg-names: Contains the values "tx" and "rx" (in this order).
- reg: Contains a matching register specifier for each entry
in reg-names.
@@ -38,6 +41,10 @@ Required Port sub-node properties:
property. If it's missing the port will not be
enabled.
Optional properties:
- ti,hwmods: Shall contain TI interconnect module name if needed
by the SoC
Example for Nokia N900:
ssi-controller@48058000 {

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@@ -7,8 +7,10 @@ of the EMIF IP and memory parts attached to it.
Required properties:
- compatible : Should be of the form "ti,emif-<ip-rev>" where <ip-rev>
is the IP revision of the specific EMIF instance.
For am437x should be ti,emif-am4372.
is the IP revision of the specific EMIF instance. For newer controllers,
compatible should be one of the following:
"ti,emif-am3352"
"ti,emif-am4372"
- phy-type : <u32> indicating the DDR phy type. Following are the
allowed values

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@@ -0,0 +1,47 @@
Texas Instruments SmartReflex binding
SmartReflex is used to set and adjust the SoC operating points.
Required properties:
compatible: Shall be one of the following:
"ti,omap3-smartreflex-core"
"ti,omap3-smartreflex-iva"
"ti,omap4-smartreflex-core"
"ti,omap4-smartreflex-mpu"
"ti,omap4-smartreflex-iva"
reg: Shall contain the device instance IO range
interrupts: Shall contain the device instance interrupt
Optional properties:
ti,hwmods: Shall contain the TI interconnect module name if needed
by the SoC
Example:
smartreflex_iva: smartreflex@4a0db000 {
compatible = "ti,omap4-smartreflex-iva";
reg = <0x4a0db000 0x80>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "smartreflex_iva";
};
smartreflex_core: smartreflex@4a0dd000 {
compatible = "ti,omap4-smartreflex-core";
reg = <0x4a0dd000 0x80>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "smartreflex_core";
};
smartreflex_mpu: smartreflex@4a0d9000 {
compatible = "ti,omap4-smartreflex-mpu";
reg = <0x4a0d9000 0x80>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "smartreflex_mpu";
};