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powerpc/64s: Move IDLE_STATE_ENTER_SEQ[_NORET] into idle_book3s.S

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This macro is only used in idle_book3s.S, move it in there and add a
more descriptive comment.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
[mpe: Split out of larger patch and write change log]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Nicholas Piggin 2017-08-29 21:36:35 +10:00 committed by Michael Ellerman
parent 82b7fcc005
commit aafc8a8300
2 changed files with 17 additions and 16 deletions
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16
arch/powerpc/include/asm/cpuidle.h
View File

@ -101,20 +101,4 @@ static inline void report_invalid_psscr_val(u64 psscr_val, int err)
#endif
/* Idle state entry routines */
#ifdef CONFIG_PPC_P7_NAP
#define IDLE_STATE_ENTER_SEQ(IDLE_INST) \
/* Magic NAP/SLEEP/WINKLE mode enter sequence */ \
std r0,0(r1); \
ptesync; \
ld r0,0(r1); \
236: cmpd cr0,r0,r0; \
bne 236b; \
IDLE_INST; \
#define IDLE_STATE_ENTER_SEQ_NORET(IDLE_INST) \
IDLE_STATE_ENTER_SEQ(IDLE_INST) \
b .
#endif /* CONFIG_PPC_P7_NAP */
#endif

17
arch/powerpc/kernel/idle_book3s.S
View File

@ -205,6 +205,23 @@ pnv_powersave_common:
mtmsrd r7,0
bctr
/*
* This is the sequence required to execute idle instructions, as
* specified in ISA v2.07 (and earlier). MSR[IR] and MSR[DR] must be 0.
*/
#define IDLE_STATE_ENTER_SEQ(IDLE_INST) \
/* Magic NAP/SLEEP/WINKLE mode enter sequence */ \
std r0,0(r1); \
ptesync; \
ld r0,0(r1); \
236: cmpd cr0,r0,r0; \
bne 236b; \
IDLE_INST;
#define IDLE_STATE_ENTER_SEQ_NORET(IDLE_INST) \
IDLE_STATE_ENTER_SEQ(IDLE_INST) \
b .
.globl pnv_enter_arch207_idle_mode
pnv_enter_arch207_idle_mode:
#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE