drm/amd/display: add dcn21 core DC changes

Add missing parameters, to make dcn21 compile
without errors

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Bhawanpreet Lakha 2019-07-26 17:16:47 -04:00 committed by Alex Deucher
parent dd44a63386
commit aa91916770
4 changed files with 11 additions and 0 deletions

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@ -385,6 +385,9 @@ struct dc_debug_options {
struct dc_bw_validation_profile bw_val_profile;
#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
bool disable_fec;
#endif
#ifdef CONFIG_DRM_AMD_DC_DCN2_1
bool disable_48mhz_pwrdwn;
#endif
/* This forces a hard min on the DCFCLK requested to SMU/PP
* watermarks are not affected.

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@ -87,6 +87,9 @@ void core_link_set_avmute(struct pipe_ctx *pipe_ctx, bool enable);
struct resource_pool;
struct dc_state;
struct resource_context;
#if defined(CONFIG_DRM_AMD_DC_DCN2_1)
struct clk_bw_params;
#endif
struct resource_funcs {
void (*destroy)(struct resource_pool **pool);

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@ -40,6 +40,10 @@ struct cstate_pstate_watermarks_st {
struct dcn_watermarks {
uint32_t pte_meta_urgent_ns;
uint32_t urgent_ns;
#if defined(CONFIG_DRM_AMD_DC_DCN2_1)
uint32_t frac_urg_bw_nom;
uint32_t frac_urg_bw_flip;
#endif
struct cstate_pstate_watermarks_st cstate_pstate;
};

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@ -48,6 +48,7 @@ struct dce_hwseq_wa {
bool DEGVIDCN10_253;
bool false_optc_underflow;
bool DEGVIDCN10_254;
bool DEGVIDCN21;
};
struct hwseq_wa_state {