x86: cleanup C1E enabled detection
Rename the "MSR_K8_ENABLE_C1E" MSR to INT_PENDING_MSG, which is the name in the data sheet as well. Move the C1E mask to the header file. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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				| @ -25,7 +25,6 @@ extern void vide(void); | ||||
| __asm__(".align 4\nvide: ret"); | ||||
| 
 | ||||
| #ifdef CONFIG_X86_LOCAL_APIC | ||||
| #define ENABLE_C1E_MASK         0x18000000 | ||||
| #define CPUID_PROCESSOR_SIGNATURE       1 | ||||
| #define CPUID_XFAM              0x0ff00000 | ||||
| #define CPUID_XFAM_K8           0x00000000 | ||||
| @ -45,8 +44,8 @@ static __cpuinit int amd_apic_timer_broken(void) | ||||
| 			break; | ||||
| 	case CPUID_XFAM_10H: | ||||
| 	case CPUID_XFAM_11H: | ||||
| 		rdmsr(MSR_K8_ENABLE_C1E, lo, hi); | ||||
| 		if (lo & ENABLE_C1E_MASK) { | ||||
| 		rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi); | ||||
| 		if (lo & K8_INTP_C1E_ACTIVE_MASK) { | ||||
| 			if (smp_processor_id() != boot_cpu_physical_apicid) | ||||
| 				printk(KERN_INFO "AMD C1E detected late. " | ||||
| 				       "	Force timer broadcast.\n"); | ||||
|  | ||||
| @ -110,7 +110,6 @@ static void __cpuinit early_init_amd_mc(struct cpuinfo_x86 *c) | ||||
| #endif | ||||
| } | ||||
| 
 | ||||
| #define ENABLE_C1E_MASK		0x18000000 | ||||
| #define CPUID_PROCESSOR_SIGNATURE	1 | ||||
| #define CPUID_XFAM		0x0ff00000 | ||||
| #define CPUID_XFAM_K8		0x00000000 | ||||
| @ -130,8 +129,8 @@ static __cpuinit int amd_apic_timer_broken(void) | ||||
| 			break; | ||||
| 	case CPUID_XFAM_10H: | ||||
| 	case CPUID_XFAM_11H: | ||||
| 		rdmsr(MSR_K8_ENABLE_C1E, lo, hi); | ||||
| 		if (lo & ENABLE_C1E_MASK) | ||||
| 		rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi); | ||||
| 		if (lo & K8_INTP_C1E_ACTIVE_MASK) | ||||
| 			return 1; | ||||
| 		break; | ||||
| 	default: | ||||
|  | ||||
| @ -111,7 +111,9 @@ | ||||
| #define MSR_K8_TOP_MEM2			0xc001001d | ||||
| #define MSR_K8_SYSCFG			0xc0010010 | ||||
| #define MSR_K8_HWCR			0xc0010015 | ||||
| #define MSR_K8_ENABLE_C1E		0xc0010055 | ||||
| #define MSR_K8_INT_PENDING_MSG		0xc0010055 | ||||
| /* C1E active bits in int pending message */ | ||||
| #define K8_INTP_C1E_ACTIVE_MASK		0x18000000 | ||||
| #define MSR_K8_TSEG_ADDR		0xc0010112 | ||||
| #define K8_MTRRFIXRANGE_DRAM_ENABLE	0x00040000 /* MtrrFixDramEn bit    */ | ||||
| #define K8_MTRRFIXRANGE_DRAM_MODIFY	0x00080000 /* MtrrFixDramModEn bit */ | ||||
|  | ||||
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