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MIPS: Netlogic: Move serial ports to device tree

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Add the serial ports to the device tree and remove the platform
code for adding them.

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Patchwork: http://patchwork.linux-mips.org/patch/4098/
Signed-off-by: John Crispin <blogic@openwrt.org>
This commit is contained in:
Jayachandran C 2012-07-13 21:53:21 +05:30 committed by John Crispin
parent d072a215d2
commit a9f1682120
3 changed files with 22 additions and 109 deletions
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21
arch/mips/netlogic/dts/xlp_evp.dts
View File

@ -22,6 +22,27 @@
compatible = "simple-bus"; compatible = "simple-bus";
ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
1 0 0 0x16000000 0x01000000>; // GBU chipselects 1 0 0 0x16000000 0x01000000>; // GBU chipselects
serial0: serial@30000 {
device_type = "serial";
compatible = "ns16550";
reg = <0 0x30100 0xa00>;
reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <133333333>;
interrupt-parent = <&pic>;
interrupts = <17>;
};
serial1: serial@31000 {
device_type = "serial";
compatible = "ns16550";
reg = <0 0x31100 0xa00>;
reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <133333333>;
interrupt-parent = <&pic>;
interrupts = <18>;
};
i2c0: ocores@32000 { i2c0: ocores@32000 {
compatible = "opencores,i2c-ocores"; compatible = "opencores,i2c-ocores";
#address-cells = <1>; #address-cells = <1>;

2
arch/mips/netlogic/xlp/Makefile
View File

@ -1,3 +1,3 @@
obj-y += setup.o platform.o nlm_hal.o obj-y += setup.o nlm_hal.o
obj-$(CONFIG_SMP) += wakeup.o obj-$(CONFIG_SMP) += wakeup.o
obj-$(CONFIG_USB) += usb-init.o obj-$(CONFIG_USB) += usb-init.o

108
arch/mips/netlogic/xlp/platform.c
View File

@ -1,108 +0,0 @@
/*
* Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
* reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* General Public License (GPL) Version 2, available from the file
* COPYING in the main directory of this source tree, or the NetLogic
* license below:
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <linux/dma-mapping.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/serial.h>
#include <linux/serial_8250.h>
#include <linux/pci.h>
#include <linux/serial_reg.h>
#include <linux/spinlock.h>
#include <asm/time.h>
#include <asm/addrspace.h>
#include <asm/netlogic/haldefs.h>
#include <asm/netlogic/xlp-hal/iomap.h>
#include <asm/netlogic/xlp-hal/xlp.h>
#include <asm/netlogic/xlp-hal/pic.h>
#include <asm/netlogic/xlp-hal/uart.h>
static unsigned int nlm_xlp_uart_in(struct uart_port *p, int offset)
{
return nlm_read_reg(p->iobase, offset);
}
static void nlm_xlp_uart_out(struct uart_port *p, int offset, int value)
{
nlm_write_reg(p->iobase, offset, value);
}
#define PORT(_irq) \
{ \
.irq = _irq, \
.regshift = 2, \
.iotype = UPIO_MEM32, \
.flags = (UPF_SKIP_TEST|UPF_FIXED_TYPE|\
UPF_BOOT_AUTOCONF), \
.uartclk = XLP_IO_CLK, \
.type = PORT_16550A, \
.serial_in = nlm_xlp_uart_in, \
.serial_out = nlm_xlp_uart_out, \
}
static struct plat_serial8250_port xlp_uart_data[] = {
PORT(PIC_UART_0_IRQ),
PORT(PIC_UART_1_IRQ),
{},
};
static struct platform_device uart_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = xlp_uart_data,
},
};
static int __init nlm_platform_uart_init(void)
{
unsigned long mmio;
mmio = (unsigned long)nlm_get_uart_regbase(0, 0);
xlp_uart_data[0].iobase = mmio;
xlp_uart_data[0].membase = (void __iomem *)mmio;
xlp_uart_data[0].mapbase = mmio;
mmio = (unsigned long)nlm_get_uart_regbase(0, 1);
xlp_uart_data[1].iobase = mmio;
xlp_uart_data[1].membase = (void __iomem *)mmio;
xlp_uart_data[1].mapbase = mmio;
return platform_device_register(&uart_device);
}
arch_initcall(nlm_platform_uart_init);