Device tree changes for omaps for v4.10 merge window:

- A series of patches to configure tps65217 PMIC interrupts for
   power button, charger and usb and use them on am335x
 
 - Configure EEPROM, LEDs and USR1 button for omap5 boards
 
 - Add tscadc DMA properites for am33xx and am4372
 
 - Configure baltos-ir5221 both musb channels to host mode
 
 - Configure internal and external RTC clocks for am335x boards
 
 - Don't reset gpio3 block on baltos
 
 - Remove pinmux for dra72-evm for erratum i869, fix the regulators
   and seprate out tps65917 support
 
 - Add dra718-evm support
 
 - Add minimal droid 4 xt894 support
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Merge tag 'omap-for-v4.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Device tree changes for omaps for v4.10 merge window:

- A series of patches to configure tps65217 PMIC interrupts for
  power button, charger and usb and use them on am335x

- Configure EEPROM, LEDs and USR1 button for omap5 boards

- Add tscadc DMA properites for am33xx and am4372

- Configure baltos-ir5221 both musb channels to host mode

- Configure internal and external RTC clocks for am335x boards

- Don't reset gpio3 block on baltos

- Remove pinmux for dra72-evm for erratum i869, fix the regulators
  and seprate out tps65917 support

- Add dra718-evm support

- Add minimal droid 4 xt894 support

* tag 'omap-for-v4.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (22 commits)
  ARM: dts: Add minimal support for motorola droid 4 xt894
  ARM: dts: Add support for dra718-evm
  ARM: dts: dra72: Add separate dtsi for tps65917
  ARM: dts: dra72-evm: Fix modelling of regulators
  ARM: dts: dra72-evm: Remove pinmux configurations for erratum i869
  ARM: dts: am335x-baltos: don't reset gpio3 block
  ARM: dts: AM335X-evmsk: Add the internal and external clock nodes for rtc
  ARM: dts: AM335X-evm: Add the internal and external clock nodes for rtc
  ARM: dts: AM335X-bone-common: Add the internal and external clock nodes for rtc
  ARM: dts: am335x-baltos-ir5221: use both musb channels in host mode
  ARM: dts: am4372: add DMA properties for tscadc
  ARM: dts: am33xx: add DMA properties for tscadc
  ARM: dts: omap5 uevm: add USR1 button
  ARM: dts: omap5 uevm: add LEDs
  ARM: dts: omap5 uevm: add EEPROM
  ARM: dts: am335x: Add the power button interrupt
  ARM: dts: am335x: Add the charger interrupt
  dt-bindings: mfd: Provide human readable defines for TPS65217 interrupts
  ARM: dts: am335x: Support the PMIC interrupt
  ARM: dts: tps65217: Add the power button device
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2016-11-18 16:43:19 -08:00
commit a90a6f9c3d
17 changed files with 787 additions and 326 deletions

View File

@ -571,6 +571,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
am335x-sl50.dtb \
am335x-wega-rdk.dtb
dtb-$(CONFIG_ARCH_OMAP4) += \
omap4-droid4-xt894.dtb \
omap4-duovero-parlor.dtb \
omap4-kc1.dtb \
omap4-panda.dtb \
@ -600,7 +601,8 @@ dtb-$(CONFIG_SOC_DRA7XX) += \
am572x-idk.dtb \
dra7-evm.dtb \
dra72-evm.dtb \
dra72-evm-revc.dtb
dra72-evm-revc.dtb \
dra71-evm.dtb
dtb-$(CONFIG_ARCH_ORION5X) += \
orion5x-kuroboxpro.dtb \
orion5x-lacie-d2-network.dtb \

View File

@ -114,7 +114,7 @@
&usb1 {
status = "okay";
dr_mode = "otg";
dr_mode = "host";
};
&cpsw_emac0 {

View File

@ -406,3 +406,7 @@
&gpio0 {
ti,no-reset-on-init;
};
&gpio3 {
ti,no-reset-on-init;
};

View File

@ -6,6 +6,8 @@
* published by the Free Software Foundation.
*/
#include <dt-bindings/mfd/tps65217.h>
/ {
cpus {
cpu@0 {
@ -310,8 +312,23 @@
* by the hardware problems. (Tip: double-check by performing a current
* measurement after shutdown: it should be less than 1 mA.)
*/
interrupts = <7>; /* NMI */
interrupt-parent = <&intc>;
ti,pmic-shutdown-controller;
charger {
interrupts = <TPS65217_IRQ_AC>, <TPS65217_IRQ_USB>;
interrupts-names = "AC", "USB";
status = "okay";
};
pwrbutton {
interrupts = <TPS65217_IRQ_PB>;
status = "okay";
};
regulators {
dcdc1_reg: regulator@0 {
regulator-name = "vdds_dpr";
@ -393,3 +410,8 @@
&sham {
status = "okay";
};
&rtc {
clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
clock-names = "ext-clk", "int-clk";
};

View File

@ -783,3 +783,8 @@
pinctrl-names = "default";
pinctrl-0 = <&dcan1_pins_default>;
};
&rtc {
clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
clock-names = "ext-clk", "int-clk";
};

View File

@ -715,3 +715,8 @@
blue-and-red-wiring = "crossed";
};
&rtc {
clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
clock-names = "ext-clk", "int-clk";
};

View File

@ -507,6 +507,8 @@
interrupts = <75
76>;
ti,hwmods = "rtc";
clocks = <&clkdiv32k_ick>;
clock-names = "int-clk";
};
spi0: spi@48030000 {
@ -857,6 +859,8 @@
interrupts = <16>;
ti,hwmods = "adc_tsc";
status = "disabled";
dmas = <&edma 53 0>, <&edma 57 0>;
dma-names = "fifo0", "fifo1";
tsc {
compatible = "ti,am3359-tsc";

View File

@ -872,6 +872,8 @@
clocks = <&adc_tsc_fck>;
clock-names = "fck";
status = "disabled";
dmas = <&edma 53 0>, <&edma 57 0>;
dma-names = "fifo0", "fifo1";
tsc {
compatible = "ti,am3359-tsc";

View File

@ -0,0 +1,230 @@
/*
* Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "dra72-evm-common.dtsi"
#include <dt-bindings/net/ti-dp83867.h>
/ {
compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7";
model = "TI DRA718 EVM";
memory {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */
};
vpo_sd_1v8_3v3: gpio-regulator-TPS74801 {
compatible = "regulator-gpio";
regulator-name = "vddshv8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3000000>;
regulator-boot-on;
vin-supply = <&evm_5v0>;
gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
states = <1800000 0x0
3000000 0x1>;
};
poweroff: gpio-poweroff {
compatible = "gpio-poweroff";
gpios = <&gpio7 30 GPIO_ACTIVE_HIGH>;
input;
};
};
&i2c1 {
status = "okay";
clock-frequency = <400000>;
lp8733: lp8733@60 {
compatible = "ti,lp8733";
reg = <0x60>;
buck0-in-supply =<&vsys_3v3>;
buck1-in-supply =<&vsys_3v3>;
ldo0-in-supply =<&evm_5v0>;
ldo1-in-supply =<&evm_5v0>;
lp8733_regulators: regulators {
lp8733_buck0_reg: buck0 {
/* FB_B0 -> LP8733-BUCK1 - VPO_S1_AVS - VDD_CORE_AVS (core, mpu, gpu) */
regulator-name = "lp8733-buck0";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1250000>;
regulator-always-on;
regulator-boot-on;
};
lp8733_buck1_reg: buck1 {
/* FB_B1 -> LP8733-BUCK2 - VPO_S2_AVS - VDD_DSP_AVS (DSP/eve/iva) */
regulator-name = "lp8733-buck1";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1250000>;
regulator-boot-on;
regulator-always-on;
};
lp8733_ldo0_reg: ldo0 {
/* LDO0 -> LP8733-LDO1 - VPO_L1_3V3 - VDDSHV8 (optional) */
regulator-name = "lp8733-ldo0";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
lp8733_ldo1_reg: ldo1 {
/* LDO1 -> LP8733-LDO2 - VPO_L2_3V3 - VDDA_USB3V3 */
regulator-name = "lp8733-ldo1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
};
};
lp8732: lp8732@61 {
compatible = "ti,lp8732";
reg = <0x61>;
buck0-in-supply =<&vsys_3v3>;
buck1-in-supply =<&vsys_3v3>;
ldo0-in-supply =<&vsys_3v3>;
ldo1-in-supply =<&vsys_3v3>;
lp8732_regulators: regulators {
lp8732_buck0_reg: buck0 {
/* FB_B0 -> LP8732-BUCK1 - VPO_S3_1V8 - VDDS_1V8 */
regulator-name = "lp8732-buck0";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
lp8732_buck1_reg: buck1 {
/* FB_B1 -> LP8732-BUCK2 - VPO_S4_DDR - VDD_DDR_1V35 */
regulator-name = "lp8732-buck1";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-boot-on;
regulator-always-on;
};
lp8732_ldo0_reg: ldo0 {
/* LDO0 -> LP8732-LDO1 - VPO_L3_1V8 - VDA_1V8_PLL */
regulator-name = "lp8732-ldo0";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
lp8732_ldo1_reg: ldo1 {
/* LDO1 -> LP8732-LDO2 - VPO_L4_1V8 - VDA_1V8_PHY */
regulator-name = "lp8732-ldo1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
};
};
};
&pcf_gpio_21 {
interrupt-parent = <&gpio7>;
interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
};
&pcf_hdmi {
p0 {
/*
* PM_OEn to High: Disable routing I2C3 to PM_I2C
* With this PM_SEL(p3) should not matter
*/
gpio-hog;
gpios = <0 GPIO_ACTIVE_LOW>;
output-high;
line-name = "pm_oe_n";
};
};
&mmc1 {
vmmc_aux-supply = <&vpo_sd_1v8_3v3>;
};
&mac {
mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
<&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */
<&pcf_hdmi 10 GPIO_ACTIVE_LOW>; /* P12 */
dual_emac;
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <2>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <3>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>;
};
&davinci_mdio {
dp83867_0: ethernet-phy@2 {
reg = <2>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
ti,impedance-control = <0x1f>;
};
dp83867_1: ethernet-phy@3 {
reg = <3>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
ti,impedance-control = <0x1f>;
};
};
/* No Sata on this device */
&sata_phy {
status = "disabled";
};
&sata {
status = "disabled";
};
/* No RTC on this device */
&rtc {
status = "disabled";
};
&usb2_phy1 {
phy-supply = <&lp8733_ldo1_reg>;
};
&usb2_phy2 {
phy-supply = <&lp8733_ldo1_reg>;
};
&dss {
/* Supplied by VDA_1V8_PLL */
vdda_video-supply = <&lp8732_ldo0_reg>;
};
&hdmi {
/* Supplied by VDA_1V8_PHY */
vdda_video-supply = <&lp8732_ldo1_reg>;
};

View File

@ -18,11 +18,49 @@
display0 = &hdmi0;
};
evm_12v0: fixedregulator-evm12v0 {
/* main supply */
compatible = "regulator-fixed";
regulator-name = "evm_12v0";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-always-on;
regulator-boot-on;
};
evm_5v0: fixedregulator-evm5v0 {
/* Output 1 of TPS43351QDAPRQ1 on dra72-evm */
/* Output 1 of LM5140QRWGTQ1 on dra71-evm */
compatible = "regulator-fixed";
regulator-name = "evm_5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&evm_12v0>;
regulator-always-on;
regulator-boot-on;
};
vsys_3v3: fixedregulator-vsys3v3 {
/* Output 2 of TPS43351QDAPRQ1 on dra72-evm */
/* Output 2 of LM5140QRWGTQ1 on dra71-evm */
compatible = "regulator-fixed";
regulator-name = "vsys_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&evm_12v0>;
regulator-always-on;
regulator-boot-on;
};
evm_3v3_sw: fixedregulator-evm_3v3 {
/* TPS22965DSG */
compatible = "regulator-fixed";
regulator-name = "evm_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vsys_3v3>;
regulator-always-on;
regulator-boot-on;
};
aic_dvdd: fixedregulator-aic_dvdd {
@ -39,6 +77,7 @@
regulator-name = "evm_3v3_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&evm_3v3_sw>;
enable-active-high;
gpio = <&pcf_gpio_21 5 GPIO_ACTIVE_HIGH>;
};
@ -69,9 +108,6 @@
tpd12s015: encoder {
compatible = "ti,tpd12s015";
pinctrl-names = "default";
pinctrl-0 = <&tpd12s015_pins>;
gpios = <&pcf_hdmi 4 GPIO_ACTIVE_HIGH>, /* P4, CT CP HPD */
<&pcf_hdmi 5 GPIO_ACTIVE_HIGH>, /* P5, LS OE */
<&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
@ -134,72 +170,6 @@
};
&dra7_pmx_core {
i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
>;
};
i2c5_pins: pinmux_i2c5_pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
>;
};
i2c5_pins: pinmux_i2c5_pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
>;
};
nand_default: nand_default {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3400, PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */
DRA7XX_CORE_IOPAD(0x3404, PIN_INPUT | MUX_MODE0) /* gpmc_ad1 */
DRA7XX_CORE_IOPAD(0x3408, PIN_INPUT | MUX_MODE0) /* gpmc_ad2 */
DRA7XX_CORE_IOPAD(0x340c, PIN_INPUT | MUX_MODE0) /* gpmc_ad3 */
DRA7XX_CORE_IOPAD(0x3410, PIN_INPUT | MUX_MODE0) /* gpmc_ad4 */
DRA7XX_CORE_IOPAD(0x3414, PIN_INPUT | MUX_MODE0) /* gpmc_ad5 */
DRA7XX_CORE_IOPAD(0x3418, PIN_INPUT | MUX_MODE0) /* gpmc_ad6 */
DRA7XX_CORE_IOPAD(0x341c, PIN_INPUT | MUX_MODE0) /* gpmc_ad7 */
DRA7XX_CORE_IOPAD(0x3420, PIN_INPUT | MUX_MODE0) /* gpmc_ad8 */
DRA7XX_CORE_IOPAD(0x3424, PIN_INPUT | MUX_MODE0) /* gpmc_ad9 */
DRA7XX_CORE_IOPAD(0x3428, PIN_INPUT | MUX_MODE0) /* gpmc_ad10 */
DRA7XX_CORE_IOPAD(0x342c, PIN_INPUT | MUX_MODE0) /* gpmc_ad11 */
DRA7XX_CORE_IOPAD(0x3430, PIN_INPUT | MUX_MODE0) /* gpmc_ad12 */
DRA7XX_CORE_IOPAD(0x3434, PIN_INPUT | MUX_MODE0) /* gpmc_ad13 */
DRA7XX_CORE_IOPAD(0x3438, PIN_INPUT | MUX_MODE0) /* gpmc_ad14 */
DRA7XX_CORE_IOPAD(0x343c, PIN_INPUT | MUX_MODE0) /* gpmc_ad15 */
DRA7XX_CORE_IOPAD(0x34b4, PIN_OUTPUT | MUX_MODE0) /* gpmc_cs0 */
DRA7XX_CORE_IOPAD(0x34c4, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale */
DRA7XX_CORE_IOPAD(0x34cc, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen */
DRA7XX_CORE_IOPAD(0x34c8, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren */
DRA7XX_CORE_IOPAD(0x34d0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0 */
DRA7XX_CORE_IOPAD(0x34d8, PIN_INPUT | MUX_MODE0) /* gpmc_wait0 */
>;
};
usb1_pins: pinmux_usb1_pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
>;
};
usb2_pins: pinmux_usb2_pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3684, PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */
>;
};
tps65917_pins_default: tps65917_pins_default {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3824, PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
>;
};
mmc1_pins_default: mmc1_pins_default {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
@ -240,161 +210,12 @@
DRA7XX_CORE_IOPAD(0x3818, MUX_MODE15 | PULL_UP) /* wakeup0.off */
>;
};
hdmi_pins: pinmux_hdmi_pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
>;
};
tpd12s015_pins: pinmux_tpd12s015_pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
>;
};
atl_pins: pinmux_atl_pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT | MUX_MODE5) /* xref_clk1.atl_clk1 */
DRA7XX_CORE_IOPAD(0x369c, PIN_OUTPUT | MUX_MODE5) /* xref_clk2.atl_clk2 */
>;
};
mcasp3_pins: pinmux_mcasp3_pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3724, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx */
DRA7XX_CORE_IOPAD(0x3728, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx */
DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0 */
DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1 */
>;
};
mcasp3_sleep_pins: pinmux_mcasp3_sleep_pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE15)
DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE15)
DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT_PULLDOWN | MUX_MODE15)
DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE15)
>;
};
};
&i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
clock-frequency = <400000>;
tps65917: tps65917@58 {
compatible = "ti,tps65917";
reg = <0x58>;
pinctrl-names = "default";
pinctrl-0 = <&tps65917_pins_default>;
interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
interrupt-controller;
#interrupt-cells = <2>;
ti,system-power-controller;
tps65917_pmic {
compatible = "ti,tps65917-pmic";
tps65917_regulators: regulators {
smps1_reg: smps1 {
/* VDD_MPU */
regulator-name = "smps1";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1250000>;
regulator-always-on;
regulator-boot-on;
};
smps2_reg: smps2 {
/* VDD_CORE */
regulator-name = "smps2";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
regulator-always-on;
};
smps3_reg: smps3 {
/* VDD_GPU IVA DSPEVE */
regulator-name = "smps3";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1250000>;
regulator-boot-on;
regulator-always-on;
};
smps4_reg: smps4 {
/* VDDS1V8 */
regulator-name = "smps4";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
smps5_reg: smps5 {
/* VDD_DDR */
regulator-name = "smps5";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-boot-on;
regulator-always-on;
};
ldo1_reg: ldo1 {
/* LDO1_OUT --> SDIO */
regulator-name = "ldo1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
regulator-allow-bypass;
};
ldo3_reg: ldo3 {
/* VDDA_1V8_PHY */
regulator-name = "ldo3";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
ldo5_reg: ldo5 {
/* VDDA_1V8_PLL */
regulator-name = "ldo5";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
ldo4_reg: ldo4 {
/* VDDA_3V_USB: VDDA_USBHS33 */
regulator-name = "ldo4";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
};
};
tps65917_power_button {
compatible = "ti,palmas-pwrbutton";
interrupt-parent = <&tps65917>;
interrupts = <1 IRQ_TYPE_NONE>;
wakeup-source;
ti,palmas-long-press-seconds = <6>;
};
};
pcf_gpio_21: gpio@21 {
compatible = "ti,pcf8575", "nxp,pcf8575";
reg = <0x21>;
@ -423,8 +244,6 @@
&i2c5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c5_pins>;
clock-frequency = <400000>;
pcf_hdmi: pcf8575@26 {
@ -462,8 +281,6 @@
&gpmc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nand_default>;
ranges = <0 0 0x08000000 0x01000000>; /* minimum GPMC partition = 16MB */
nand@0,0 {
/* To use NAND, DIP switch SW5 must be set like so:
@ -548,14 +365,6 @@
};
};
&usb2_phy1 {
phy-supply = <&ldo4_reg>;
};
&usb2_phy2 {
phy-supply = <&ldo4_reg>;
};
&omap_dwc3_1 {
extcon = <&extcon_usb1>;
};
@ -566,14 +375,10 @@
&usb1 {
dr_mode = "peripheral";
pinctrl-names = "default";
pinctrl-0 = <&usb1_pins>;
};
&usb2 {
dr_mode = "host";
pinctrl-names = "default";
pinctrl-0 = <&usb2_pins>;
};
&mmc1 {
@ -581,7 +386,6 @@
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_default>;
vmmc-supply = <&evm_3v3_sd>;
vmmc_aux-supply = <&ldo1_reg>;
bus-width = <4>;
/*
* SDCD signal is not being used here - using the fact that GPIO mode
@ -603,71 +407,8 @@
max-frequency = <192000000>;
};
&dra7_pmx_core {
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 2 */
DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_txc */
DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */
DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */
DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */
DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */
DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */
DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */
DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */
DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 2 */
DRA7XX_CORE_IOPAD(0x3598, MUX_MODE15)
DRA7XX_CORE_IOPAD(0x359c, MUX_MODE15)
DRA7XX_CORE_IOPAD(0x35a0, MUX_MODE15)
DRA7XX_CORE_IOPAD(0x35a4, MUX_MODE15)
DRA7XX_CORE_IOPAD(0x35a8, MUX_MODE15)
DRA7XX_CORE_IOPAD(0x35ac, MUX_MODE15)
DRA7XX_CORE_IOPAD(0x35b0, MUX_MODE15)
DRA7XX_CORE_IOPAD(0x35b4, MUX_MODE15)
DRA7XX_CORE_IOPAD(0x35b8, MUX_MODE15)
DRA7XX_CORE_IOPAD(0x35bc, MUX_MODE15)
DRA7XX_CORE_IOPAD(0x35c0, MUX_MODE15)
DRA7XX_CORE_IOPAD(0x35c4, MUX_MODE15)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_d.mdio_d */
DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x363c, MUX_MODE15)
DRA7XX_CORE_IOPAD(0x3640, MUX_MODE15)
>;
};
};
&mac {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
};
&davinci_mdio {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
};
&dcan1 {
@ -741,16 +482,11 @@
&dss {
status = "ok";
vdda_video-supply = <&ldo5_reg>;
};
&hdmi {
status = "ok";
pinctrl-names = "default";
pinctrl-0 = <&hdmi_pins>;
port {
hdmi_out: endpoint {
remote-endpoint = <&tpd12s015_in>;
@ -759,9 +495,6 @@
};
&atl {
pinctrl-names = "default";
pinctrl-0 = <&atl_pins>;
assigned-clocks = <&abe_dpll_sys_clk_mux>,
<&atl_gfclk_mux>,
<&dpll_abe_ck>,
@ -780,9 +513,6 @@
&mcasp3 {
#sound-dai-cells = <0>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&mcasp3_pins>;
pinctrl-1 = <&mcasp3_sleep_pins>;
assigned-clocks = <&mcasp3_ahclkx_mux>;
assigned-clock-parents = <&atl_clkin2_ck>;

View File

@ -17,16 +17,21 @@
};
};
&tps65917_regulators {
ldo2_reg: ldo2 {
&i2c1 {
tps65917: tps65917@58 {
reg = <0x58>;
interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
};
};
#include "dra72-evm-tps65917.dtsi"
&ldo2_reg {
/* LDO2_OUT --> VDDA_1V8_PHY2 */
regulator-name = "ldo2";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
};
&hdmi {
vdda-supply = <&ldo2_reg>;

View File

@ -0,0 +1,134 @@
/*
* Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/*
* Integrated Power Management Chip
* http://www.ti.com/lit/ds/symlink/tps65917-q1.pdf
*/
&tps65917 {
compatible = "ti,tps65917";
interrupt-controller;
#interrupt-cells = <2>;
ti,system-power-controller;
tps65917_pmic {
compatible = "ti,tps65917-pmic";
smps1-in-supply = <&vsys_3v3>;
smps2-in-supply = <&vsys_3v3>;
smps3-in-supply = <&vsys_3v3>;
smps4-in-supply = <&vsys_3v3>;
smps5-in-supply = <&vsys_3v3>;
ldo1-in-supply = <&vsys_3v3>;
ldo2-in-supply = <&vsys_3v3>;
ldo3-in-supply = <&vsys_3v3>;
ldo4-in-supply = <&evm_5v0>;
ldo5-in-supply = <&vsys_3v3>;
tps65917_regulators: regulators {
smps1_reg: smps1 {
/* VDD_MPU */
regulator-name = "smps1";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1250000>;
regulator-always-on;
regulator-boot-on;
};
smps2_reg: smps2 {
/* VDD_CORE */
regulator-name = "smps2";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
regulator-always-on;
};
smps3_reg: smps3 {
/* VDD_GPU IVA DSPEVE */
regulator-name = "smps3";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1250000>;
regulator-boot-on;
regulator-always-on;
};
smps4_reg: smps4 {
/* VDDS1V8 */
regulator-name = "smps4";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
smps5_reg: smps5 {
/* VDD_DDR */
regulator-name = "smps5";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-boot-on;
regulator-always-on;
};
ldo1_reg: ldo1 {
/* LDO1_OUT --> SDIO */
regulator-name = "ldo1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
regulator-allow-bypass;
};
ldo2_reg: ldo2 {
regulator-name = "ldo2";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-allow-bypass;
};
ldo3_reg: ldo3 {
/* VDDA_1V8_PHY */
regulator-name = "ldo3";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
ldo5_reg: ldo5 {
/* VDDA_1V8_PLL */
regulator-name = "ldo5";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
ldo4_reg: ldo4 {
/* VDDA_3V_USB: VDDA_USBHS33 */
regulator-name = "ldo4";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
};
};
tps65917_power_button {
compatible = "ti,palmas-pwrbutton";
interrupt-parent = <&tps65917>;
interrupts = <1 IRQ_TYPE_NONE>;
wakeup-source;
ti,palmas-long-press-seconds = <6>;
};
};

View File

@ -15,16 +15,16 @@
};
};
&tps65917_regulators {
ldo2_reg: ldo2 {
/* LDO2_OUT --> TP1017 (UNUSED) */
regulator-name = "ldo2";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-allow-bypass;
&i2c1 {
tps65917: tps65917@58 {
reg = <0x58>;
interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
};
};
#include "dra72-evm-tps65917.dtsi"
&hdmi {
vdda-supply = <&ldo3_reg>;
};

View File

@ -0,0 +1,188 @@
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "omap443x.dtsi"
/ {
model = "Motorola Droid 4 XT894";
compatible = "motorola,droid4", "ti,omap4430", "ti,omap4";
chosen {
stdout-path = &uart3;
};
/*
* We seem to have only 1021 MB accessible, 1021 - 1022 is locked,
* then 1023 - 1024 seems to contain mbm. For SRAM, see the notes
* below about SRAM and L3_ICLK2 being unused by default,
*/
memory {
device_type = "memory";
reg = <0x80000000 0x3fd00000>; /* 1021 MB */
};
/* CPCAP really supports 1650000 to 3400000 range */
vmmc: regulator-mmc {
compatible = "regulator-fixed";
regulator-name = "vmmc";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
};
/* CPCAP really supports 3000000 to 3100000 range */
vemmc: regulator-emmc {
compatible = "regulator-fixed";
regulator-name = "vemmc";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
};
/* CPCAP really supports 1650000 to 1950000 range */
wl12xx_vmmc: regulator-wl12xx {
compatible = "regulator-fixed";
regulator-name = "vwl1271";
regulator-min-microvolt = <1650000>;
regulator-max-microvolt = <1650000>;
gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>; /* gpio94 */
startup-delay-us = <70000>;
enable-active-high;
};
};
/* L3_2 interconnect is unused, SRAM, GPMC and L3_ICLK2 disabled */
&gpmc {
status = "disabled";
};
&mmc1 {
vmmc-supply = <&vmmc>;
bus-width = <4>;
cd-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; /* gpio106 */
};
&mmc2 {
vmmc-supply = <&vemmc>;
bus-width = <8>;
non-removable;
};
&mmc3 {
vmmc-supply = <&wl12xx_vmmc>;
interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH
&omap4_pmx_core 0xde>;
non-removable;
bus-width = <4>;
cap-power-off-card;
#address-cells = <1>;
#size-cells = <0>;
wlcore: wlcore@2 {
compatible = "ti,wl1283";
reg = <2>;
interrupt-parent = <&gpio4>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; /* gpio100 */
ref-clock-frequency = <26000000>;
tcxo-clock-frequency = <26000000>;
};
};
/* L3_2 interconnect is unused, SRAM, GPMC and L3_ICLK2 disabled */
&ocmcram {
status = "disabled";
};
&omap4_pmx_core {
usb_gpio_mux_sel1: pinmux_usb_gpio_mux_sel1_pins {
/* gpio_60 */
pinctrl-single,pins = <
OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3)
>;
};
usb_ulpi_pins: pinmux_usb_ulpi_pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x196, MUX_MODE7)
OMAP4_IOPAD(0x198, MUX_MODE7)
OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE0)
>;
};
/* usb0_otg_dp and usb0_otg_dm */
usb_utmi_pins: pinmux_usb_utmi_pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x196, PIN_INPUT | MUX_MODE0)
OMAP4_IOPAD(0x198, PIN_INPUT | MUX_MODE0)
OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
>;
};
/* uart3_tx_irtx and uart3_rx_irrx */
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x196, MUX_MODE7)
OMAP4_IOPAD(0x198, MUX_MODE7)
OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1ba, MUX_MODE2)
OMAP4_IOPAD(0x1bc, PIN_INPUT | MUX_MODE2)
OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
>;
};
};
&omap4_pmx_wkup {
usb_gpio_mux_sel2: pinmux_usb_gpio_mux_sel2_pins {
/* gpio_wk0 */
pinctrl-single,pins = <
OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
>;
};
};
&uart3 {
interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
&omap4_pmx_core 0x17c>;
};
/* Internal UTMI+ PHY used for OTG, CPCAP ULPI PHY for detection and charger */
&usb_otg_hs {
interface-type = <1>;
mode = <3>;
power = <50>;
};

View File

@ -27,12 +27,98 @@
default-state = "off";
};
};
evm_keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&evm_keys_pins>;
#address-cells = <7>;
#size-cells = <0>;
btn1 {
label = "BTN1";
linux,code = <169>;
gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; /* gpio3_83 */
gpio-key,wakeup;
autorepeat;
debounce_interval = <50>;
};
};
evm_leds {
compatible = "gpio-leds";
led1 {
label = "omap5:red:led";
gpios = <&gpio9 17 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
};
led2 {
label = "omap5:green:led";
gpios = <&gpio9 18 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc1";
default-state = "off";
};
led3 {
label = "omap5:blue:led";
gpios = <&gpio9 19 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc2";
default-state = "off";
};
led4 {
label = "omap5:green:led1";
gpios = <&gpio9 2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
led5 {
label = "omap5:green:led2";
gpios = <&gpio9 3 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
default-state = "off";
};
led6 {
label = "omap5:green:led3";
gpios = <&gpio9 4 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
led7 {
label = "omap5:green:led4";
gpios = <&gpio9 5 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
default-state = "off";
};
led8 {
label = "omap5:green:led5";
gpios = <&gpio9 6 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
};
};
&hdmi {
vdda-supply = <&ldo4_reg>;
};
&i2c1 {
eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
};
};
&i2c5 {
pinctrl-names = "default";
pinctrl-0 = <&i2c5_pins>;
@ -48,6 +134,12 @@
};
&omap5_pmx_core {
evm_keys_pins: pinmux_evm_keys_gpio_pins {
pinctrl-single,pins = <
OMAP5_IOPAD(0x0b6, PIN_INPUT | MUX_MODE6) /* gpio3_83 */
>;
};
i2c5_pins: pinmux_i2c5_pins {
pinctrl-single,pins = <
OMAP5_IOPAD(0x1c6, PIN_INPUT | MUX_MODE0) /* i2c5_scl */

View File

@ -13,6 +13,18 @@
&tps {
compatible = "ti,tps65217";
interrupt-controller;
#interrupt-cells = <1>;
charger {
compatible = "ti,tps65217-charger";
status = "disabled";
};
pwrbutton {
compatible = "ti,tps65217-pwrbutton";
status = "disabled";
};
regulators {
#address-cells = <1>;

View File

@ -0,0 +1,26 @@
/*
* This header provides macros for TI TPS65217 DT bindings.
*
* Copyright (C) 2016 Texas Instruments
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License along with
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __DT_BINDINGS_TPS65217_H__
#define __DT_BINDINGS_TPS65217_H__
#define TPS65217_IRQ_USB 0
#define TPS65217_IRQ_AC 1
#define TPS65217_IRQ_PB 2
#endif