forked from Minki/linux
drm/amdgpu: Rename set_mmhub_powergating_by_smu to powergate_mmhub
In order to keep consistent with powergate_uvd/vce. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -359,8 +359,8 @@ enum amdgpu_pcie_gen {
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((adev)->powerplay.pp_funcs->odn_edit_dpm_table(\
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(adev)->powerplay.pp_handle, type, parameter, size))
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#define amdgpu_dpm_set_mmhub_powergating_by_smu(adev) \
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((adev)->powerplay.pp_funcs->set_mmhub_powergating_by_smu( \
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#define amdgpu_dpm_powergate_mmhub(adev) \
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((adev)->powerplay.pp_funcs->powergate_mmhub( \
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(adev)->powerplay.pp_handle))
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struct amdgpu_dpm {
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@ -471,8 +471,8 @@ void mmhub_v1_0_update_power_gating(struct amdgpu_device *adev,
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RENG_EXECUTE_ON_REG_UPDATE, 1);
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WREG32_SOC15(MMHUB, 0, mmPCTL1_RENG_EXECUTE, pctl1_reng_execute);
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if (adev->powerplay.pp_funcs->set_mmhub_powergating_by_smu)
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amdgpu_dpm_set_mmhub_powergating_by_smu(adev);
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if (adev->powerplay.pp_funcs->powergate_mmhub)
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amdgpu_dpm_powergate_mmhub(adev);
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} else {
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pctl0_reng_execute = REG_SET_FIELD(pctl0_reng_execute,
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@ -269,7 +269,7 @@ struct amd_pm_funcs {
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int (*get_power_profile_mode)(void *handle, char *buf);
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int (*set_power_profile_mode)(void *handle, long *input, uint32_t size);
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int (*odn_edit_dpm_table)(void *handle, uint32_t type, long *input, uint32_t size);
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int (*set_mmhub_powergating_by_smu)(void *handle);
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int (*powergate_mmhub)(void *handle);
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};
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#endif
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@ -1168,19 +1168,19 @@ static int pp_get_display_mode_validation_clocks(void *handle,
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return ret;
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}
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static int pp_set_mmhub_powergating_by_smu(void *handle)
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static int pp_dpm_powergate_mmhub(void *handle)
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{
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struct pp_hwmgr *hwmgr = handle;
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if (!hwmgr || !hwmgr->pm_en)
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return -EINVAL;
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if (hwmgr->hwmgr_func->set_mmhub_powergating_by_smu == NULL) {
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if (hwmgr->hwmgr_func->powergate_mmhub == NULL) {
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pr_info("%s was not implemented.\n", __func__);
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return 0;
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}
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return hwmgr->hwmgr_func->set_mmhub_powergating_by_smu(hwmgr);
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return hwmgr->hwmgr_func->powergate_mmhub(hwmgr);
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}
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static const struct amd_pm_funcs pp_dpm_funcs = {
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@ -1227,5 +1227,5 @@ static const struct amd_pm_funcs pp_dpm_funcs = {
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.set_watermarks_for_clocks_ranges = pp_set_watermarks_for_clocks_ranges,
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.display_clock_voltage_request = pp_display_clock_voltage_request,
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.get_display_mode_validation_clocks = pp_get_display_mode_validation_clocks,
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.set_mmhub_powergating_by_smu = pp_set_mmhub_powergating_by_smu,
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.powergate_mmhub = pp_dpm_powergate_mmhub,
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};
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@ -1126,7 +1126,7 @@ static int smu10_smus_notify_pwe(struct pp_hwmgr *hwmgr)
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return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SetRccPfcPmeRestoreRegister);
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}
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static int smu10_set_mmhub_powergating_by_smu(struct pp_hwmgr *hwmgr)
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static int smu10_powergate_mmhub(struct pp_hwmgr *hwmgr)
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{
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return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PowerGateMmHub);
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}
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@ -1182,7 +1182,7 @@ static const struct pp_hwmgr_func smu10_hwmgr_funcs = {
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.asic_setup = smu10_setup_asic_task,
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.power_state_set = smu10_set_power_state_tasks,
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.dynamic_state_management_disable = smu10_disable_dpm_tasks,
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.set_mmhub_powergating_by_smu = smu10_set_mmhub_powergating_by_smu,
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.powergate_mmhub = smu10_powergate_mmhub,
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.smus_notify_pwe = smu10_smus_notify_pwe,
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.gfx_off_control = smu10_gfx_off_control,
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.display_clock_voltage_request = smu10_display_clock_voltage_request,
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@ -327,7 +327,7 @@ struct pp_hwmgr_func {
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enum PP_OD_DPM_TABLE_COMMAND type,
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long *input, uint32_t size);
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int (*set_power_limit)(struct pp_hwmgr *hwmgr, uint32_t n);
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int (*set_mmhub_powergating_by_smu)(struct pp_hwmgr *hwmgr);
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int (*powergate_mmhub)(struct pp_hwmgr *hwmgr);
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int (*smus_notify_pwe)(struct pp_hwmgr *hwmgr);
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};
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