forked from Minki/linux
sis5513: remove /proc/ide/sis
This belongs to user-space (and only if really needed). text data bss dec hex filename 7129 404 8 7541 1d75 drivers/ide/pci/sis5513.o.before 3916 404 1 4321 10e1 drivers/ide/pci/sis5513.o.after Additionaly to being bloat the code contained two bugs: - wrong cable bit was checked (0x0001 instead of 0x8000) on ATA_133 chipsets - incorrect UDMA cycle time was reported on ATA_100a/ATA_133 chipsets Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
This commit is contained in:
Bartlomiej Zolnierkiewicz
parent
8c0697cc2c
commit
a718122ce8
@ -1,5 +1,5 @@
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/*
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* linux/drivers/ide/pci/sis5513.c Version 0.30 Aug 9, 2007
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* linux/drivers/ide/pci/sis5513.c Version 0.31 Aug 9, 2007
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*
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* Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
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* Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer
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@ -65,8 +65,6 @@
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#include "ide-timing.h"
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#define DISPLAY_SIS_TIMINGS
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/* registers layout and init values are chipset family dependant */
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#define ATA_16 0x01
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@ -193,243 +191,6 @@ static char* chipset_capability[] = {
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"ATA 133 (1st gen)", "ATA 133 (2nd gen)"
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};
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#if defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_IDE_PROC_FS)
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#include <linux/stat.h>
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#include <linux/proc_fs.h>
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static u8 sis_proc = 0;
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static struct pci_dev *bmide_dev;
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static char* cable_type[] = {
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"80 pins",
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"40 pins"
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};
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static char* recovery_time[] ={
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"12 PCICLK", "1 PCICLK",
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"2 PCICLK", "3 PCICLK",
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"4 PCICLK", "5 PCICLCK",
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"6 PCICLK", "7 PCICLCK",
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"8 PCICLK", "9 PCICLCK",
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"10 PCICLK", "11 PCICLK",
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"13 PCICLK", "14 PCICLK",
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"15 PCICLK", "15 PCICLK"
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};
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static char* active_time[] = {
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"8 PCICLK", "1 PCICLCK",
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"2 PCICLK", "3 PCICLK",
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"4 PCICLK", "5 PCICLK",
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"6 PCICLK", "12 PCICLK"
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};
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static char* cycle_time[] = {
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"Reserved", "2 CLK",
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"3 CLK", "4 CLK",
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"5 CLK", "6 CLK",
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"7 CLK", "8 CLK",
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"9 CLK", "10 CLK",
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"11 CLK", "12 CLK",
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"13 CLK", "14 CLK",
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"15 CLK", "16 CLK"
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};
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/* Generic add master or slave info function */
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static char* get_drives_info (char *buffer, u8 pos)
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{
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u8 reg00, reg01, reg10, reg11; /* timing registers */
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u32 regdw0, regdw1;
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char* p = buffer;
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/* Postwrite/Prefetch */
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if (chipset_family < ATA_133) {
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pci_read_config_byte(bmide_dev, 0x4b, ®00);
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p += sprintf(p, "Drive %d: Postwrite %s \t \t Postwrite %s\n",
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pos, (reg00 & (0x10 << pos)) ? "Enabled" : "Disabled",
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(reg00 & (0x40 << pos)) ? "Enabled" : "Disabled");
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p += sprintf(p, " Prefetch %s \t \t Prefetch %s\n",
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(reg00 & (0x01 << pos)) ? "Enabled" : "Disabled",
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(reg00 & (0x04 << pos)) ? "Enabled" : "Disabled");
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pci_read_config_byte(bmide_dev, 0x40+2*pos, ®00);
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pci_read_config_byte(bmide_dev, 0x41+2*pos, ®01);
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pci_read_config_byte(bmide_dev, 0x44+2*pos, ®10);
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pci_read_config_byte(bmide_dev, 0x45+2*pos, ®11);
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} else {
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u32 reg54h;
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u8 drive_pci = 0x40;
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pci_read_config_dword(bmide_dev, 0x54, ®54h);
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if (reg54h & 0x40000000) {
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// Configuration space remapped to 0x70
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drive_pci = 0x70;
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}
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pci_read_config_dword(bmide_dev, (unsigned long)drive_pci+4*pos, ®dw0);
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pci_read_config_dword(bmide_dev, (unsigned long)drive_pci+4*pos+8, ®dw1);
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p += sprintf(p, "Drive %d:\n", pos);
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}
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/* UDMA */
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if (chipset_family >= ATA_133) {
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p += sprintf(p, " UDMA %s \t \t \t UDMA %s\n",
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(regdw0 & 0x04) ? "Enabled" : "Disabled",
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(regdw1 & 0x04) ? "Enabled" : "Disabled");
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p += sprintf(p, " UDMA Cycle Time %s \t UDMA Cycle Time %s\n",
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cycle_time[(regdw0 & 0xF0) >> 4],
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cycle_time[(regdw1 & 0xF0) >> 4]);
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} else if (chipset_family >= ATA_33) {
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p += sprintf(p, " UDMA %s \t \t \t UDMA %s\n",
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(reg01 & 0x80) ? "Enabled" : "Disabled",
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(reg11 & 0x80) ? "Enabled" : "Disabled");
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p += sprintf(p, " UDMA Cycle Time ");
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switch(chipset_family) {
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case ATA_33: p += sprintf(p, cycle_time[(reg01 & 0x60) >> 5]); break;
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case ATA_66:
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case ATA_100a: p += sprintf(p, cycle_time[(reg01 & 0x70) >> 4]); break;
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case ATA_100:
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case ATA_133a: p += sprintf(p, cycle_time[reg01 & 0x0F]); break;
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default: p += sprintf(p, "?"); break;
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}
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p += sprintf(p, " \t UDMA Cycle Time ");
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switch(chipset_family) {
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case ATA_33: p += sprintf(p, cycle_time[(reg11 & 0x60) >> 5]); break;
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case ATA_66:
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case ATA_100a: p += sprintf(p, cycle_time[(reg11 & 0x70) >> 4]); break;
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case ATA_100:
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case ATA_133a: p += sprintf(p, cycle_time[reg11 & 0x0F]); break;
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default: p += sprintf(p, "?"); break;
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}
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p += sprintf(p, "\n");
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}
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if (chipset_family < ATA_133) { /* else case TODO */
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/* Data Active */
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p += sprintf(p, " Data Active Time ");
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switch(chipset_family) {
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case ATA_16: /* confirmed */
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case ATA_33:
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case ATA_66:
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case ATA_100a: p += sprintf(p, active_time[reg01 & 0x07]); break;
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case ATA_100:
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case ATA_133a: p += sprintf(p, active_time[(reg00 & 0x70) >> 4]); break;
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default: p += sprintf(p, "?"); break;
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}
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p += sprintf(p, " \t Data Active Time ");
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switch(chipset_family) {
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case ATA_16:
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case ATA_33:
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case ATA_66:
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case ATA_100a: p += sprintf(p, active_time[reg11 & 0x07]); break;
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case ATA_100:
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case ATA_133a: p += sprintf(p, active_time[(reg10 & 0x70) >> 4]); break;
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default: p += sprintf(p, "?"); break;
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}
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p += sprintf(p, "\n");
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/* Data Recovery */
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/* warning: may need (reg&0x07) for pre ATA66 chips */
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p += sprintf(p, " Data Recovery Time %s \t Data Recovery Time %s\n",
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recovery_time[reg00 & 0x0f], recovery_time[reg10 & 0x0f]);
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}
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return p;
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}
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static char* get_masters_info(char* buffer)
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{
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return get_drives_info(buffer, 0);
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}
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static char* get_slaves_info(char* buffer)
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{
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return get_drives_info(buffer, 1);
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}
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/* Main get_info, called on /proc/ide/sis reads */
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static int sis_get_info (char *buffer, char **addr, off_t offset, int count)
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{
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char *p = buffer;
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int len;
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u8 reg;
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u16 reg2, reg3;
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p += sprintf(p, "\nSiS 5513 ");
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switch(chipset_family) {
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case ATA_16: p += sprintf(p, "DMA 16"); break;
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case ATA_33: p += sprintf(p, "Ultra 33"); break;
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case ATA_66: p += sprintf(p, "Ultra 66"); break;
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case ATA_100a:
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case ATA_100: p += sprintf(p, "Ultra 100"); break;
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case ATA_133a:
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case ATA_133: p += sprintf(p, "Ultra 133"); break;
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default: p+= sprintf(p, "Unknown???"); break;
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}
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p += sprintf(p, " chipset\n");
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p += sprintf(p, "--------------- Primary Channel "
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"---------------- Secondary Channel "
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"-------------\n");
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/* Status */
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pci_read_config_byte(bmide_dev, 0x4a, ®);
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if (chipset_family == ATA_133) {
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pci_read_config_word(bmide_dev, 0x50, ®2);
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pci_read_config_word(bmide_dev, 0x52, ®3);
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}
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p += sprintf(p, "Channel Status: ");
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if (chipset_family < ATA_66) {
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p += sprintf(p, "%s \t \t \t \t %s\n",
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(reg & 0x04) ? "On" : "Off",
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(reg & 0x02) ? "On" : "Off");
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} else if (chipset_family < ATA_133) {
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p += sprintf(p, "%s \t \t \t \t %s \n",
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(reg & 0x02) ? "On" : "Off",
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(reg & 0x04) ? "On" : "Off");
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} else { /* ATA_133 */
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p += sprintf(p, "%s \t \t \t \t %s \n",
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(reg2 & 0x02) ? "On" : "Off",
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(reg3 & 0x02) ? "On" : "Off");
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}
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/* Operation Mode */
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pci_read_config_byte(bmide_dev, 0x09, ®);
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p += sprintf(p, "Operation Mode: %s \t \t \t %s \n",
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(reg & 0x01) ? "Native" : "Compatible",
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(reg & 0x04) ? "Native" : "Compatible");
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/* 80-pin cable ? */
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if (chipset_family >= ATA_133) {
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p += sprintf(p, "Cable Type: %s \t \t \t %s\n",
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(reg2 & 0x01) ? cable_type[1] : cable_type[0],
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(reg3 & 0x01) ? cable_type[1] : cable_type[0]);
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} else if (chipset_family > ATA_33) {
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pci_read_config_byte(bmide_dev, 0x48, ®);
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p += sprintf(p, "Cable Type: %s \t \t \t %s\n",
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(reg & 0x10) ? cable_type[1] : cable_type[0],
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(reg & 0x20) ? cable_type[1] : cable_type[0]);
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}
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/* Prefetch Count */
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if (chipset_family < ATA_133) {
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pci_read_config_word(bmide_dev, 0x4c, ®2);
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pci_read_config_word(bmide_dev, 0x4e, ®3);
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p += sprintf(p, "Prefetch Count: %d \t \t \t \t %d\n",
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reg2, reg3);
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}
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p = get_masters_info(p);
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p = get_slaves_info(p);
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len = (p - buffer) - offset;
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*addr = buffer + offset;
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return len > count ? count : len;
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}
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#endif /* defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_IDE_PROC_FS) */
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/*
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* Configuration functions
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*/
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@ -751,14 +512,6 @@ static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const c
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}
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break;
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}
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#if defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_IDE_PROC_FS)
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if (!sis_proc) {
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sis_proc = 1;
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bmide_dev = dev;
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ide_pci_create_host_proc("sis", sis_get_info);
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}
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#endif
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}
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return 0;
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