dmaengine: sun6i: support V3s SoC variant
Allwinner V3s has a DMA engine similar to the ones from A31, but with fewer channels and DRQs. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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				| @ -9,6 +9,7 @@ Required properties: | ||||
| 		  "allwinner,sun8i-a23-dma" | ||||
| 		  "allwinner,sun8i-a83t-dma" | ||||
| 		  "allwinner,sun8i-h3-dma" | ||||
| 		  "allwinner,sun8i-v3s-dma" | ||||
| - reg:		Should contain the registers base address and length | ||||
| - interrupts:	Should contain a reference to the interrupt used by this device | ||||
| - clocks:	Should contain a reference to the parent AHB clock | ||||
|  | ||||
| @ -1040,11 +1040,24 @@ static struct sun6i_dma_config sun8i_h3_dma_cfg = { | ||||
| 	.nr_max_vchans   = 34, | ||||
| }; | ||||
| 
 | ||||
| /*
 | ||||
|  * The V3s have only 8 physical channels, a maximum DRQ port id of 23, | ||||
|  * and a total of 24 usable source and destination endpoints. | ||||
|  */ | ||||
| 
 | ||||
| static struct sun6i_dma_config sun8i_v3s_dma_cfg = { | ||||
| 	.nr_max_channels = 8, | ||||
| 	.nr_max_requests = 23, | ||||
| 	.nr_max_vchans   = 24, | ||||
| 	.gate_needed	 = true, | ||||
| }; | ||||
| 
 | ||||
| static const struct of_device_id sun6i_dma_match[] = { | ||||
| 	{ .compatible = "allwinner,sun6i-a31-dma", .data = &sun6i_a31_dma_cfg }, | ||||
| 	{ .compatible = "allwinner,sun8i-a23-dma", .data = &sun8i_a23_dma_cfg }, | ||||
| 	{ .compatible = "allwinner,sun8i-a83t-dma", .data = &sun8i_a83t_dma_cfg }, | ||||
| 	{ .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg }, | ||||
| 	{ .compatible = "allwinner,sun8i-v3s-dma", .data = &sun8i_v3s_dma_cfg }, | ||||
| 	{ /* sentinel */ } | ||||
| }; | ||||
| MODULE_DEVICE_TABLE(of, sun6i_dma_match); | ||||
|  | ||||
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