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drm/i915/fbc: Introduce intel_fbc_set_false_color()

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Pull the direct FBC register frobbing out from the debugfs code
into the fbc code. Also add a vfunc for this so we don't need
extra platforms checks.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211104144520.22605-11-ville.syrjala@linux.intel.com
Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
This commit is contained in:
Ville Syrjälä 2021-11-04 16:45:13 +02:00
parent 8f8c610387
commit a61cf3883c
3 changed files with 30 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
drivers/gpu/drm/i915/display/intel_display_debugfs.c
View File

@ -70,9 +70,6 @@ static int i915_fbc_false_color_get(void *data, u64 *val)
{
struct drm_i915_private *dev_priv = data;
if (DISPLAY_VER(dev_priv) < 7 || !HAS_FBC(dev_priv))
return -ENODEV;
*val = dev_priv->fbc.false_color;
return 0;
@ -81,21 +78,8 @@ static int i915_fbc_false_color_get(void *data, u64 *val)
static int i915_fbc_false_color_set(void *data, u64 val)
{
struct drm_i915_private *dev_priv = data;
u32 reg;
if (DISPLAY_VER(dev_priv) < 7 || !HAS_FBC(dev_priv))
return -ENODEV;
mutex_lock(&dev_priv->fbc.lock);
reg = intel_de_read(dev_priv, ILK_DPFC_CONTROL);
dev_priv->fbc.false_color = val;
intel_de_write(dev_priv, ILK_DPFC_CONTROL,
val ? (reg | FBC_CTL_FALSE_COLOR) : (reg & ~FBC_CTL_FALSE_COLOR));
mutex_unlock(&dev_priv->fbc.lock);
return 0;
return intel_fbc_set_false_color(dev_priv, val);
}
DEFINE_SIMPLE_ATTRIBUTE(i915_fbc_false_color_fops,

27
drivers/gpu/drm/i915/display/intel_fbc.c
View File

@ -55,6 +55,7 @@ struct intel_fbc_funcs {
bool (*is_compressing)(struct drm_i915_private *i915);
void (*nuke)(struct drm_i915_private *i915);
void (*program_cfb)(struct drm_i915_private *i915);
void (*set_false_color)(struct drm_i915_private *i915, bool enable);
};
/*
@ -538,6 +539,13 @@ static bool ivb_fbc_is_compressing(struct drm_i915_private *i915)
return intel_de_read(i915, IVB_FBC_STATUS2) & IVB_FBC_COMP_SEG_MASK;
}
static void ivb_fbc_set_false_color(struct drm_i915_private *i915,
bool enable)
{
intel_de_rmw(i915, ILK_DPFC_CONTROL,
FBC_CTL_FALSE_COLOR, enable ? FBC_CTL_FALSE_COLOR : 0);
}
static const struct intel_fbc_funcs ivb_fbc_funcs = {
.activate = ivb_fbc_activate,
.deactivate = ilk_fbc_deactivate,
@ -545,6 +553,7 @@ static const struct intel_fbc_funcs ivb_fbc_funcs = {
.is_compressing = ivb_fbc_is_compressing,
.nuke = snb_fbc_nuke,
.program_cfb = ilk_fbc_program_cfb,
.set_false_color = ivb_fbc_set_false_color,
};
static bool intel_fbc_hw_is_active(struct drm_i915_private *dev_priv)
@ -593,6 +602,24 @@ static void intel_fbc_nuke(struct drm_i915_private *i915)
fbc->funcs->nuke(i915);
}
int intel_fbc_set_false_color(struct drm_i915_private *i915, bool enable)
{
struct intel_fbc *fbc = &i915->fbc;
if (!fbc->funcs || !fbc->funcs->set_false_color)
return -ENODEV;
mutex_lock(&fbc->lock);
fbc->false_color = enable;
fbc->funcs->set_false_color(i915, enable);
mutex_unlock(&fbc->lock);
return 0;
}
/**
* intel_fbc_is_active - Is FBC active?
* @dev_priv: i915 device instance

2
drivers/gpu/drm/i915/display/intel_fbc.h
View File

@ -37,5 +37,7 @@ void intel_fbc_flush(struct drm_i915_private *dev_priv,
void intel_fbc_cleanup_cfb(struct drm_i915_private *dev_priv);
void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *dev_priv);
int intel_fbc_reset_underrun(struct drm_i915_private *dev_priv);
int intel_fbc_set_false_color(struct drm_i915_private *i915,
bool enable);
#endif /* __INTEL_FBC_H__ */