MIPS: Send SIGILL for R6 branches in `__compute_return_epc_for_insn'

Fix:

* commit 8467ca0122 ("MIPS: Emulate the new MIPS R6 branch compact
(BC) instruction"),

* commit 84fef63012 ("MIPS: Emulate the new MIPS R6 BALC
instruction"),

* commit 69b9a2fd05 ("MIPS: Emulate the new MIPS R6 BEQZC and JIC
instructions"),

* commit 28d6f93d20 ("MIPS: Emulate the new MIPS R6 BNEZC and JIALC
instructions"),

* commit c893ce38b2 ("MIPS: Emulate the new MIPS R6 BOVC, BEQC and
BEQZALC instructions")

and send SIGILL rather than returning -SIGILL for R6 branch and jump
instructions.  Returning -SIGILL is never correct as the API defines
this function's result upon error to be -EFAULT and a signal actually
issued.

Fixes: 8467ca0122 ("MIPS: Emulate the new MIPS R6 branch compact (BC) instruction")
Fixes: 84fef63012 ("MIPS: Emulate the new MIPS R6 BALC instruction")
Fixes: 69b9a2fd05 ("MIPS: Emulate the new MIPS R6 BEQZC and JIC instructions")
Fixes: 28d6f93d20 ("MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructions")
Fixes: c893ce38b2 ("MIPS: Emulate the new MIPS R6 BOVC, BEQC and BEQZALC instructions")
Signed-off-by: Maciej W. Rozycki <macro@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org # 3.19+
Patchwork: https://patchwork.linux-mips.org/patch/16399/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Maciej W. Rozycki 2017-06-16 00:14:12 +01:00 committed by Ralf Baechle
parent fef40be6da
commit a60b1a5bf8

View File

@ -771,35 +771,27 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
#else #else
case bc6_op: case bc6_op:
/* Only valid for MIPS R6 */ /* Only valid for MIPS R6 */
if (!cpu_has_mips_r6) { if (!cpu_has_mips_r6)
ret = -SIGILL; goto sigill_r6;
break;
}
regs->cp0_epc += 8; regs->cp0_epc += 8;
break; break;
case balc6_op: case balc6_op:
if (!cpu_has_mips_r6) { if (!cpu_has_mips_r6)
ret = -SIGILL; goto sigill_r6;
break;
}
/* Compact branch: BALC */ /* Compact branch: BALC */
regs->regs[31] = epc + 4; regs->regs[31] = epc + 4;
epc += 4 + (insn.i_format.simmediate << 2); epc += 4 + (insn.i_format.simmediate << 2);
regs->cp0_epc = epc; regs->cp0_epc = epc;
break; break;
case pop66_op: case pop66_op:
if (!cpu_has_mips_r6) { if (!cpu_has_mips_r6)
ret = -SIGILL; goto sigill_r6;
break;
}
/* Compact branch: BEQZC || JIC */ /* Compact branch: BEQZC || JIC */
regs->cp0_epc += 8; regs->cp0_epc += 8;
break; break;
case pop76_op: case pop76_op:
if (!cpu_has_mips_r6) { if (!cpu_has_mips_r6)
ret = -SIGILL; goto sigill_r6;
break;
}
/* Compact branch: BNEZC || JIALC */ /* Compact branch: BNEZC || JIALC */
if (!insn.i_format.rs) { if (!insn.i_format.rs) {
/* JIALC: set $31/ra */ /* JIALC: set $31/ra */
@ -811,10 +803,8 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
case pop10_op: case pop10_op:
case pop30_op: case pop30_op:
/* Only valid for MIPS R6 */ /* Only valid for MIPS R6 */
if (!cpu_has_mips_r6) { if (!cpu_has_mips_r6)
ret = -SIGILL; goto sigill_r6;
break;
}
/* /*
* Compact branches: * Compact branches:
* bovc, beqc, beqzalc, bnvc, bnec, bnezlac * bovc, beqc, beqzalc, bnvc, bnec, bnezlac
@ -837,6 +827,11 @@ sigill_r2r6:
current->comm); current->comm);
force_sig(SIGILL, current); force_sig(SIGILL, current);
return -EFAULT; return -EFAULT;
sigill_r6:
pr_info("%s: R6 branch but no MIPSr6 ISA support - sending SIGILL.\n",
current->comm);
force_sig(SIGILL, current);
return -EFAULT;
} }
EXPORT_SYMBOL_GPL(__compute_return_epc_for_insn); EXPORT_SYMBOL_GPL(__compute_return_epc_for_insn);