ARM64: dts: meson-axg: add saradc support

Add the DT info for SAR ADC of the Amlogic's Meson-AXG SoC.

Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This commit is contained in:
Xingyu Chen 2018-07-02 22:25:15 +00:00 committed by Kevin Hilman
parent fd47716479
commit a51b74ea78
2 changed files with 26 additions and 0 deletions

View File

@ -215,3 +215,8 @@
compatible = "brcm,bcm4329-fmac";
};
};
&saradc {
status = "okay";
vref-supply = <&vddio_ao18>;
};

View File

@ -91,6 +91,13 @@
method = "smc";
};
vddio_ao18: regulator-vddio_ao18 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13
@ -1236,6 +1243,20 @@
interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
};
saradc: adc@9000 {
compatible = "amlogic,meson-axg-saradc",
"amlogic,meson-saradc";
reg = <0x0 0x9000 0x0 0x38>;
#io-channel-cells = <1>;
interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>,
<&clkc_AO CLKID_AO_SAR_ADC>,
<&clkc_AO CLKID_AO_SAR_ADC_CLK>,
<&clkc_AO CLKID_AO_SAR_ADC_SEL>;
clock-names = "clkin", "core", "adc_clk", "adc_sel";
status = "disabled";
};
};
};
};