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arm64: remove processor_id

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The global processor_id is assigned the MIDR_EL1 value of the boot
CPU in the early init code, but is never referenced afterwards.

As the relevance of the MIDR_EL1 value of the boot CPU is debatable
anyway, especially under big.LITTLE, let's remove it before anyone
starts using it.

Tested-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
This commit is contained in:
Ard Biesheuvel 2015-03-04 11:49:32 +01:00 committed by Will Deacon
parent b784a5d97d
commit a44ef51799
2 changed files with 1 additions and 9 deletions
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7
arch/arm64/kernel/head.S
View File

@ -244,7 +244,6 @@ ENTRY(stext)
bl el2_setup // Drop to EL1, w20=cpu_boot_mode bl el2_setup // Drop to EL1, w20=cpu_boot_mode
bl __calc_phys_offset // x24=PHYS_OFFSET, x28=PHYS_OFFSET-PAGE_OFFSET bl __calc_phys_offset // x24=PHYS_OFFSET, x28=PHYS_OFFSET-PAGE_OFFSET
bl set_cpu_boot_mode_flag bl set_cpu_boot_mode_flag
mrs x22, midr_el1 // x22=cpuid
bl __vet_fdt bl __vet_fdt
bl __create_page_tables // x25=TTBR0, x26=TTBR1 bl __create_page_tables // x25=TTBR0, x26=TTBR1
@ -427,7 +426,6 @@ __switch_data:
.quad __mmap_switched .quad __mmap_switched
.quad __bss_start // x6 .quad __bss_start // x6
.quad __bss_stop // x7 .quad __bss_stop // x7
.quad processor_id // x4
.quad __fdt_pointer // x5 .quad __fdt_pointer // x5
.quad memstart_addr // x6 .quad memstart_addr // x6
.quad init_thread_union + THREAD_START_SP // sp .quad init_thread_union + THREAD_START_SP // sp
@ -445,11 +443,10 @@ __mmap_switched:
str xzr, [x6], #8 // Clear BSS str xzr, [x6], #8 // Clear BSS
b 1b b 1b
2: 2:
ldp x4, x5, [x3], #16 ldr x5, [x3], #8
ldr x6, [x3], #8 ldr x6, [x3], #8
ldr x16, [x3] ldr x16, [x3]
mov sp, x16 mov sp, x16
str x22, [x4] // Save processor ID
str x21, [x5] // Save FDT pointer str x21, [x5] // Save FDT pointer
str x24, [x6] // Save PHYS_OFFSET str x24, [x6] // Save PHYS_OFFSET
mov x29, #0 mov x29, #0
@ -621,8 +618,6 @@ ENTRY(secondary_startup)
/* /*
* Common entry point for secondary CPUs. * Common entry point for secondary CPUs.
*/ */
mrs x22, midr_el1 // x22=cpuid
pgtbl x25, x26, x28 // x25=TTBR0, x26=TTBR1 pgtbl x25, x26, x28 // x25=TTBR0, x26=TTBR1
bl __cpu_setup // initialise processor bl __cpu_setup // initialise processor

3
arch/arm64/kernel/setup.c
View File

@ -63,9 +63,6 @@
#include <asm/efi.h> #include <asm/efi.h>
#include <asm/virt.h> #include <asm/virt.h>
unsigned int processor_id;
EXPORT_SYMBOL(processor_id);
unsigned long elf_hwcap __read_mostly; unsigned long elf_hwcap __read_mostly;
EXPORT_SYMBOL_GPL(elf_hwcap); EXPORT_SYMBOL_GPL(elf_hwcap);