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powerpc/64s/exception: Add ISIDE option

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Rather than using DAR=2 to select the i-side registers, add an
explicit option.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200225173541.1549955-10-npiggin@gmail.com
This commit is contained in:
Nicholas Piggin 2020-02-26 03:35:18 +10:00 committed by Michael Ellerman
parent b177ae2f8c
commit a3cd35be6e
1 changed files with 16 additions and 7 deletions
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23
arch/powerpc/kernel/exceptions-64s.S
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@ -199,6 +199,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
#define IVEC .L_IVEC_\name\()
#define IHSRR .L_IHSRR_\name\()
#define IAREA .L_IAREA_\name\()
#define IISIDE .L_IISIDE_\name\()
#define IDAR .L_IDAR_\name\()
#define IDSISR .L_IDSISR_\name\()
#define ISET_RI .L_ISET_RI_\name\()
@ -231,6 +232,9 @@ do_define_int n
.ifndef IAREA
IAREA=PACA_EXGEN
.endif
.ifndef IISIDE
IISIDE=0
.endif
.ifndef IDAR
IDAR=0
.endif
@ -542,7 +546,7 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
*/
GET_SCRATCH0(r10)
std r10,IAREA+EX_R13(r13)
.if IDAR == 1
.if IDAR && !IISIDE
.if IHSRR
mfspr r10,SPRN_HDAR
.else
@ -550,7 +554,7 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
.endif
std r10,IAREA+EX_DAR(r13)
.endif
.if IDSISR == 1
.if IDSISR && !IISIDE
.if IHSRR
mfspr r10,SPRN_HDSISR
.else
@ -625,16 +629,18 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
std r9,GPR11(r1)
std r10,GPR12(r1)
std r11,GPR13(r1)
.if IDAR
.if IDAR == 2
.if IISIDE
ld r10,_NIP(r1)
.else
ld r10,IAREA+EX_DAR(r13)
.endif
std r10,_DAR(r1)
.endif
.if IDSISR
.if IDSISR == 2
.if IISIDE
ld r10,_MSR(r1)
lis r11,DSISR_SRR1_MATCH_64S@h
and r10,r10,r11
@ -643,6 +649,7 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
.endif
std r10,_DSISR(r1)
.endif
BEGIN_FTR_SECTION_NESTED(66)
ld r10,IAREA+EX_CFAR(r13)
std r10,ORIG_GPR3(r1)
@ -1311,8 +1318,9 @@ ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
INT_DEFINE_BEGIN(instruction_access)
IVEC=0x400
IDAR=2
IDSISR=2
IISIDE=1
IDAR=1
IDSISR=1
IKVM_REAL=1
INT_DEFINE_END(instruction_access)
@ -1341,7 +1349,8 @@ INT_DEFINE_BEGIN(instruction_access_slb)
IVEC=0x480
IAREA=PACA_EXSLB
IRECONCILE=0
IDAR=2
IISIDE=1
IDAR=1
IKVM_REAL=1
INT_DEFINE_END(instruction_access_slb)