arch/sparc: Enable queued rwlocks for SPARC
Enable queued rwlocks for SPARC. Here are the discussions on this feature when this was introduced. https://lwn.net/Articles/572765/ https://lwn.net/Articles/582200/ Cleaned-up the arch_read_xxx and arch_write_xxx definitions in spinlock_64.h. These routines are replaced by the functions in include/asm-generic/qrwlock.h Signed-off-by: Babu Moger <babu.moger@oracle.com> Reviewed-by: Håkon Bugge <haakon.bugge@oracle.com> Reviewed-by: Jane Chu <jane.chu@oracle.com> Reviewed-by: Shannon Nelson <shannon.nelson@oracle.com> Reviewed-by: Vijay Kumar <vijay.ac.kumar@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -83,6 +83,7 @@ config SPARC64
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select ARCH_SUPPORTS_ATOMIC_RMW
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select ARCH_SUPPORTS_ATOMIC_RMW
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select HAVE_NMI
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select HAVE_NMI
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select HAVE_REGS_AND_STACK_ACCESS_API
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select HAVE_REGS_AND_STACK_ACCESS_API
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select ARCH_USE_QUEUED_RWLOCKS
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config ARCH_DEFCONFIG
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config ARCH_DEFCONFIG
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string
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string
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7
arch/sparc/include/asm/qrwlock.h
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7
arch/sparc/include/asm/qrwlock.h
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@ -0,0 +1,7 @@
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#ifndef _ASM_SPARC_QRWLOCK_H
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#define _ASM_SPARC_QRWLOCK_H
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#include <asm-generic/qrwlock_types.h>
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#include <asm-generic/qrwlock.h>
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#endif /* _ASM_SPARC_QRWLOCK_H */
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@ -10,6 +10,7 @@
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#include <asm/processor.h>
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#include <asm/processor.h>
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#include <asm/barrier.h>
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#include <asm/barrier.h>
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#include <asm/qrwlock.h>
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/* To get debugging spinlocks which detect and catch
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/* To get debugging spinlocks which detect and catch
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* deadlock situations, set CONFIG_DEBUG_SPINLOCK
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* deadlock situations, set CONFIG_DEBUG_SPINLOCK
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@ -94,132 +95,9 @@ static inline void arch_spin_lock_flags(arch_spinlock_t *lock, unsigned long fla
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: "memory");
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: "memory");
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}
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}
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/* Multi-reader locks, these are much saner than the 32-bit Sparc ones... */
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static inline void arch_read_lock(arch_rwlock_t *lock)
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{
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unsigned long tmp1, tmp2;
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__asm__ __volatile__ (
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"1: ldsw [%2], %0\n"
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" brlz,pn %0, 2f\n"
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"4: add %0, 1, %1\n"
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" cas [%2], %0, %1\n"
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" cmp %0, %1\n"
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" bne,pn %%icc, 1b\n"
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" nop\n"
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" .subsection 2\n"
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"2: ldsw [%2], %0\n"
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" brlz,pt %0, 2b\n"
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" nop\n"
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" ba,a,pt %%xcc, 4b\n"
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" .previous"
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: "=&r" (tmp1), "=&r" (tmp2)
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: "r" (lock)
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: "memory");
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}
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static inline int arch_read_trylock(arch_rwlock_t *lock)
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{
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int tmp1, tmp2;
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__asm__ __volatile__ (
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"1: ldsw [%2], %0\n"
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" brlz,a,pn %0, 2f\n"
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" mov 0, %0\n"
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" add %0, 1, %1\n"
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" cas [%2], %0, %1\n"
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" cmp %0, %1\n"
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" bne,pn %%icc, 1b\n"
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" mov 1, %0\n"
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"2:"
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: "=&r" (tmp1), "=&r" (tmp2)
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: "r" (lock)
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: "memory");
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return tmp1;
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}
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static inline void arch_read_unlock(arch_rwlock_t *lock)
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{
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unsigned long tmp1, tmp2;
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__asm__ __volatile__(
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"1: lduw [%2], %0\n"
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" sub %0, 1, %1\n"
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" cas [%2], %0, %1\n"
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" cmp %0, %1\n"
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" bne,pn %%xcc, 1b\n"
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" nop"
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: "=&r" (tmp1), "=&r" (tmp2)
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: "r" (lock)
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: "memory");
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}
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static inline void arch_write_lock(arch_rwlock_t *lock)
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{
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unsigned long mask, tmp1, tmp2;
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mask = 0x80000000UL;
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__asm__ __volatile__(
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"1: lduw [%2], %0\n"
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" brnz,pn %0, 2f\n"
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"4: or %0, %3, %1\n"
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" cas [%2], %0, %1\n"
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" cmp %0, %1\n"
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" bne,pn %%icc, 1b\n"
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" nop\n"
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" .subsection 2\n"
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"2: lduw [%2], %0\n"
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" brnz,pt %0, 2b\n"
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" nop\n"
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" ba,a,pt %%xcc, 4b\n"
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" .previous"
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: "=&r" (tmp1), "=&r" (tmp2)
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: "r" (lock), "r" (mask)
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: "memory");
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}
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static inline void arch_write_unlock(arch_rwlock_t *lock)
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{
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__asm__ __volatile__(
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" stw %%g0, [%0]"
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: /* no outputs */
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: "r" (lock)
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: "memory");
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}
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static inline int arch_write_trylock(arch_rwlock_t *lock)
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{
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unsigned long mask, tmp1, tmp2, result;
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mask = 0x80000000UL;
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__asm__ __volatile__(
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" mov 0, %2\n"
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"1: lduw [%3], %0\n"
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" brnz,pn %0, 2f\n"
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" or %0, %4, %1\n"
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" cas [%3], %0, %1\n"
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" cmp %0, %1\n"
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" bne,pn %%icc, 1b\n"
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" nop\n"
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" mov 1, %2\n"
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"2:"
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: "=&r" (tmp1), "=&r" (tmp2), "=&r" (result)
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: "r" (lock), "r" (mask)
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: "memory");
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return result;
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}
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#define arch_read_lock_flags(p, f) arch_read_lock(p)
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#define arch_read_lock_flags(p, f) arch_read_lock(p)
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#define arch_write_lock_flags(p, f) arch_write_lock(p)
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#define arch_write_lock_flags(p, f) arch_write_lock(p)
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#define arch_read_can_lock(rw) (!((rw)->lock & 0x80000000UL))
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#define arch_write_can_lock(rw) (!(rw)->lock)
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#define arch_spin_relax(lock) cpu_relax()
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#define arch_spin_relax(lock) cpu_relax()
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#define arch_read_relax(lock) cpu_relax()
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#define arch_read_relax(lock) cpu_relax()
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#define arch_write_relax(lock) cpu_relax()
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#define arch_write_relax(lock) cpu_relax()
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@ -7,10 +7,13 @@ typedef struct {
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#define __ARCH_SPIN_LOCK_UNLOCKED { 0 }
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#define __ARCH_SPIN_LOCK_UNLOCKED { 0 }
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#ifdef CONFIG_QUEUED_RWLOCKS
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#include <asm-generic/qrwlock_types.h>
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#else
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typedef struct {
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typedef struct {
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volatile unsigned int lock;
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volatile unsigned int lock;
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} arch_rwlock_t;
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} arch_rwlock_t;
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#define __ARCH_RW_LOCK_UNLOCKED { 0 }
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#define __ARCH_RW_LOCK_UNLOCKED { 0 }
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#endif /* CONFIG_QUEUED_RWLOCKS */
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#endif
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#endif
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