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Merge branch 'am335x-cpufreq-regression' into omap-for-v4.9/dt-v2

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This commit is contained in:
Tony Lindgren 2016-09-14 16:27:28 -07:00
commit a2a2b82156
4 changed files with 18 additions and 108 deletions
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11
arch/arm/boot/dts/am335x-boneblack.dts
View File

@ -33,17 +33,6 @@
status = "okay";
};
&cpu0_opp_table {
/*
* All PG 2.0 silicon may not support 1GHz but some of the early
* BeagleBone Blacks have PG 2.0 silicon which is guaranteed
* to support 1GHz OPP so enable it for PG 2.0 on this board.
*/
oppnitro@1000000000 {
opp-supported-hw = <0x06 0x0100>;
};
};
&am33xx_pinmux {
nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
pinctrl-single,pins = <

88
arch/arm/boot/dts/am33xx.dtsi
View File

@ -45,9 +45,19 @@
device_type = "cpu";
reg = <0>;
operating-points-v2 = <&cpu0_opp_table>;
ti,syscon-efuse = <&scm_conf 0x7fc 0x1fff 0>;
ti,syscon-rev = <&scm_conf 0x600>;
/*
* To consider voltage drop between PMIC and SoC,
* tolerance value is reduced to 2% from 4% and
* voltage value is increased as a precaution.
*/
operating-points = <
/* kHz uV */
720000 1285000
600000 1225000
500000 1125000
275000 1125000
>;
voltage-tolerance = <2>; /* 2 percentage */
clocks = <&dpll_mpu_ck>;
clock-names = "cpu";
@ -56,78 +66,6 @@
};
};
cpu0_opp_table: opp_table0 {
compatible = "operating-points-v2";
/*
* The three following nodes are marked with opp-suspend
* because the can not be enabled simultaneously on a
* single SoC.
*/
opp50@300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <950000 931000 969000>;
opp-supported-hw = <0x06 0x0010>;
opp-suspend;
};
opp100@275000000 {
opp-hz = /bits/ 64 <275000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0x01 0x00FF>;
opp-suspend;
};
opp100@300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0x06 0x0020>;
opp-suspend;
};
opp100@500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0x01 0xFFFF>;
};
opp100@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0x06 0x0040>;
};
opp120@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1200000 1176000 1224000>;
opp-supported-hw = <0x01 0xFFFF>;
};
opp120@720000000 {
opp-hz = /bits/ 64 <720000000>;
opp-microvolt = <1200000 1176000 1224000>;
opp-supported-hw = <0x06 0x0080>;
};
oppturbo@720000000 {
opp-hz = /bits/ 64 <720000000>;
opp-microvolt = <1260000 1234800 1285200>;
opp-supported-hw = <0x01 0xFFFF>;
};
oppturbo@800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1260000 1234800 1285200>;
opp-supported-hw = <0x06 0x0100>;
};
oppnitro@1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <1325000 1298500 1351500>;
opp-supported-hw = <0x04 0x0200>;
};
};
pmu {
compatible = "arm,cortex-a8-pmu";
interrupts = <3>;

26
arch/arm/boot/dts/dra7.dtsi
View File

@ -80,9 +80,11 @@
compatible = "arm,cortex-a15";
reg = <0>;
operating-points-v2 = <&cpu0_opp_table>;
ti,syscon-efuse = <&scm_wkup 0x20c 0xf80000 19>;
ti,syscon-rev = <&scm_wkup 0x204>;
operating-points = <
/* kHz uV */
1000000 1060000
1176000 1160000
>;
clocks = <&dpll_mpu_ck>;
clock-names = "cpu";
@ -96,24 +98,6 @@
};
};
cpu0_opp_table: opp_table0 {
compatible = "operating-points-v2";
opp-shared;
opp_nom@1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <1060000 850000 1150000>;
opp-supported-hw = <0xFF 0x01>;
opp-suspend;
};
opp_od@1176000000 {
opp-hz = /bits/ 64 <1176000000>;
opp-microvolt = <1160000 885000 1160000>;
opp-supported-hw = <0xFF 0x02>;
};
};
/*
* The soc node represents the soc top level view. It is used for IPs
* that are not memory mapped in the MPU view or for the MPU itself.

1
arch/arm/boot/dts/dra74x.dtsi
View File

@ -17,7 +17,6 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <1>;
operating-points-v2 = <&cpu0_opp_table>;
};
};