[ARM] pxa: add PWM devices support for pxa168/910
Signed-off-by: Mingwei Wang <mingwei.wang@marvell.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
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				| @ -264,4 +264,27 @@ | ||||
| #define GPIO116_I2S_RXD		MFP_CFG(GPIO116,AF2) | ||||
| #define GPIO117_I2S_TXD		MFP_CFG(GPIO117,AF2) | ||||
| 
 | ||||
| /* PWM */ | ||||
| #define GPIO96_PWM3_OUT		MFP_CFG(GPIO96, AF1) | ||||
| #define GPIO97_PWM2_OUT		MFP_CFG(GPIO97, AF1) | ||||
| #define GPIO98_PWM1_OUT		MFP_CFG(GPIO98, AF1) | ||||
| #define GPIO104_PWM4_OUT	MFP_CFG(GPIO104, AF1) | ||||
| #define GPIO106_PWM2_OUT	MFP_CFG(GPIO106, AF2) | ||||
| #define GPIO74_PWM4_OUT		MFP_CFG(GPIO74, AF2) | ||||
| #define GPIO75_PWM3_OUT		MFP_CFG(GPIO75, AF2) | ||||
| #define GPIO76_PWM2_OUT		MFP_CFG(GPIO76, AF2) | ||||
| #define GPIO77_PWM1_OUT		MFP_CFG(GPIO77, AF2) | ||||
| #define GPIO82_PWM4_OUT		MFP_CFG(GPIO82, AF2) | ||||
| #define GPIO83_PWM3_OUT		MFP_CFG(GPIO83, AF2) | ||||
| #define GPIO84_PWM2_OUT		MFP_CFG(GPIO84, AF2) | ||||
| #define GPIO85_PWM1_OUT		MFP_CFG(GPIO85, AF2) | ||||
| #define GPIO84_PWM1_OUT		MFP_CFG(GPIO84, AF4) | ||||
| #define GPIO122_PWM3_OUT	MFP_CFG(GPIO122, AF3) | ||||
| #define GPIO123_PWM1_OUT	MFP_CFG(GPIO123, AF1) | ||||
| #define GPIO124_PWM2_OUT	MFP_CFG(GPIO124, AF1) | ||||
| #define GPIO125_PWM3_OUT	MFP_CFG(GPIO125, AF1) | ||||
| #define GPIO126_PWM4_OUT	MFP_CFG(GPIO126, AF1) | ||||
| #define GPIO86_PWM1_OUT		MFP_CFG(GPIO86, AF2) | ||||
| #define GPIO86_PWM2_OUT		MFP_CFG(GPIO86, AF3) | ||||
| 
 | ||||
| #endif /* __ASM_MACH_MFP_PXA168_H */ | ||||
|  | ||||
| @ -159,4 +159,12 @@ | ||||
| #define MMC1_CD_MMC1_CD		MFP_CFG_DRV(MMC1_CD, AF0, MEDIUM) | ||||
| #define MMC1_WP_MMC1_WP		MFP_CFG_DRV(MMC1_WP, AF0, MEDIUM) | ||||
| 
 | ||||
| /* PWM */ | ||||
| #define GPIO27 PWM3 AF2		MFP_CFG(GPIO27, AF2) | ||||
| #define GPIO51_PWM2_OUT		MFP_CFG(GPIO51, AF2) | ||||
| #define GPIO117_PWM1_OUT	MFP_CFG(GPIO117, AF2) | ||||
| #define GPIO118_PWM2_OUT	MFP_CFG(GPIO118, AF2) | ||||
| #define GPIO119_PWM3_OUT	MFP_CFG(GPIO119, AF2) | ||||
| #define GPIO120_PWM4_OUT	MFP_CFG(GPIO120, AF2) | ||||
| 
 | ||||
| #endif /* __ASM_MACH MFP_PXA910_H */ | ||||
|  | ||||
| @ -9,6 +9,10 @@ extern struct pxa_device_desc pxa168_device_uart1; | ||||
| extern struct pxa_device_desc pxa168_device_uart2; | ||||
| extern struct pxa_device_desc pxa168_device_twsi0; | ||||
| extern struct pxa_device_desc pxa168_device_twsi1; | ||||
| extern struct pxa_device_desc pxa168_device_pwm1; | ||||
| extern struct pxa_device_desc pxa168_device_pwm2; | ||||
| extern struct pxa_device_desc pxa168_device_pwm3; | ||||
| extern struct pxa_device_desc pxa168_device_pwm4; | ||||
| 
 | ||||
| static inline int pxa168_add_uart(int id) | ||||
| { | ||||
| @ -44,4 +48,20 @@ static inline int pxa168_add_twsi(int id, struct i2c_pxa_platform_data *data, | ||||
| 
 | ||||
| 	return pxa_register_device(d, data, sizeof(*data)); | ||||
| } | ||||
| 
 | ||||
| static inline int pxa168_add_pwm(int id) | ||||
| { | ||||
| 	struct pxa_device_desc *d = NULL; | ||||
| 
 | ||||
| 	switch (id) { | ||||
| 	case 1: d = &pxa168_device_pwm1; break; | ||||
| 	case 2: d = &pxa168_device_pwm2; break; | ||||
| 	case 3: d = &pxa168_device_pwm3; break; | ||||
| 	case 4: d = &pxa168_device_pwm4; break; | ||||
| 	default: | ||||
| 		return -EINVAL; | ||||
| 	} | ||||
| 
 | ||||
| 	return pxa_register_device(d, NULL, 0); | ||||
| } | ||||
| #endif /* __ASM_MACH_PXA168_H */ | ||||
|  | ||||
| @ -9,6 +9,10 @@ extern struct pxa_device_desc pxa910_device_uart1; | ||||
| extern struct pxa_device_desc pxa910_device_uart2; | ||||
| extern struct pxa_device_desc pxa910_device_twsi0; | ||||
| extern struct pxa_device_desc pxa910_device_twsi1; | ||||
| extern struct pxa_device_desc pxa910_device_pwm1; | ||||
| extern struct pxa_device_desc pxa910_device_pwm2; | ||||
| extern struct pxa_device_desc pxa910_device_pwm3; | ||||
| extern struct pxa_device_desc pxa910_device_pwm4; | ||||
| 
 | ||||
| static inline int pxa910_add_uart(int id) | ||||
| { | ||||
| @ -44,4 +48,20 @@ static inline int pxa910_add_twsi(int id, struct i2c_pxa_platform_data *data, | ||||
| 
 | ||||
| 	return pxa_register_device(d, data, sizeof(*data)); | ||||
| } | ||||
| 
 | ||||
| static inline int pxa910_add_pwm(int id) | ||||
| { | ||||
| 	struct pxa_device_desc *d = NULL; | ||||
| 
 | ||||
| 	switch (id) { | ||||
| 	case 1: d = &pxa910_device_pwm1; break; | ||||
| 	case 2: d = &pxa910_device_pwm2; break; | ||||
| 	case 3: d = &pxa910_device_pwm3; break; | ||||
| 	case 4: d = &pxa910_device_pwm4; break; | ||||
| 	default: | ||||
| 		return -EINVAL; | ||||
| 	} | ||||
| 
 | ||||
| 	return pxa_register_device(d, NULL, 0); | ||||
| } | ||||
| #endif /* __ASM_MACH_PXA910_H */ | ||||
|  | ||||
| @ -22,8 +22,10 @@ | ||||
| #define APBC_PXA168_UART1	APBC_REG(0x000) | ||||
| #define APBC_PXA168_UART2	APBC_REG(0x004) | ||||
| #define APBC_PXA168_GPIO	APBC_REG(0x008) | ||||
| #define APBC_PXA168_PWM0	APBC_REG(0x00c) | ||||
| #define APBC_PXA168_PWM1	APBC_REG(0x010) | ||||
| #define APBC_PXA168_PWM1	APBC_REG(0x00c) | ||||
| #define APBC_PXA168_PWM2	APBC_REG(0x010) | ||||
| #define APBC_PXA168_PWM3	APBC_REG(0x014) | ||||
| #define APBC_PXA168_PWM4	APBC_REG(0x018) | ||||
| #define APBC_PXA168_SSP1	APBC_REG(0x01c) | ||||
| #define APBC_PXA168_SSP2	APBC_REG(0x020) | ||||
| #define APBC_PXA168_RTC		APBC_REG(0x028) | ||||
| @ -48,10 +50,10 @@ | ||||
| #define APBC_PXA910_UART0	APBC_REG(0x000) | ||||
| #define APBC_PXA910_UART1	APBC_REG(0x004) | ||||
| #define APBC_PXA910_GPIO	APBC_REG(0x008) | ||||
| #define APBC_PXA910_PWM0	APBC_REG(0x00c) | ||||
| #define APBC_PXA910_PWM1	APBC_REG(0x010) | ||||
| #define APBC_PXA910_PWM2	APBC_REG(0x014) | ||||
| #define APBC_PXA910_PWM3	APBC_REG(0x018) | ||||
| #define APBC_PXA910_PWM1	APBC_REG(0x00c) | ||||
| #define APBC_PXA910_PWM2	APBC_REG(0x010) | ||||
| #define APBC_PXA910_PWM3	APBC_REG(0x014) | ||||
| #define APBC_PXA910_PWM4	APBC_REG(0x018) | ||||
| #define APBC_PXA910_SSP1	APBC_REG(0x01c) | ||||
| #define APBC_PXA910_SSP2	APBC_REG(0x020) | ||||
| #define APBC_PXA910_IPC		APBC_REG(0x024) | ||||
|  | ||||
| @ -67,6 +67,10 @@ static APBC_CLK(uart1, PXA168_UART1, 1, 14745600); | ||||
| static APBC_CLK(uart2, PXA168_UART2, 1, 14745600); | ||||
| static APBC_CLK(twsi0, PXA168_TWSI0, 1, 33000000); | ||||
| static APBC_CLK(twsi1, PXA168_TWSI1, 1, 33000000); | ||||
| static APBC_CLK(pwm1, PXA168_PWM1, 1, 13000000); | ||||
| static APBC_CLK(pwm2, PXA168_PWM2, 1, 13000000); | ||||
| static APBC_CLK(pwm3, PXA168_PWM3, 1, 13000000); | ||||
| static APBC_CLK(pwm4, PXA168_PWM4, 1, 13000000); | ||||
| 
 | ||||
| /* device and clock bindings */ | ||||
| static struct clk_lookup pxa168_clkregs[] = { | ||||
| @ -74,6 +78,10 @@ static struct clk_lookup pxa168_clkregs[] = { | ||||
| 	INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL), | ||||
| 	INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL), | ||||
| 	INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL), | ||||
| 	INIT_CLKREG(&clk_pwm1, "pxa168-pwm.0", NULL), | ||||
| 	INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL), | ||||
| 	INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL), | ||||
| 	INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL), | ||||
| }; | ||||
| 
 | ||||
| static int __init pxa168_init(void) | ||||
| @ -115,3 +123,7 @@ PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22); | ||||
| PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24); | ||||
| PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28); | ||||
| PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28); | ||||
| PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10); | ||||
| PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10); | ||||
| PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10); | ||||
| PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10); | ||||
|  | ||||
| @ -105,6 +105,10 @@ static APBC_CLK(uart1, PXA910_UART0, 1, 14745600); | ||||
| static APBC_CLK(uart2, PXA910_UART1, 1, 14745600); | ||||
| static APBC_CLK(twsi0, PXA168_TWSI0, 1, 33000000); | ||||
| static APBC_CLK(twsi1, PXA168_TWSI1, 1, 33000000); | ||||
| static APBC_CLK(pwm1, PXA910_PWM1, 1, 13000000); | ||||
| static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000); | ||||
| static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000); | ||||
| static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000); | ||||
| 
 | ||||
| /* device and clock bindings */ | ||||
| static struct clk_lookup pxa910_clkregs[] = { | ||||
| @ -112,6 +116,10 @@ static struct clk_lookup pxa910_clkregs[] = { | ||||
| 	INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL), | ||||
| 	INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL), | ||||
| 	INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL), | ||||
| 	INIT_CLKREG(&clk_pwm1, "pxa910-pwm.0", NULL), | ||||
| 	INIT_CLKREG(&clk_pwm2, "pxa910-pwm.1", NULL), | ||||
| 	INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL), | ||||
| 	INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL), | ||||
| }; | ||||
| 
 | ||||
| static int __init pxa910_init(void) | ||||
| @ -162,3 +170,7 @@ PXA910_DEVICE(uart1, "pxa2xx-uart", 0, UART2, 0xd4017000, 0x30, 21, 22); | ||||
| PXA910_DEVICE(uart2, "pxa2xx-uart", 1, UART3, 0xd4018000, 0x30, 23, 24); | ||||
| PXA910_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28); | ||||
| PXA910_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28); | ||||
| PXA910_DEVICE(pwm1, "pxa910-pwm", 0, NONE, 0xd401a000, 0x10); | ||||
| PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10); | ||||
| PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10); | ||||
| PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10); | ||||
|  | ||||
| @ -28,6 +28,8 @@ static const struct platform_device_id pwm_id_table[] = { | ||||
| 	/*   PWM    has_secondary_pwm? */ | ||||
| 	{ "pxa25x-pwm", 0 }, | ||||
| 	{ "pxa27x-pwm", 0 | HAS_SECONDARY_PWM }, | ||||
| 	{ "pxa168-pwm", 1 }, | ||||
| 	{ "pxa910-pwm", 1 }, | ||||
| 	{ }, | ||||
| }; | ||||
| MODULE_DEVICE_TABLE(platform, pwm_id_table); | ||||
|  | ||||
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