staging: octeon-usb: more checkpatch fixes
place the opening brace right after the if,else, else if,switch statements. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: David Daney <ddaney.cavm@gmail.com> Signed-off-by: Devendra Naga <devendra.aaru@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Devendra Naga
Greg Kroah-Hartman
parent
3e842f73c6
commit
a2417928d6
@ -466,16 +466,14 @@ static inline cvmx_usb_transaction_t *__cvmx_usb_alloc_transaction(cvmx_usb_inte
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{
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cvmx_usb_transaction_t *t;
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t = usb->free_transaction_head;
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if (t)
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{
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if (t) {
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usb->free_transaction_head = t->next;
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if (!usb->free_transaction_head)
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usb->free_transaction_tail = NULL;
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}
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else if (cvmx_unlikely(usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_DEBUG_INFO))
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cvmx_dprintf("%s: Failed to allocate a transaction\n", __FUNCTION__);
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if (t)
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{
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if (t) {
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memset(t, 0, sizeof(*t));
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t->flags = __CVMX_USB_TRANSACTION_FLAGS_IN_USE;
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}
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@ -532,8 +530,7 @@ static inline void __cvmx_usb_append_pipe(cvmx_usb_pipe_list_t *list, cvmx_usb_p
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*/
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static inline void __cvmx_usb_remove_pipe(cvmx_usb_pipe_list_t *list, cvmx_usb_pipe_t *pipe)
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{
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if (list->head == pipe)
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{
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if (list->head == pipe) {
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list->head = pipe->next;
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pipe->next = NULL;
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if (list->head)
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@ -541,14 +538,12 @@ static inline void __cvmx_usb_remove_pipe(cvmx_usb_pipe_list_t *list, cvmx_usb_p
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else
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list->tail = NULL;
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}
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else if (list->tail == pipe)
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{
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else if (list->tail == pipe) {
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list->tail = pipe->prev;
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list->tail->next = NULL;
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pipe->prev = NULL;
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}
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else
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{
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else {
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pipe->prev->next = pipe->next;
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pipe->next->prev = pipe->prev;
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pipe->prev = NULL;
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@ -600,20 +595,17 @@ cvmx_usb_status_t cvmx_usb_initialize(cvmx_usb_state_t *state,
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CVMX_USB_RETURN(CVMX_USB_INVALID_PARAM);
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/* Try to determine clock type automatically */
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if ((flags & (CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_XI |
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CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND)) == 0)
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{
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CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND)) == 0) {
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if (octeon_usb_get_clock_type() == USB_CLOCK_TYPE_CRYSTAL_12)
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flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_XI; /* Only 12 MHZ crystals are supported */
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else
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flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND;
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}
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if (flags & CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND)
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{
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if (flags & CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND) {
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/* Check for auto ref clock frequency */
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if (!(flags & CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK))
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switch (octeon_usb_get_clock_type())
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{
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switch (octeon_usb_get_clock_type()) {
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case USB_CLOCK_TYPE_REF_12:
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flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ;
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break;
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@ -659,13 +651,11 @@ cvmx_usb_status_t cvmx_usb_initialize(cvmx_usb_state_t *state,
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usbn_clk_ctl.s.enable = 0;
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/* 2b. Select the USB reference clock/crystal parameters by writing
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appropriate values to USBN0/1_CLK_CTL[P_C_SEL, P_RTYPE, P_COM_ON] */
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if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND)
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{
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if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND) {
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/* The USB port uses 12/24/48MHz 2.5V board clock
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source at USB_XO. USB_XI should be tied to GND.
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Most Octeon evaluation boards require this setting */
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if (OCTEON_IS_MODEL(OCTEON_CN3XXX))
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{
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if (OCTEON_IS_MODEL(OCTEON_CN3XXX)) {
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usbn_clk_ctl.cn31xx.p_rclk = 1; /* From CN31XX,CN30XX manual */
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usbn_clk_ctl.cn31xx.p_xenbn = 0;
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}
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@ -674,8 +664,7 @@ cvmx_usb_status_t cvmx_usb_initialize(cvmx_usb_state_t *state,
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else
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usbn_clk_ctl.cn52xx.p_rtype = 1; /* From CN52XX manual */
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switch (flags & CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK)
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{
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switch (flags & CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK) {
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case CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ:
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usbn_clk_ctl.s.p_c_sel = 0;
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break;
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@ -687,12 +676,10 @@ cvmx_usb_status_t cvmx_usb_initialize(cvmx_usb_state_t *state,
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break;
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}
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}
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else
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{
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else {
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/* The USB port uses a 12MHz crystal as clock source
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at USB_XO and USB_XI */
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if (OCTEON_IS_MODEL(OCTEON_CN3XXX))
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{
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if (OCTEON_IS_MODEL(OCTEON_CN3XXX)) {
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usbn_clk_ctl.cn31xx.p_rclk = 1; /* From CN31XX,CN30XX manual */
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usbn_clk_ctl.cn31xx.p_xenbn = 1;
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}
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@ -935,8 +922,7 @@ cvmx_usb_status_t cvmx_usb_enable(cvmx_usb_state_t *state)
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CVMX_USB_RETURN(CVMX_USB_SUCCESS);
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/* If there is nothing plugged into the port then fail immediately */
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if (!usb->usbcx_hprt.s.prtconnsts)
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{
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if (!usb->usbcx_hprt.s.prtconnsts) {
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if (cvmx_unlikely(usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_DEBUG_INFO))
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cvmx_dprintf("%s: USB%d Nothing plugged into the port\n", __FUNCTION__, usb->index);
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CVMX_USB_RETURN(CVMX_USB_TIMEOUT);
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@ -954,8 +940,7 @@ cvmx_usb_status_t cvmx_usb_enable(cvmx_usb_state_t *state)
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/* Wait for the USBC_HPRT[PRTENA]. */
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if (CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_HPRT(usb->index), cvmx_usbcx_hprt_t,
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prtena, ==, 1, 100000))
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{
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prtena, ==, 1, 100000)) {
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if (cvmx_unlikely(usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_DEBUG_INFO))
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cvmx_dprintf("%s: Timeout waiting for the port to finish reset\n",
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__FUNCTION__);
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@ -1264,14 +1249,12 @@ int cvmx_usb_open_pipe(cvmx_usb_state_t *state, cvmx_usb_pipe_flags_t flags,
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if one wasn't supplied */
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if (!interval)
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interval = 1;
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if (__cvmx_usb_pipe_needs_split(usb, pipe))
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{
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if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
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pipe->interval = interval*8;
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/* Force start splits to be schedule on uFrame 0 */
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pipe->next_tx_frame = ((usb->frame_number+7)&~7) + pipe->interval;
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}
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else
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{
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else {
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pipe->interval = interval;
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pipe->next_tx_frame = usb->frame_number + pipe->interval;
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}
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@ -1328,8 +1311,7 @@ static void __cvmx_usb_poll_rx_fifo(cvmx_usb_internal_state_t *usb)
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__cvmx_usb_write_csr64(usb, CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8, address + bytes);
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/* Loop writing the FIFO data for this packet into memory */
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while (bytes > 0)
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{
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while (bytes > 0) {
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*ptr++ = __cvmx_usb_read_csr32(usb, USB_FIFO_ADDRESS(channel, usb->index));
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bytes -= 4;
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}
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@ -1360,16 +1342,14 @@ static int __cvmx_usb_fill_tx_hw(cvmx_usb_internal_state_t *usb, cvmx_usb_tx_fif
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/* We're done either when there isn't anymore space or the software FIFO
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is empty */
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while (available && (fifo->head != fifo->tail))
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{
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while (available && (fifo->head != fifo->tail)) {
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int i = fifo->tail;
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const uint32_t *ptr = cvmx_phys_to_ptr(fifo->entry[i].address);
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uint64_t csr_address = USB_FIFO_ADDRESS(fifo->entry[i].channel, usb->index) ^ 4;
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int words = available;
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/* Limit the amount of data to waht the SW fifo has */
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if (fifo->entry[i].size <= available)
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{
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if (fifo->entry[i].size <= available) {
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words = fifo->entry[i].size;
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fifo->tail++;
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if (fifo->tail > MAX_CHANNELS)
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@ -1383,8 +1363,7 @@ static int __cvmx_usb_fill_tx_hw(cvmx_usb_internal_state_t *usb, cvmx_usb_tx_fif
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/* Write the HW fifo data. The read every three writes is due
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to an errata on CN3XXX chips */
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while (words > 3)
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{
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while (words > 3) {
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cvmx_write64_uint32(csr_address, *ptr++);
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cvmx_write64_uint32(csr_address, *ptr++);
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cvmx_write64_uint32(csr_address, *ptr++);
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@ -1392,8 +1371,7 @@ static int __cvmx_usb_fill_tx_hw(cvmx_usb_internal_state_t *usb, cvmx_usb_tx_fif
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words -= 3;
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}
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cvmx_write64_uint32(csr_address, *ptr++);
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if (--words)
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{
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if (--words) {
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cvmx_write64_uint32(csr_address, *ptr++);
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if (--words)
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cvmx_write64_uint32(csr_address, *ptr++);
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@ -1415,8 +1393,7 @@ static void __cvmx_usb_poll_tx_fifo(cvmx_usb_internal_state_t *usb)
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CVMX_USB_LOG_CALLED();
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CVMX_USB_LOG_PARAM("%p", usb);
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if (usb->periodic.head != usb->periodic.tail)
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{
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if (usb->periodic.head != usb->periodic.tail) {
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cvmx_usbcx_hptxsts_t tx_status;
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tx_status.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPTXSTS(usb->index));
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if (__cvmx_usb_fill_tx_hw(usb, &usb->periodic, tx_status.s.ptxfspcavail))
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@ -1425,8 +1402,7 @@ static void __cvmx_usb_poll_tx_fifo(cvmx_usb_internal_state_t *usb)
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USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), cvmx_usbcx_gintmsk_t, ptxfempmsk, 0);
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}
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if (usb->nonperiodic.head != usb->nonperiodic.tail)
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{
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if (usb->nonperiodic.head != usb->nonperiodic.tail) {
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cvmx_usbcx_gnptxsts_t tx_status;
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tx_status.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GNPTXSTS(usb->index));
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if (__cvmx_usb_fill_tx_hw(usb, &usb->nonperiodic, tx_status.s.nptxfspcavail))
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@ -1519,8 +1495,7 @@ static void __cvmx_usb_start_channel_control(cvmx_usb_internal_state_t *usb,
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usbc_hctsiz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index));
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switch (transaction->stage)
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{
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switch (transaction->stage) {
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case CVMX_USB_STAGE_NON_CONTROL:
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case CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE:
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cvmx_dprintf("%s: ERROR - Non control stage\n", __FUNCTION__);
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@ -1543,8 +1518,7 @@ static void __cvmx_usb_start_channel_control(cvmx_usb_internal_state_t *usb,
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break;
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case CVMX_USB_STAGE_DATA:
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usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
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if (__cvmx_usb_pipe_needs_split(usb, pipe))
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{
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if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
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if (header->s.request_type & 0x80)
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bytes_to_transfer = 0;
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else if (bytes_to_transfer > pipe->max_packet)
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@ -1588,8 +1562,7 @@ static void __cvmx_usb_start_channel_control(cvmx_usb_internal_state_t *usb,
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/* Make sure the transfer never exceeds the byte limit of the hardware.
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Further bytes will be sent as continued transactions */
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if (bytes_to_transfer > MAX_TRANSFER_BYTES)
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{
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if (bytes_to_transfer > MAX_TRANSFER_BYTES) {
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/* Round MAX_TRANSFER_BYTES to a multiple of out packet size */
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bytes_to_transfer = MAX_TRANSFER_BYTES / pipe->max_packet;
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bytes_to_transfer *= pipe->max_packet;
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@ -1600,16 +1573,14 @@ static void __cvmx_usb_start_channel_control(cvmx_usb_internal_state_t *usb,
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packets_to_transfer = (bytes_to_transfer + pipe->max_packet - 1) / pipe->max_packet;
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if (packets_to_transfer == 0)
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packets_to_transfer = 1;
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else if ((packets_to_transfer>1) && (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA))
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{
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else if ((packets_to_transfer>1) && (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)) {
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/* Limit to one packet when not using DMA. Channels must be restarted
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between every packet for IN transactions, so there is no reason to
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do multiple packets in a row */
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packets_to_transfer = 1;
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bytes_to_transfer = packets_to_transfer * pipe->max_packet;
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}
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else if (packets_to_transfer > MAX_TRANSFER_PACKETS)
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{
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else if (packets_to_transfer > MAX_TRANSFER_PACKETS) {
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/* Limit the number of packet and data transferred to what the
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hardware can handle */
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packets_to_transfer = MAX_TRANSFER_PACKETS;
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