V4L/DVB (9747): em28xx: Properly handles XCLK and I2C speed
The previous patches removed XCLK and I2C magic. Now, we finally know what those registers do. Also, only a very few cards need different setups for those. Instead of keeping the setups for those values inside the per-device hack magic switch, move the uncommon values to the board-specific struct, and have a common setup for all other boards. So, almost 100 lines of hacking magic were removed. A co-lateral effect of this patch is that it also fixes a bug at em28xx-core, where xclk were set, without taking any care about not overriding a previous xclk setup. Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
parent
6d676d8af8
commit
a2070c6654
@ -55,6 +55,7 @@ struct em28xx_board em28xx_boards[] = {
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[EM2750_BOARD_UNKNOWN] = {
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[EM2750_BOARD_UNKNOWN] = {
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.name = "Unknown EM2750/EM2751 webcam grabber",
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.name = "Unknown EM2750/EM2751 webcam grabber",
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.vchannels = 1,
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.vchannels = 1,
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.xclk = EM28XX_XCLK_FREQUENCY_48MHZ,
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.input = { {
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.input = { {
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.type = EM28XX_VMUX_COMPOSITE1,
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.type = EM28XX_VMUX_COMPOSITE1,
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.vmux = 0,
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.vmux = 0,
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@ -78,15 +79,15 @@ struct em28xx_board em28xx_boards[] = {
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} },
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} },
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},
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},
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[EM2820_BOARD_UNKNOWN] = {
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[EM2820_BOARD_UNKNOWN] = {
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.name = "Unknown EM2750/28xx video grabber",
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.name = "Unknown EM2750/28xx video grabber",
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.is_em2800 = 0,
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.tuner_type = TUNER_ABSENT,
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.tuner_type = TUNER_ABSENT,
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},
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},
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[EM2750_BOARD_DLCW_130] = {
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[EM2750_BOARD_DLCW_130] = {
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/* Beijing Huaqi Information Digital Technology Co., Ltd */
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/* Beijing Huaqi Information Digital Technology Co., Ltd */
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.name = "Huaqi DLCW-130",
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.name = "Huaqi DLCW-130",
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.valid = EM28XX_BOARD_NOT_VALIDATED,
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.valid = EM28XX_BOARD_NOT_VALIDATED,
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.vchannels = 1,
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.vchannels = 1,
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.xclk = EM28XX_XCLK_FREQUENCY_48MHZ,
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.input = { {
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.input = { {
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.type = EM28XX_VMUX_COMPOSITE1,
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.type = EM28XX_VMUX_COMPOSITE1,
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.vmux = 0,
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.vmux = 0,
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@ -514,6 +515,10 @@ struct em28xx_board em28xx_boards[] = {
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.name = "Pinnacle PCTV DVB-T",
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.name = "Pinnacle PCTV DVB-T",
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.valid = EM28XX_BOARD_NOT_VALIDATED,
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.valid = EM28XX_BOARD_NOT_VALIDATED,
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.tuner_type = TUNER_ABSENT, /* MT2060 */
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.tuner_type = TUNER_ABSENT, /* MT2060 */
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/* djh - I have serious doubts this is right... */
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.xclk = EM28XX_XCLK_IR_RC5_MODE |
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EM28XX_XCLK_FREQUENCY_10MHZ,
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},
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},
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[EM2870_BOARD_COMPRO_VIDEOMATE] = {
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[EM2870_BOARD_COMPRO_VIDEOMATE] = {
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.name = "Compro, VideoMate U3",
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.name = "Compro, VideoMate U3",
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@ -547,7 +552,7 @@ struct em28xx_board em28xx_boards[] = {
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.tda9887_conf = TDA9887_PRESENT,
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.tda9887_conf = TDA9887_PRESENT,
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.tuner_type = TUNER_XC2028,
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.tuner_type = TUNER_XC2028,
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.mts_firmware = 1,
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.mts_firmware = 1,
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.has_dvb = 1,
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.has_dvb = 1,
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.decoder = EM28XX_TVP5150,
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.decoder = EM28XX_TVP5150,
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.input = { {
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.input = { {
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.type = EM28XX_VMUX_TELEVISION,
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.type = EM28XX_VMUX_TELEVISION,
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@ -589,7 +594,6 @@ struct em28xx_board em28xx_boards[] = {
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.vchannels = 3,
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.vchannels = 3,
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.tuner_type = TUNER_XC2028,
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.tuner_type = TUNER_XC2028,
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.mts_firmware = 1,
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.mts_firmware = 1,
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.has_12mhz_i2s = 1,
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.has_dvb = 1,
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.has_dvb = 1,
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.ir_codes = ir_codes_hauppauge_new,
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.ir_codes = ir_codes_hauppauge_new,
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.decoder = EM28XX_TVP5150,
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.decoder = EM28XX_TVP5150,
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@ -612,7 +616,6 @@ struct em28xx_board em28xx_boards[] = {
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.vchannels = 3,
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.vchannels = 3,
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.tuner_type = TUNER_XC2028,
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.tuner_type = TUNER_XC2028,
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.mts_firmware = 1,
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.mts_firmware = 1,
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.has_12mhz_i2s = 1,
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.has_dvb = 1,
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.has_dvb = 1,
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.ir_codes = ir_codes_pinnacle_pctv_hd,
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.ir_codes = ir_codes_pinnacle_pctv_hd,
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.decoder = EM28XX_TVP5150,
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.decoder = EM28XX_TVP5150,
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@ -635,7 +638,6 @@ struct em28xx_board em28xx_boards[] = {
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.vchannels = 3,
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.vchannels = 3,
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.tuner_type = TUNER_XC2028,
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.tuner_type = TUNER_XC2028,
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.mts_firmware = 1,
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.mts_firmware = 1,
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.has_12mhz_i2s = 1,
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.has_dvb = 1,
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.has_dvb = 1,
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.ir_codes = ir_codes_ati_tv_wonder_hd_600,
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.ir_codes = ir_codes_ati_tv_wonder_hd_600,
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.decoder = EM28XX_TVP5150,
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.decoder = EM28XX_TVP5150,
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@ -1091,9 +1093,12 @@ struct em28xx_board em28xx_boards[] = {
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.name = "Pinnacle PCTV HD Mini",
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.name = "Pinnacle PCTV HD Mini",
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.vchannels = 0,
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.vchannels = 0,
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.tuner_type = TUNER_ABSENT,
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.tuner_type = TUNER_ABSENT,
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.has_dvb = 1,
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.has_dvb = 1,
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.ir_codes = ir_codes_pinnacle_pctv_hd,
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.ir_codes = ir_codes_pinnacle_pctv_hd,
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.decoder = EM28XX_NODECODER,
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.decoder = EM28XX_NODECODER,
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.i2c_speed = EM28XX_I2C_CLK_WAIT_ENABLE |
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EM2874_I2C_SECONDARY_BUS_SELECT |
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EM28XX_I2C_FREQ_400_KHZ,
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#ifdef DJH_DEBUG
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#ifdef DJH_DEBUG
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.input = { {
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.input = { {
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.type = EM28XX_VMUX_TELEVISION,
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.type = EM28XX_VMUX_TELEVISION,
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@ -1326,7 +1331,8 @@ static void em28xx_set_model(struct em28xx *dev)
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dev->tda9887_conf = em28xx_boards[dev->model].tda9887_conf;
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dev->tda9887_conf = em28xx_boards[dev->model].tda9887_conf;
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dev->decoder = em28xx_boards[dev->model].decoder;
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dev->decoder = em28xx_boards[dev->model].decoder;
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dev->video_inputs = em28xx_boards[dev->model].vchannels;
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dev->video_inputs = em28xx_boards[dev->model].vchannels;
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dev->has_12mhz_i2s = em28xx_boards[dev->model].has_12mhz_i2s;
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dev->xclk = em28xx_boards[dev->model].xclk;
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dev->i2c_speed = em28xx_boards[dev->model].i2c_speed;
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dev->max_range_640_480 = em28xx_boards[dev->model].max_range_640_480;
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dev->max_range_640_480 = em28xx_boards[dev->model].max_range_640_480;
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dev->has_dvb = em28xx_boards[dev->model].has_dvb;
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dev->has_dvb = em28xx_boards[dev->model].has_dvb;
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dev->has_snapshot_button = em28xx_boards[dev->model].has_snapshot_button;
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dev->has_snapshot_button = em28xx_boards[dev->model].has_snapshot_button;
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@ -1385,6 +1391,21 @@ void em28xx_pre_card_setup(struct em28xx *dev)
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em28xx_set_model(dev);
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em28xx_set_model(dev);
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/* Those are the default values for the majority of boards
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Use those values if not specified otherwise at boards entry
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*/
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if (!dev->xclk)
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dev->xclk = EM28XX_XCLK_IR_RC5_MODE |
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EM28XX_XCLK_FREQUENCY_12MHZ;
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if (!dev->i2c_speed)
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dev->i2c_speed = EM28XX_I2C_CLK_WAIT_ENABLE |
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EM28XX_I2C_FREQ_100_KHZ;
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em28xx_write_reg(dev, EM28XX_R0F_XCLK, dev->xclk & 0x7f);
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em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, dev->i2c_speed);
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msleep(50);
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/* request some modules */
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/* request some modules */
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switch (dev->model) {
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switch (dev->model) {
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case EM2880_BOARD_TERRATEC_PRODIGY_XS:
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case EM2880_BOARD_TERRATEC_PRODIGY_XS:
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@ -1396,14 +1417,6 @@ void em28xx_pre_card_setup(struct em28xx *dev)
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case EM2882_BOARD_PINNACLE_HYBRID_PRO:
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case EM2882_BOARD_PINNACLE_HYBRID_PRO:
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case EM2883_BOARD_KWORLD_HYBRID_A316:
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case EM2883_BOARD_KWORLD_HYBRID_A316:
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case EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600:
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case EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600:
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em28xx_write_reg(dev, EM28XX_R0F_XCLK,
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EM28XX_XCLK_IR_RC5_MODE |
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EM28XX_XCLK_FREQUENCY_12MHZ);
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em28xx_write_reg(dev, EM28XX_R06_I2C_CLK,
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EM28XX_I2C_CLK_WAIT_ENABLE |
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EM28XX_I2C_FREQ_100_KHZ);
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msleep(50);
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/* Sets GPO/GPIO sequences for this device */
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/* Sets GPO/GPIO sequences for this device */
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dev->analog_gpio = hauppauge_wintv_hvr_900_analog;
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dev->analog_gpio = hauppauge_wintv_hvr_900_analog;
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dev->digital_gpio = hauppauge_wintv_hvr_900_digital;
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dev->digital_gpio = hauppauge_wintv_hvr_900_digital;
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@ -1412,16 +1425,6 @@ void em28xx_pre_card_setup(struct em28xx *dev)
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break;
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break;
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case EM2882_BOARD_TERRATEC_HYBRID_XS:
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case EM2882_BOARD_TERRATEC_HYBRID_XS:
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em28xx_write_reg(dev, EM28XX_R0F_XCLK,
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EM28XX_XCLK_IR_RC5_MODE |
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EM28XX_XCLK_FREQUENCY_12MHZ);
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em28xx_write_reg(dev, EM28XX_R06_I2C_CLK,
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EM28XX_I2C_CLK_WAIT_ENABLE |
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EM28XX_I2C_FREQ_100_KHZ);
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msleep(50);
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/* should be added ir_codes here */
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/* Sets GPO/GPIO sequences for this device */
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/* Sets GPO/GPIO sequences for this device */
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dev->analog_gpio = hauppauge_wintv_hvr_900_analog;
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dev->analog_gpio = hauppauge_wintv_hvr_900_analog;
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dev->digital_gpio = hauppauge_wintv_hvr_900_digital;
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dev->digital_gpio = hauppauge_wintv_hvr_900_digital;
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@ -1436,14 +1439,6 @@ void em28xx_pre_card_setup(struct em28xx *dev)
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case EM2880_BOARD_KWORLD_DVB_310U:
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case EM2880_BOARD_KWORLD_DVB_310U:
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case EM2870_BOARD_KWORLD_350U:
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case EM2870_BOARD_KWORLD_350U:
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case EM2881_BOARD_DNT_DA2_HYBRID:
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case EM2881_BOARD_DNT_DA2_HYBRID:
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em28xx_write_reg(dev, EM28XX_R0F_XCLK,
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EM28XX_XCLK_IR_RC5_MODE |
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EM28XX_XCLK_FREQUENCY_12MHZ);
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em28xx_write_reg(dev, EM28XX_R06_I2C_CLK,
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EM28XX_I2C_CLK_WAIT_ENABLE |
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EM28XX_I2C_FREQ_100_KHZ);
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msleep(50);
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/* NOTE: EM2881_DNT_DA2_HYBRID spend 140 msleep for digital
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/* NOTE: EM2881_DNT_DA2_HYBRID spend 140 msleep for digital
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and analog commands. If this commands doesn't work,
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and analog commands. If this commands doesn't work,
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add this timer. */
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add this timer. */
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@ -1457,14 +1452,6 @@ void em28xx_pre_card_setup(struct em28xx *dev)
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case EM2880_BOARD_MSI_DIGIVOX_AD:
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case EM2880_BOARD_MSI_DIGIVOX_AD:
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case EM2880_BOARD_MSI_DIGIVOX_AD_II:
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case EM2880_BOARD_MSI_DIGIVOX_AD_II:
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em28xx_write_reg(dev, EM28XX_R0F_XCLK,
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EM28XX_XCLK_IR_RC5_MODE |
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EM28XX_XCLK_FREQUENCY_12MHZ);
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em28xx_write_reg(dev, EM28XX_R06_I2C_CLK,
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EM28XX_I2C_CLK_WAIT_ENABLE |
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EM28XX_I2C_FREQ_100_KHZ);
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msleep(50);
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/* Sets GPO/GPIO sequences for this device */
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/* Sets GPO/GPIO sequences for this device */
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dev->analog_gpio = em2880_msi_digivox_ad_analog;
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dev->analog_gpio = em2880_msi_digivox_ad_analog;
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dev->digital_gpio = em2880_msi_digivox_ad_digital;
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dev->digital_gpio = em2880_msi_digivox_ad_digital;
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@ -1472,19 +1459,7 @@ void em28xx_pre_card_setup(struct em28xx *dev)
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dev->tun_digital_gpio = default_callback;
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dev->tun_digital_gpio = default_callback;
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break;
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break;
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case EM2750_BOARD_UNKNOWN:
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case EM2750_BOARD_DLCW_130:
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em28xx_write_reg(dev, EM28XX_R0F_XCLK,
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EM28XX_XCLK_FREQUENCY_48MHZ);
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break;
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case EM2861_BOARD_PLEXTOR_PX_TV100U:
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case EM2861_BOARD_PLEXTOR_PX_TV100U:
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em28xx_write_reg(dev, EM28XX_R0F_XCLK,
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EM28XX_XCLK_IR_RC5_MODE |
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EM28XX_XCLK_FREQUENCY_12MHZ);
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em28xx_write_reg(dev, EM28XX_R06_I2C_CLK,
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EM28XX_I2C_CLK_WAIT_ENABLE |
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EM28XX_I2C_FREQ_100_KHZ);
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/* FIXME guess */
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/* FIXME guess */
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/* Turn on analog audio output */
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/* Turn on analog audio output */
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em28xx_write_reg(dev, EM28XX_R08_GPIO, 0xfd);
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em28xx_write_reg(dev, EM28XX_R08_GPIO, 0xfd);
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@ -1492,13 +1467,6 @@ void em28xx_pre_card_setup(struct em28xx *dev)
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case EM2861_BOARD_KWORLD_PVRTV_300U:
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case EM2861_BOARD_KWORLD_PVRTV_300U:
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case EM2880_BOARD_KWORLD_DVB_305U:
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case EM2880_BOARD_KWORLD_DVB_305U:
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em28xx_write_reg(dev, EM28XX_R0F_XCLK,
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EM28XX_XCLK_IR_RC5_MODE |
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EM28XX_XCLK_FREQUENCY_12MHZ);
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em28xx_write_reg(dev, EM28XX_R06_I2C_CLK,
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EM28XX_I2C_CLK_WAIT_ENABLE |
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EM28XX_I2C_FREQ_100_KHZ);
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msleep(10);
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em28xx_write_reg(dev, EM28XX_R08_GPIO, 0x6d);
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em28xx_write_reg(dev, EM28XX_R08_GPIO, 0x6d);
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msleep(10);
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msleep(10);
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em28xx_write_reg(dev, EM28XX_R08_GPIO, 0x7d);
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em28xx_write_reg(dev, EM28XX_R08_GPIO, 0x7d);
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@ -1506,25 +1474,11 @@ void em28xx_pre_card_setup(struct em28xx *dev)
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break;
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break;
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case EM2870_BOARD_KWORLD_355U:
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case EM2870_BOARD_KWORLD_355U:
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em28xx_write_reg(dev, EM28XX_R0F_XCLK,
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EM28XX_XCLK_IR_RC5_MODE |
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EM28XX_XCLK_FREQUENCY_12MHZ);
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em28xx_write_reg(dev, EM28XX_R06_I2C_CLK,
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EM28XX_I2C_CLK_WAIT_ENABLE |
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EM28XX_I2C_FREQ_100_KHZ);
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msleep(50);
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/* Sets GPO/GPIO sequences for this device */
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/* Sets GPO/GPIO sequences for this device */
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dev->digital_gpio = em2870_kworld_355u_digital;
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dev->digital_gpio = em2870_kworld_355u_digital;
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break;
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break;
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case EM2870_BOARD_COMPRO_VIDEOMATE:
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case EM2870_BOARD_COMPRO_VIDEOMATE:
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em28xx_write_reg(dev, EM28XX_R0F_XCLK,
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EM28XX_XCLK_IR_RC5_MODE |
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EM28XX_XCLK_FREQUENCY_12MHZ);
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em28xx_write_reg(dev, EM28XX_R06_I2C_CLK,
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EM28XX_I2C_CLK_WAIT_ENABLE |
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EM28XX_I2C_FREQ_100_KHZ);
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/* TODO: someone can do some cleanup here...
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/* TODO: someone can do some cleanup here...
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not everything's needed */
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not everything's needed */
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em28xx_write_reg(dev, EM2880_R04_GPO, 0x00);
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em28xx_write_reg(dev, EM2880_R04_GPO, 0x00);
|
||||||
@ -1542,12 +1496,6 @@ void em28xx_pre_card_setup(struct em28xx *dev)
|
|||||||
break;
|
break;
|
||||||
|
|
||||||
case EM2870_BOARD_TERRATEC_XS_MT2060:
|
case EM2870_BOARD_TERRATEC_XS_MT2060:
|
||||||
em28xx_write_reg(dev, EM28XX_R0F_XCLK,
|
|
||||||
EM28XX_XCLK_IR_RC5_MODE |
|
|
||||||
EM28XX_XCLK_FREQUENCY_12MHZ);
|
|
||||||
em28xx_write_reg(dev, EM28XX_R06_I2C_CLK,
|
|
||||||
EM28XX_I2C_CLK_WAIT_ENABLE |
|
|
||||||
EM28XX_I2C_FREQ_100_KHZ);
|
|
||||||
/* this device needs some gpio writes to get the DVB-T
|
/* this device needs some gpio writes to get the DVB-T
|
||||||
demod work */
|
demod work */
|
||||||
em28xx_write_reg(dev, EM28XX_R08_GPIO, 0xfe);
|
em28xx_write_reg(dev, EM28XX_R08_GPIO, 0xfe);
|
||||||
@ -1559,10 +1507,6 @@ void em28xx_pre_card_setup(struct em28xx *dev)
|
|||||||
break;
|
break;
|
||||||
|
|
||||||
case EM2870_BOARD_PINNACLE_PCTV_DVB:
|
case EM2870_BOARD_PINNACLE_PCTV_DVB:
|
||||||
em28xx_write_reg(dev, EM28XX_R06_I2C_CLK,
|
|
||||||
EM28XX_I2C_CLK_WAIT_ENABLE |
|
|
||||||
EM28XX_I2C_FREQ_100_KHZ);
|
|
||||||
|
|
||||||
/* this device needs some gpio writes to get the
|
/* this device needs some gpio writes to get the
|
||||||
DVB-T demod work */
|
DVB-T demod work */
|
||||||
em28xx_write_reg(dev, EM28XX_R08_GPIO, 0xfe);
|
em28xx_write_reg(dev, EM28XX_R08_GPIO, 0xfe);
|
||||||
@ -1571,53 +1515,15 @@ void em28xx_pre_card_setup(struct em28xx *dev)
|
|||||||
mdelay(70);
|
mdelay(70);
|
||||||
em28xx_write_reg(dev, EM28XX_R08_GPIO, 0xfe);
|
em28xx_write_reg(dev, EM28XX_R08_GPIO, 0xfe);
|
||||||
mdelay(70);
|
mdelay(70);
|
||||||
/* switch em2880 rc protocol */
|
|
||||||
/* djh - I have serious doubts this is right... */
|
|
||||||
em28xx_write_reg(dev, EM28XX_R0F_XCLK,
|
|
||||||
EM28XX_XCLK_IR_RC5_MODE |
|
|
||||||
EM28XX_XCLK_FREQUENCY_10MHZ);
|
|
||||||
/* should be added ir_codes here */
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case EM2820_BOARD_GADMEI_UTV310:
|
case EM2820_BOARD_GADMEI_UTV310:
|
||||||
em28xx_write_reg(dev, EM28XX_R0F_XCLK,
|
|
||||||
EM28XX_XCLK_IR_RC5_MODE |
|
|
||||||
EM28XX_XCLK_FREQUENCY_12MHZ);
|
|
||||||
em28xx_write_reg(dev, EM28XX_R06_I2C_CLK,
|
|
||||||
EM28XX_I2C_CLK_WAIT_ENABLE |
|
|
||||||
EM28XX_I2C_FREQ_100_KHZ);
|
|
||||||
/* Turn on analog audio output */
|
|
||||||
em28xx_write_reg(dev, EM28XX_R08_GPIO, 0xfd);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case EM2860_BOARD_GADMEI_UTV330:
|
|
||||||
em28xx_write_reg(dev, EM28XX_R0F_XCLK,
|
|
||||||
EM28XX_XCLK_IR_RC5_MODE |
|
|
||||||
EM28XX_XCLK_FREQUENCY_12MHZ);
|
|
||||||
em28xx_write_reg(dev, EM28XX_R06_I2C_CLK,
|
|
||||||
EM28XX_I2C_CLK_WAIT_ENABLE |
|
|
||||||
EM28XX_I2C_FREQ_100_KHZ);
|
|
||||||
/* should be added ir_codes here */
|
|
||||||
break;
|
|
||||||
|
|
||||||
case EM2820_BOARD_MSI_VOX_USB_2:
|
case EM2820_BOARD_MSI_VOX_USB_2:
|
||||||
em28xx_write_reg(dev, EM28XX_R0F_XCLK,
|
/* enables audio for that devices */
|
||||||
EM28XX_XCLK_IR_RC5_MODE |
|
|
||||||
EM28XX_XCLK_FREQUENCY_12MHZ);
|
|
||||||
em28xx_write_reg(dev, EM28XX_R06_I2C_CLK,
|
|
||||||
EM28XX_I2C_CLK_WAIT_ENABLE |
|
|
||||||
EM28XX_I2C_FREQ_100_KHZ);
|
|
||||||
/* enables audio for that device */
|
|
||||||
em28xx_write_reg(dev, EM28XX_R08_GPIO, 0xfd);
|
em28xx_write_reg(dev, EM28XX_R08_GPIO, 0xfd);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case EM2874_BOARD_PINNACLE_PCTV_80E:
|
case EM2874_BOARD_PINNACLE_PCTV_80E:
|
||||||
/* Set 400 KHz clock and select secondary i2c bus */
|
|
||||||
em28xx_write_reg(dev, EM28XX_R06_I2C_CLK,
|
|
||||||
EM28XX_I2C_CLK_WAIT_ENABLE |
|
|
||||||
EM2874_I2C_SECONDARY_BUS_SELECT |
|
|
||||||
EM28XX_I2C_FREQ_400_KHZ);
|
|
||||||
|
|
||||||
dev->digital_gpio = em2874_pinnacle_80e_digital;
|
dev->digital_gpio = em2874_pinnacle_80e_digital;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
@ -399,7 +399,7 @@ struct em28xx_vol_table outputs[] = {
|
|||||||
int em28xx_audio_analog_set(struct em28xx *dev)
|
int em28xx_audio_analog_set(struct em28xx *dev)
|
||||||
{
|
{
|
||||||
int ret, i;
|
int ret, i;
|
||||||
u8 xclk = 0x07;
|
u8 xclk;
|
||||||
|
|
||||||
if (!dev->audio_mode.has_audio)
|
if (!dev->audio_mode.has_audio)
|
||||||
return 0;
|
return 0;
|
||||||
@ -417,13 +417,11 @@ int em28xx_audio_analog_set(struct em28xx *dev)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (dev->has_12mhz_i2s)
|
xclk = dev->xclk & 0x7f;
|
||||||
xclk |= 0x20;
|
|
||||||
|
|
||||||
if (!dev->mute)
|
if (!dev->mute)
|
||||||
xclk |= 0x80;
|
xclk |= 0x80;
|
||||||
|
|
||||||
ret = em28xx_write_reg_bits(dev, EM28XX_R0F_XCLK, xclk, 0xa7);
|
ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk);
|
||||||
if (ret < 0)
|
if (ret < 0)
|
||||||
return ret;
|
return ret;
|
||||||
msleep(10);
|
msleep(10);
|
||||||
|
@ -338,12 +338,13 @@ struct em28xx_board {
|
|||||||
unsigned int is_em2800:1;
|
unsigned int is_em2800:1;
|
||||||
unsigned int has_msp34xx:1;
|
unsigned int has_msp34xx:1;
|
||||||
unsigned int mts_firmware:1;
|
unsigned int mts_firmware:1;
|
||||||
unsigned int has_12mhz_i2s:1;
|
|
||||||
unsigned int max_range_640_480:1;
|
unsigned int max_range_640_480:1;
|
||||||
unsigned int has_dvb:1;
|
unsigned int has_dvb:1;
|
||||||
unsigned int has_snapshot_button:1;
|
unsigned int has_snapshot_button:1;
|
||||||
unsigned int valid:1;
|
unsigned int valid:1;
|
||||||
|
|
||||||
|
unsigned char xclk, i2c_speed;
|
||||||
|
|
||||||
enum em28xx_decoder decoder;
|
enum em28xx_decoder decoder;
|
||||||
|
|
||||||
struct em28xx_input input[MAX_EM28XX_INPUT];
|
struct em28xx_input input[MAX_EM28XX_INPUT];
|
||||||
@ -422,12 +423,13 @@ struct em28xx {
|
|||||||
unsigned int stream_on:1; /* Locks streams */
|
unsigned int stream_on:1; /* Locks streams */
|
||||||
unsigned int has_audio_class:1;
|
unsigned int has_audio_class:1;
|
||||||
unsigned int has_alsa_audio:1;
|
unsigned int has_alsa_audio:1;
|
||||||
unsigned int has_12mhz_i2s:1;
|
|
||||||
unsigned int max_range_640_480:1;
|
unsigned int max_range_640_480:1;
|
||||||
unsigned int has_dvb:1;
|
unsigned int has_dvb:1;
|
||||||
unsigned int has_snapshot_button:1;
|
unsigned int has_snapshot_button:1;
|
||||||
unsigned int valid:1; /* report for validated boards */
|
unsigned int valid:1; /* report for validated boards */
|
||||||
|
|
||||||
|
unsigned char xclk, i2c_speed;
|
||||||
|
|
||||||
struct em28xx_IR *ir;
|
struct em28xx_IR *ir;
|
||||||
|
|
||||||
/* Some older em28xx chips needs a waiting time after writing */
|
/* Some older em28xx chips needs a waiting time after writing */
|
||||||
|
Loading…
Reference in New Issue
Block a user