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drm/tegra: sor: Rename tegra_sor_calc_config()

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Use a slightly more sensible name, tegra_sor_compute_config().

Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding 2015-07-21 16:46:52 +02:00
parent 25bb2cec88
commit a198359e39
1 changed files with 6 additions and 7 deletions
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13
drivers/gpu/drm/tegra/sor.c
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@ -586,10 +586,10 @@ static int tegra_sor_compute_params(struct tegra_sor *sor,
return false;
}
static int tegra_sor_calc_config(struct tegra_sor *sor,
const struct drm_display_mode *mode,
struct tegra_sor_config *config,
struct drm_dp_link *link)
static int tegra_sor_compute_config(struct tegra_sor *sor,
const struct drm_display_mode *mode,
struct tegra_sor_config *config,
struct drm_dp_link *link)
{
const u64 f = 100000, link_rate = link->rate * 1000;
const u64 pclk = mode->clock * 1000;
@ -1245,10 +1245,9 @@ static void tegra_sor_edp_enable(struct drm_encoder *encoder)
memset(&config, 0, sizeof(config));
config.bits_per_pixel = output->connector.display_info.bpc * 3;
err = tegra_sor_calc_config(sor, mode, &config, &link);
err = tegra_sor_compute_config(sor, mode, &config, &link);
if (err < 0)
dev_err(sor->dev, "failed to compute link configuration: %d\n",
err);
dev_err(sor->dev, "failed to compute configuration: %d\n", err);
value = tegra_sor_readl(sor, SOR_CLK_CNTRL);
value &= ~SOR_CLK_CNTRL_DP_CLK_SEL_MASK;