forked from Minki/linux
Merge branch 'upstream-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev
* 'upstream-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev: sata_mv: platform driver allocs dma without create pata_ninja32: setup changes pata_legacy: typo fix pata_amd: Note in the module description it handles Nvidia sata_mv: fix loop with last port libata: ignore deverr on SETXFER if mode is configured pata_via: fix SATA cable detection on cx700
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commit
a17b7a398d
@ -3048,6 +3048,8 @@ int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
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static int ata_dev_set_mode(struct ata_device *dev)
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{
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struct ata_eh_context *ehc = &dev->link->eh_context;
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const char *dev_err_whine = "";
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int ign_dev_err = 0;
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unsigned int err_mask;
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int rc;
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@ -3057,41 +3059,57 @@ static int ata_dev_set_mode(struct ata_device *dev)
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err_mask = ata_dev_set_xfermode(dev);
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/* Old CFA may refuse this command, which is just fine */
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if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id))
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err_mask &= ~AC_ERR_DEV;
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/* Some very old devices and some bad newer ones fail any kind of
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SET_XFERMODE request but support PIO0-2 timings and no IORDY */
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if (dev->xfer_shift == ATA_SHIFT_PIO && !ata_id_has_iordy(dev->id) &&
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dev->pio_mode <= XFER_PIO_2)
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err_mask &= ~AC_ERR_DEV;
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/* Early MWDMA devices do DMA but don't allow DMA mode setting.
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Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */
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if (dev->xfer_shift == ATA_SHIFT_MWDMA &&
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dev->dma_mode == XFER_MW_DMA_0 &&
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(dev->id[63] >> 8) & 1)
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err_mask &= ~AC_ERR_DEV;
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if (err_mask) {
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ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
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"(err_mask=0x%x)\n", err_mask);
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return -EIO;
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}
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if (err_mask & ~AC_ERR_DEV)
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goto fail;
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/* revalidate */
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ehc->i.flags |= ATA_EHI_POST_SETMODE;
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rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0);
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ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
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if (rc)
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return rc;
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/* Old CFA may refuse this command, which is just fine */
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if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id))
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ign_dev_err = 1;
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/* Some very old devices and some bad newer ones fail any kind of
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SET_XFERMODE request but support PIO0-2 timings and no IORDY */
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if (dev->xfer_shift == ATA_SHIFT_PIO && !ata_id_has_iordy(dev->id) &&
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dev->pio_mode <= XFER_PIO_2)
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ign_dev_err = 1;
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/* Early MWDMA devices do DMA but don't allow DMA mode setting.
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Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */
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if (dev->xfer_shift == ATA_SHIFT_MWDMA &&
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dev->dma_mode == XFER_MW_DMA_0 &&
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(dev->id[63] >> 8) & 1)
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ign_dev_err = 1;
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/* if the device is actually configured correctly, ignore dev err */
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if (dev->xfer_mode == ata_xfer_mask2mode(ata_id_xfermask(dev->id)))
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ign_dev_err = 1;
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if (err_mask & AC_ERR_DEV) {
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if (!ign_dev_err)
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goto fail;
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else
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dev_err_whine = " (device error ignored)";
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}
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DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
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dev->xfer_shift, (int)dev->xfer_mode);
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ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
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ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
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ata_dev_printk(dev, KERN_INFO, "configured for %s%s\n",
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ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)),
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dev_err_whine);
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return 0;
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fail:
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ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
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"(err_mask=0x%x)\n", err_mask);
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return -EIO;
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}
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/**
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@ -772,7 +772,7 @@ static void __exit amd_exit(void)
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}
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MODULE_AUTHOR("Alan Cox");
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MODULE_DESCRIPTION("low-level driver for AMD PATA IDE");
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MODULE_DESCRIPTION("low-level driver for AMD and Nvidia PATA IDE");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(pci, amd);
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MODULE_VERSION(DRV_VERSION);
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@ -127,7 +127,7 @@ static int opti82c611a; /* Opti82c611A on primary 1, sec 2, both 3 */
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static int opti82c46x; /* Opti 82c465MV present(pri/sec autodetect) */
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static int qdi; /* Set to probe QDI controllers */
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static int winbond; /* Set to probe Winbond controllers,
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give I/O port if non stdanard */
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give I/O port if non standard */
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static int autospeed; /* Chip present which snoops speed changes */
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static int pio_mask = 0x1F; /* PIO range for autospeed devices */
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static int iordy_mask = 0xFFFFFFFF; /* Use iordy if available */
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@ -17,6 +17,7 @@
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* Base + 0x00 IRQ Status
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* Base + 0x01 IRQ control
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* Base + 0x02 Chipset control
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* Base + 0x03 Unknown
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* Base + 0x04 VDMA and reset control + wait bits
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* Base + 0x08 BMIMBA
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* Base + 0x0C DMA Length
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@ -174,8 +175,12 @@ static int ninja32_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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ata_std_ports(&ap->ioaddr);
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iowrite8(0x05, base + 0x01); /* Enable interrupt lines */
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iowrite8(0xB3, base + 0x02); /* Burst, ?? setup */
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iowrite8(0x00, base + 0x04); /* WAIT0 ? */
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iowrite8(0xBE, base + 0x02); /* Burst, ?? setup */
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iowrite8(0x01, base + 0x03); /* Unknown */
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iowrite8(0x20, base + 0x04); /* WAIT0 */
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iowrite8(0x8f, base + 0x05); /* Unknown */
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iowrite8(0xa4, base + 0x1c); /* Unknown */
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iowrite8(0x83, base + 0x1d); /* BMDMA control: WAIT0 */
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/* FIXME: Should we disable them at remove ? */
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return ata_host_activate(host, dev->irq, ata_interrupt,
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IRQF_SHARED, &ninja32_sht);
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@ -84,6 +84,7 @@ enum {
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VIA_BAD_ID = 0x100, /* Has wrong vendor ID (0x1107) */
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VIA_BAD_AST = 0x200, /* Don't touch Address Setup Timing */
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VIA_NO_ENABLES = 0x400, /* Has no enablebits */
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VIA_SATA_PATA = 0x800, /* SATA/PATA combined configuration */
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};
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/*
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@ -100,7 +101,7 @@ static const struct via_isa_bridge {
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{ "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
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{ "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
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{ "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
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{ "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
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{ "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA },
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{ "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES},
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{ "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
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{ "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
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@ -172,6 +173,9 @@ static int via_cable_detect(struct ata_port *ap) {
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if (via_cable_override(pdev))
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return ATA_CBL_PATA40_SHORT;
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if ((config->flags & VIA_SATA_PATA) && ap->port_no == 0)
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return ATA_CBL_SATA;
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/* Early chips are 40 wire */
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if ((config->flags & VIA_UDMA) < VIA_UDMA_66)
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return ATA_CBL_PATA40;
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@ -1716,14 +1716,16 @@ static void mv_host_intr(struct ata_host *host, u32 relevant, unsigned int hc)
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VPRINTK("ENTER, hc%u relevant=0x%08x HC IRQ cause=0x%08x\n",
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hc, relevant, hc_irq_cause);
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for (port = port0; port < port0 + last_port; port++) {
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for (port = port0; port < last_port; port++) {
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struct ata_port *ap = host->ports[port];
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struct mv_port_priv *pp = ap->private_data;
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struct mv_port_priv *pp;
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int have_err_bits, hard_port, shift;
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if ((!ap) || (ap->flags & ATA_FLAG_DISABLED))
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continue;
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pp = ap->private_data;
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shift = port << 1; /* (port * 2) */
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if (port >= MV_PORTS_PER_HC) {
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shift++; /* skip bit 8 in the HC Main IRQ reg */
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@ -2879,6 +2881,26 @@ done:
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return rc;
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}
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static int mv_create_dma_pools(struct mv_host_priv *hpriv, struct device *dev)
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{
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hpriv->crqb_pool = dmam_pool_create("crqb_q", dev, MV_CRQB_Q_SZ,
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MV_CRQB_Q_SZ, 0);
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if (!hpriv->crqb_pool)
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return -ENOMEM;
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hpriv->crpb_pool = dmam_pool_create("crpb_q", dev, MV_CRPB_Q_SZ,
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MV_CRPB_Q_SZ, 0);
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if (!hpriv->crpb_pool)
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return -ENOMEM;
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hpriv->sg_tbl_pool = dmam_pool_create("sg_tbl", dev, MV_SG_TBL_SZ,
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MV_SG_TBL_SZ, 0);
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if (!hpriv->sg_tbl_pool)
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return -ENOMEM;
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return 0;
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}
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/**
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* mv_platform_probe - handle a positive probe of an soc Marvell
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* host
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@ -2932,6 +2954,10 @@ static int mv_platform_probe(struct platform_device *pdev)
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hpriv->base = ioremap(res->start, res->end - res->start + 1);
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hpriv->base -= MV_SATAHC0_REG_BASE;
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rc = mv_create_dma_pools(hpriv, &pdev->dev);
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if (rc)
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return rc;
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/* initialize adapter */
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rc = mv_init_host(host, chip_soc);
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if (rc)
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@ -3068,26 +3094,6 @@ static void mv_print_info(struct ata_host *host)
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scc_s, (MV_HP_FLAG_MSI & hpriv->hp_flags) ? "MSI" : "INTx");
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}
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static int mv_create_dma_pools(struct mv_host_priv *hpriv, struct device *dev)
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{
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hpriv->crqb_pool = dmam_pool_create("crqb_q", dev, MV_CRQB_Q_SZ,
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MV_CRQB_Q_SZ, 0);
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if (!hpriv->crqb_pool)
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return -ENOMEM;
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hpriv->crpb_pool = dmam_pool_create("crpb_q", dev, MV_CRPB_Q_SZ,
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MV_CRPB_Q_SZ, 0);
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if (!hpriv->crpb_pool)
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return -ENOMEM;
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hpriv->sg_tbl_pool = dmam_pool_create("sg_tbl", dev, MV_SG_TBL_SZ,
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MV_SG_TBL_SZ, 0);
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if (!hpriv->sg_tbl_pool)
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return -ENOMEM;
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return 0;
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}
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/**
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* mv_pci_init_one - handle a positive probe of a PCI Marvell host
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* @pdev: PCI device found
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