forked from Minki/linux
Additional 4.5-rc5 fixes
- One fix ocrdma - The new CQ API support was added to ocrdma, but they got the arming logic wrong, so without this, transfers eventually fail when they fail to arm the interrupt properly under load - Two related fixes for mlx4 - When we added the 64bit extended counters support to the core IB code, they forgot to update the RoCE side of the mlx4 driver (the IB side they properly updated). I debated whether or not to include these patches as they could be considered feature enablement patches, but the existing code will blindy copy the 32bit counters, whether any counters were requested at all (a bug). These two patches make it A) check to see that counters were requested and B) copy the right counters (the 64bit support is new, the 32bit is not). For that reason I went ahead and took them. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWxI9xAAoJELgmozMOVy/dqRgP/3JbB5MMcqqrxCXGE7874YOO ZXldH2nJ+uIffWn1IUDJd01vWKDbxBD5joD+HgH1XLjmSQZf7I6APmayTMx43k/k Ps4fg4iDU2HY35w4s8hCgIj1WmKtYWPA2wHFB1VUO8nhLQD0fxCInw3feDhOXu23 VYSBOypHIMHZfldOog/RXQ4/cCStTmhyDlPtcldWTpMm/SmBEs/iGoUXe5gLHZfk aKEK2OOC/Yk/iK4flnYsNcgDhFfTcFlpbUtBfLYvFd9UxBCkPsB7WE5BT06zvEHe Cp5IN7093Nhh66uKyDHyzBJFMrZB3crcqmEGsauE6iBF6iQItlvVMch7DHP4FEWP 2VlYKbhINH7yfl/bXq9CyljA2wcPS5MDtQgrEwa/qMeA8sqEQWnyPgS4xGKnufoQ SbvPY9pdzhU2G6weoRSiVfpMXh2dl/kbOcsn/rywfyrJ4Ne1lE60Di75WEpwxD+I 4cRktAZp5W2gnv9NJRA/iYMQCVxJ9Sd7aj+dFfWOzJf3uuOlvMALTPuWF4zyeT1U VKpptmAmq0l3zVtpnmuVNO4BqC+00L+sojrkeGX9ZhLBaJZfUkj10sjPAWGHNU28 liQ3Wnqb7q5Z7ROBs5bbMub7Q4+hWiEINPQtFm4f43bmievI9QgPjoNQXjXea7vI W9WXEhYS1fjI9z3w4Oqg =QD36 -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dledford/rdma Pull rdma fixes from Doug Ledford: "One ocrdma fix: - The new CQ API support was added to ocrdma, but they got the arming logic wrong, so without this, transfers eventually fail when they fail to arm the interrupt properly under load Two related fixes for mlx4: - When we added the 64bit extended counters support to the core IB code, they forgot to update the RoCE side of the mlx4 driver (the IB side they properly updated). I debated whether or not to include these patches as they could be considered feature enablement patches, but the existing code will blindy copy the 32bit counters, whether any counters were requested at all (a bug). These two patches make it (a) check to see that counters were requested and (b) copy the right counters (the 64bit support is new, the 32bit is not). For that reason I went ahead and took them" * tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dledford/rdma: IB/mlx4: Add support for the port info class for RoCE ports IB/mlx4: Add support for extended counters over RoCE ports RDMA/ocrdma: Fix arm logic to align with new cq API
This commit is contained in:
commit
a16152c897
@ -817,17 +817,48 @@ static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
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return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
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}
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static void edit_counter(struct mlx4_counter *cnt,
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struct ib_pma_portcounters *pma_cnt)
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static void edit_counter(struct mlx4_counter *cnt, void *counters,
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__be16 attr_id)
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{
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ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_data,
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(be64_to_cpu(cnt->tx_bytes) >> 2));
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ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_data,
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(be64_to_cpu(cnt->rx_bytes) >> 2));
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ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_packets,
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be64_to_cpu(cnt->tx_frames));
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ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_packets,
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be64_to_cpu(cnt->rx_frames));
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switch (attr_id) {
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case IB_PMA_PORT_COUNTERS:
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{
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struct ib_pma_portcounters *pma_cnt =
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(struct ib_pma_portcounters *)counters;
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ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_data,
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(be64_to_cpu(cnt->tx_bytes) >> 2));
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ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_data,
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(be64_to_cpu(cnt->rx_bytes) >> 2));
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ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_packets,
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be64_to_cpu(cnt->tx_frames));
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ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_packets,
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be64_to_cpu(cnt->rx_frames));
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break;
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}
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case IB_PMA_PORT_COUNTERS_EXT:
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{
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struct ib_pma_portcounters_ext *pma_cnt_ext =
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(struct ib_pma_portcounters_ext *)counters;
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pma_cnt_ext->port_xmit_data =
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cpu_to_be64(be64_to_cpu(cnt->tx_bytes) >> 2);
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pma_cnt_ext->port_rcv_data =
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cpu_to_be64(be64_to_cpu(cnt->rx_bytes) >> 2);
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pma_cnt_ext->port_xmit_packets = cnt->tx_frames;
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pma_cnt_ext->port_rcv_packets = cnt->rx_frames;
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break;
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}
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}
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}
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static int iboe_process_mad_port_info(void *out_mad)
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{
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struct ib_class_port_info cpi = {};
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cpi.capability_mask = IB_PMA_CLASS_CAP_EXT_WIDTH;
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memcpy(out_mad, &cpi, sizeof(cpi));
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return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
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}
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static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
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@ -842,6 +873,9 @@ static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
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if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_PERF_MGMT)
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return -EINVAL;
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if (in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO)
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return iboe_process_mad_port_info((void *)(out_mad->data + 40));
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memset(&counter_stats, 0, sizeof(counter_stats));
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mutex_lock(&dev->counters_table[port_num - 1].mutex);
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list_for_each_entry(tmp_counter,
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@ -863,7 +897,8 @@ static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
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switch (counter_stats.counter_mode & 0xf) {
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case 0:
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edit_counter(&counter_stats,
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(void *)(out_mad->data + 40));
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(void *)(out_mad->data + 40),
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in_mad->mad_hdr.attr_id);
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err = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
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break;
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default:
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@ -894,8 +929,10 @@ int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
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*/
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if (link == IB_LINK_LAYER_INFINIBAND) {
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if (mlx4_is_slave(dev->dev) &&
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in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT &&
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in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS)
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(in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT &&
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(in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS ||
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in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS_EXT ||
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in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO)))
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return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
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in_grh, in_mad, out_mad);
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@ -323,9 +323,6 @@ struct ocrdma_cq {
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*/
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u32 max_hw_cqe;
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bool phase_change;
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bool deferred_arm, deferred_sol;
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bool first_arm;
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spinlock_t cq_lock ____cacheline_aligned; /* provide synchronization
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* to cq polling
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*/
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@ -1094,7 +1094,6 @@ struct ib_cq *ocrdma_create_cq(struct ib_device *ibdev,
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spin_lock_init(&cq->comp_handler_lock);
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INIT_LIST_HEAD(&cq->sq_head);
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INIT_LIST_HEAD(&cq->rq_head);
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cq->first_arm = true;
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if (ib_ctx) {
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uctx = get_ocrdma_ucontext(ib_ctx);
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@ -2910,12 +2909,9 @@ expand_cqe:
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}
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stop_cqe:
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cq->getp = cur_getp;
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if (cq->deferred_arm || polled_hw_cqes) {
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ocrdma_ring_cq_db(dev, cq->id, cq->deferred_arm,
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cq->deferred_sol, polled_hw_cqes);
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cq->deferred_arm = false;
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cq->deferred_sol = false;
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}
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if (polled_hw_cqes)
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ocrdma_ring_cq_db(dev, cq->id, false, false, polled_hw_cqes);
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return i;
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}
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@ -2999,13 +2995,7 @@ int ocrdma_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags cq_flags)
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if (cq_flags & IB_CQ_SOLICITED)
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sol_needed = true;
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if (cq->first_arm) {
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ocrdma_ring_cq_db(dev, cq_id, arm_needed, sol_needed, 0);
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cq->first_arm = false;
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}
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cq->deferred_arm = true;
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cq->deferred_sol = sol_needed;
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ocrdma_ring_cq_db(dev, cq_id, arm_needed, sol_needed, 0);
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spin_unlock_irqrestore(&cq->cq_lock, flags);
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return 0;
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