forked from Minki/linux
drm/amdgpu/si/dpm: make a bunch of things static
remnants of the port from radeon. Acked-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -91,7 +91,7 @@ union pplib_clock_info {
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struct _ATOM_PPLIB_SI_CLOCK_INFO si;
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};
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const u32 r600_utc[R600_PM_NUMBER_OF_TC] =
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static const u32 r600_utc[R600_PM_NUMBER_OF_TC] =
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{
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R600_UTC_DFLT_00,
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R600_UTC_DFLT_01,
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@ -110,7 +110,7 @@ const u32 r600_utc[R600_PM_NUMBER_OF_TC] =
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R600_UTC_DFLT_14,
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};
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const u32 r600_dtc[R600_PM_NUMBER_OF_TC] =
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static const u32 r600_dtc[R600_PM_NUMBER_OF_TC] =
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{
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R600_DTC_DFLT_00,
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R600_DTC_DFLT_01,
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@ -432,7 +432,7 @@ static const struct si_dte_data dte_data_malta =
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true
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};
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struct si_cac_config_reg cac_weights_pitcairn[] =
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static const struct si_cac_config_reg cac_weights_pitcairn[] =
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{
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{ 0x0, 0x0000ffff, 0, 0x8a, SISLANDS_CACCONFIG_CGIND },
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{ 0x0, 0xffff0000, 16, 0x0, SISLANDS_CACCONFIG_CGIND },
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@ -1188,7 +1188,7 @@ static const struct si_dte_data dte_data_venus_pro =
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true
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};
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struct si_cac_config_reg cac_weights_oland[] =
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static const struct si_cac_config_reg cac_weights_oland[] =
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{
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{ 0x0, 0x0000ffff, 0, 0x82, SISLANDS_CACCONFIG_CGIND },
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{ 0x0, 0xffff0000, 16, 0x4F, SISLANDS_CACCONFIG_CGIND },
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@ -1825,10 +1825,10 @@ static const struct si_powertune_data powertune_data_hainan =
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true
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};
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struct rv7xx_power_info *rv770_get_pi(struct amdgpu_device *adev);
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struct evergreen_power_info *evergreen_get_pi(struct amdgpu_device *adev);
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struct ni_power_info *ni_get_pi(struct amdgpu_device *adev);
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struct si_ps *si_get_ps(struct amdgpu_ps *rps);
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static struct rv7xx_power_info *rv770_get_pi(struct amdgpu_device *adev);
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static struct evergreen_power_info *evergreen_get_pi(struct amdgpu_device *adev);
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static struct ni_power_info *ni_get_pi(struct amdgpu_device *adev);
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static struct si_ps *si_get_ps(struct amdgpu_ps *rps);
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static int si_populate_voltage_value(struct amdgpu_device *adev,
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const struct atom_voltage_table *table,
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@ -1850,8 +1850,6 @@ static void si_fan_ctrl_set_default_mode(struct amdgpu_device *adev);
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static void si_dpm_set_dpm_funcs(struct amdgpu_device *adev);
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static void si_dpm_set_irq_funcs(struct amdgpu_device *adev);
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extern u32 si_pciep_rreg(struct amdgpu_device *adev, u32 reg);
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static struct si_power_info *si_get_pi(struct amdgpu_device *adev)
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{
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struct si_power_info *pi = adev->pm.dpm.priv;
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@ -1954,21 +1952,21 @@ static void si_update_dte_from_pl2(struct amdgpu_device *adev,
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}
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}
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struct rv7xx_power_info *rv770_get_pi(struct amdgpu_device *adev)
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static struct rv7xx_power_info *rv770_get_pi(struct amdgpu_device *adev)
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{
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struct rv7xx_power_info *pi = adev->pm.dpm.priv;
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return pi;
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}
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struct ni_power_info *ni_get_pi(struct amdgpu_device *adev)
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static struct ni_power_info *ni_get_pi(struct amdgpu_device *adev)
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{
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struct ni_power_info *pi = adev->pm.dpm.priv;
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return pi;
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}
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struct si_ps *si_get_ps(struct amdgpu_ps *aps)
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static struct si_ps *si_get_ps(struct amdgpu_ps *aps)
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{
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struct si_ps *ps = aps->ps_priv;
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@ -3257,8 +3255,8 @@ static u32 btc_get_valid_sclk(struct amdgpu_device *adev,
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max_sclk, requested_sclk);
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}
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void btc_get_max_clock_from_voltage_dependency_table(struct amdgpu_clock_voltage_dependency_table *table,
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u32 *max_clock)
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static void btc_get_max_clock_from_voltage_dependency_table(struct amdgpu_clock_voltage_dependency_table *table,
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u32 *max_clock)
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{
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u32 i, clock = 0;
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@ -4308,7 +4306,7 @@ static void si_clear_vc(struct amdgpu_device *adev)
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WREG32(CG_FTV, 0);
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}
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u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock)
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static u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock)
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{
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u8 mc_para_index;
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@ -4321,7 +4319,7 @@ u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock)
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return mc_para_index;
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}
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u8 si_get_mclk_frequency_ratio(u32 memory_clock, bool strobe_mode)
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static u8 si_get_mclk_frequency_ratio(u32 memory_clock, bool strobe_mode)
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{
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u8 mc_para_index;
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@ -7561,7 +7559,7 @@ static int si_dpm_set_interrupt_state(struct amdgpu_device *adev,
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}
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static int si_dpm_process_interrupt(struct amdgpu_device *adev,
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struct amdgpu_irq_src *source,
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struct amdgpu_irq_src *source,
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struct amdgpu_iv_entry *entry)
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{
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bool queue_thermal = false;
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