forked from Minki/linux
drm/i915: fix the wrong latency value while computing wm0
On Ironlake, the LP0 latency is hardcoded and in ns unit, while on Sandybridge, it comes from a register and with unit 0.1 us. So, fix the wrong latency value while computing wm0 on Ironlake and Sandybridge. Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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@ -3418,9 +3418,9 @@ static void i830_update_wm(struct drm_device *dev, int planea_clock, int unused,
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static bool ironlake_compute_wm0(struct drm_device *dev,
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int pipe,
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const struct intel_watermark_params *display,
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int display_latency,
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int display_latency_ns,
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const struct intel_watermark_params *cursor,
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int cursor_latency,
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int cursor_latency_ns,
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int *plane_wm,
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int *cursor_wm)
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{
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@ -3438,7 +3438,7 @@ static bool ironlake_compute_wm0(struct drm_device *dev,
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pixel_size = crtc->fb->bits_per_pixel / 8;
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/* Use the small buffer method to calculate plane watermark */
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entries = ((clock * pixel_size / 1000) * display_latency * 100) / 1000;
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entries = ((clock * pixel_size / 1000) * display_latency_ns) / 1000;
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entries = DIV_ROUND_UP(entries, display->cacheline_size);
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*plane_wm = entries + display->guard_size;
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if (*plane_wm > (int)display->max_wm)
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@ -3446,7 +3446,7 @@ static bool ironlake_compute_wm0(struct drm_device *dev,
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/* Use the large buffer method to calculate cursor watermark */
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line_time_us = ((htotal * 1000) / clock);
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line_count = (cursor_latency * 100 / line_time_us + 1000) / 1000;
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line_count = (cursor_latency_ns / line_time_us + 1000) / 1000;
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entries = line_count * 64 * pixel_size;
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entries = DIV_ROUND_UP(entries, cursor->cacheline_size);
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*cursor_wm = entries + cursor->guard_size;
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@ -3644,7 +3644,7 @@ static void sandybridge_update_wm(struct drm_device *dev,
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int pixel_size)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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int latency = SNB_READ_WM0_LATENCY();
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int latency = SNB_READ_WM0_LATENCY() * 100; /* In unit 0.1us */
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int fbc_wm, plane_wm, cursor_wm, enabled;
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int clock;
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