forked from Minki/linux
drm/sun4i: Add LVDS support
The TCON supports the LVDS interface to output to a panel or a bridge. Let's add support for it. Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/7fbb85f33ee1d5009fde4f0d7d236e11ca58b114.1513854122.git-series.maxime.ripard@free-electrons.com
This commit is contained in:
Maxime Ripard
parent
ec08d5966b
commit
a0c1214e47
@ -15,6 +15,7 @@ sun8i-mixer-y += sun8i_mixer.o sun8i_ui_layer.o \
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sun4i-tcon-y += sun4i_crtc.o
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sun4i-tcon-y += sun4i_dotclock.o
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sun4i-tcon-y += sun4i_lvds.o
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sun4i-tcon-y += sun4i_tcon.o
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sun4i-tcon-y += sun4i_rgb.o
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177
drivers/gpu/drm/sun4i/sun4i_lvds.c
Normal file
177
drivers/gpu/drm/sun4i/sun4i_lvds.c
Normal file
@ -0,0 +1,177 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2017 Free Electrons
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*/
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#include <linux/clk.h>
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#include <drm/drmP.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_of.h>
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#include <drm/drm_panel.h>
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#include "sun4i_crtc.h"
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#include "sun4i_tcon.h"
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#include "sun4i_lvds.h"
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struct sun4i_lvds {
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struct drm_connector connector;
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struct drm_encoder encoder;
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struct sun4i_tcon *tcon;
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};
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static inline struct sun4i_lvds *
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drm_connector_to_sun4i_lvds(struct drm_connector *connector)
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{
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return container_of(connector, struct sun4i_lvds,
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connector);
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}
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static inline struct sun4i_lvds *
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drm_encoder_to_sun4i_lvds(struct drm_encoder *encoder)
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{
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return container_of(encoder, struct sun4i_lvds,
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encoder);
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}
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static int sun4i_lvds_get_modes(struct drm_connector *connector)
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{
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struct sun4i_lvds *lvds =
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drm_connector_to_sun4i_lvds(connector);
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struct sun4i_tcon *tcon = lvds->tcon;
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return drm_panel_get_modes(tcon->panel);
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}
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static struct drm_connector_helper_funcs sun4i_lvds_con_helper_funcs = {
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.get_modes = sun4i_lvds_get_modes,
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};
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static void
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sun4i_lvds_connector_destroy(struct drm_connector *connector)
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{
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struct sun4i_lvds *lvds = drm_connector_to_sun4i_lvds(connector);
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struct sun4i_tcon *tcon = lvds->tcon;
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drm_panel_detach(tcon->panel);
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drm_connector_cleanup(connector);
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}
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static const struct drm_connector_funcs sun4i_lvds_con_funcs = {
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.fill_modes = drm_helper_probe_single_connector_modes,
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.destroy = sun4i_lvds_connector_destroy,
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.reset = drm_atomic_helper_connector_reset,
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.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
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};
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static void sun4i_lvds_encoder_enable(struct drm_encoder *encoder)
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{
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struct sun4i_lvds *lvds = drm_encoder_to_sun4i_lvds(encoder);
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struct sun4i_tcon *tcon = lvds->tcon;
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DRM_DEBUG_DRIVER("Enabling LVDS output\n");
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if (!IS_ERR(tcon->panel)) {
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drm_panel_prepare(tcon->panel);
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drm_panel_enable(tcon->panel);
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}
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}
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static void sun4i_lvds_encoder_disable(struct drm_encoder *encoder)
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{
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struct sun4i_lvds *lvds = drm_encoder_to_sun4i_lvds(encoder);
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struct sun4i_tcon *tcon = lvds->tcon;
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DRM_DEBUG_DRIVER("Disabling LVDS output\n");
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if (!IS_ERR(tcon->panel)) {
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drm_panel_disable(tcon->panel);
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drm_panel_unprepare(tcon->panel);
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}
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}
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static const struct drm_encoder_helper_funcs sun4i_lvds_enc_helper_funcs = {
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.disable = sun4i_lvds_encoder_disable,
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.enable = sun4i_lvds_encoder_enable,
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};
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static const struct drm_encoder_funcs sun4i_lvds_enc_funcs = {
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.destroy = drm_encoder_cleanup,
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};
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int sun4i_lvds_init(struct drm_device *drm, struct sun4i_tcon *tcon)
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{
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struct drm_encoder *encoder;
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struct drm_bridge *bridge;
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struct sun4i_lvds *lvds;
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int ret;
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lvds = devm_kzalloc(drm->dev, sizeof(*lvds), GFP_KERNEL);
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if (!lvds)
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return -ENOMEM;
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lvds->tcon = tcon;
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encoder = &lvds->encoder;
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ret = drm_of_find_panel_or_bridge(tcon->dev->of_node, 1, 0,
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&tcon->panel, &bridge);
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if (ret) {
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dev_info(drm->dev, "No panel or bridge found... LVDS output disabled\n");
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return 0;
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}
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drm_encoder_helper_add(&lvds->encoder,
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&sun4i_lvds_enc_helper_funcs);
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ret = drm_encoder_init(drm,
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&lvds->encoder,
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&sun4i_lvds_enc_funcs,
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DRM_MODE_ENCODER_LVDS,
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NULL);
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if (ret) {
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dev_err(drm->dev, "Couldn't initialise the lvds encoder\n");
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goto err_out;
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}
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/* The LVDS encoder can only work with the TCON channel 0 */
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lvds->encoder.possible_crtcs = BIT(drm_crtc_index(&tcon->crtc->crtc));
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if (tcon->panel) {
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drm_connector_helper_add(&lvds->connector,
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&sun4i_lvds_con_helper_funcs);
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ret = drm_connector_init(drm, &lvds->connector,
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&sun4i_lvds_con_funcs,
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DRM_MODE_CONNECTOR_LVDS);
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if (ret) {
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dev_err(drm->dev, "Couldn't initialise the lvds connector\n");
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goto err_cleanup_connector;
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}
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drm_mode_connector_attach_encoder(&lvds->connector,
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&lvds->encoder);
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ret = drm_panel_attach(tcon->panel, &lvds->connector);
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if (ret) {
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dev_err(drm->dev, "Couldn't attach our panel\n");
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goto err_cleanup_connector;
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}
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}
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if (bridge) {
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ret = drm_bridge_attach(encoder, bridge, NULL);
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if (ret) {
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dev_err(drm->dev, "Couldn't attach our bridge\n");
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goto err_cleanup_connector;
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}
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}
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return 0;
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err_cleanup_connector:
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drm_encoder_cleanup(&lvds->encoder);
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err_out:
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return ret;
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}
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EXPORT_SYMBOL(sun4i_lvds_init);
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12
drivers/gpu/drm/sun4i/sun4i_lvds.h
Normal file
12
drivers/gpu/drm/sun4i/sun4i_lvds.h
Normal file
@ -0,0 +1,12 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2017 Free Electrons
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*/
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#ifndef _SUN4I_LVDS_H_
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#define _SUN4I_LVDS_H_
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int sun4i_lvds_init(struct drm_device *drm, struct sun4i_tcon *tcon);
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#endif /* _SUN4I_LVDS_H_ */
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@ -31,10 +31,52 @@
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#include "sun4i_crtc.h"
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#include "sun4i_dotclock.h"
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#include "sun4i_drv.h"
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#include "sun4i_lvds.h"
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#include "sun4i_rgb.h"
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#include "sun4i_tcon.h"
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#include "sunxi_engine.h"
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static struct drm_connector *sun4i_tcon_get_connector(const struct drm_encoder *encoder)
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{
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struct drm_connector *connector;
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struct drm_connector_list_iter iter;
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drm_connector_list_iter_begin(encoder->dev, &iter);
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drm_for_each_connector_iter(connector, &iter)
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if (connector->encoder == encoder) {
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drm_connector_list_iter_end(&iter);
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return connector;
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}
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drm_connector_list_iter_end(&iter);
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return NULL;
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}
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static int sun4i_tcon_get_pixel_depth(const struct drm_encoder *encoder)
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{
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struct drm_connector *connector;
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struct drm_display_info *info;
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connector = sun4i_tcon_get_connector(encoder);
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if (!connector)
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return -EINVAL;
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info = &connector->display_info;
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if (info->num_bus_formats != 1)
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return -EINVAL;
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switch (info->bus_formats[0]) {
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case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
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return 18;
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case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
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case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
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return 24;
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}
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return -EINVAL;
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}
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static void sun4i_tcon_channel_set_status(struct sun4i_tcon *tcon, int channel,
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bool enabled)
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{
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@ -65,13 +107,63 @@ static void sun4i_tcon_channel_set_status(struct sun4i_tcon *tcon, int channel,
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clk_disable_unprepare(clk);
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}
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static void sun4i_tcon_lvds_set_status(struct sun4i_tcon *tcon,
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const struct drm_encoder *encoder,
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bool enabled)
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{
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if (enabled) {
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u8 val;
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regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_IF_REG,
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SUN4I_TCON0_LVDS_IF_EN,
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SUN4I_TCON0_LVDS_IF_EN);
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/*
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* As their name suggest, these values only apply to the A31
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* and later SoCs. We'll have to rework this when merging
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* support for the older SoCs.
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*/
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regmap_write(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
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SUN6I_TCON0_LVDS_ANA0_C(2) |
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SUN6I_TCON0_LVDS_ANA0_V(3) |
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SUN6I_TCON0_LVDS_ANA0_PD(2) |
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SUN6I_TCON0_LVDS_ANA0_EN_LDO);
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udelay(2);
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regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
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SUN6I_TCON0_LVDS_ANA0_EN_MB,
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SUN6I_TCON0_LVDS_ANA0_EN_MB);
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udelay(2);
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regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
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SUN6I_TCON0_LVDS_ANA0_EN_DRVC,
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SUN6I_TCON0_LVDS_ANA0_EN_DRVC);
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if (sun4i_tcon_get_pixel_depth(encoder) == 18)
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val = 7;
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else
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val = 0xf;
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regmap_write_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
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SUN6I_TCON0_LVDS_ANA0_EN_DRVD(0xf),
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SUN6I_TCON0_LVDS_ANA0_EN_DRVD(val));
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} else {
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regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_IF_REG,
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SUN4I_TCON0_LVDS_IF_EN, 0);
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}
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}
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void sun4i_tcon_set_status(struct sun4i_tcon *tcon,
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const struct drm_encoder *encoder,
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bool enabled)
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{
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bool is_lvds = false;
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int channel;
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switch (encoder->encoder_type) {
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case DRM_MODE_ENCODER_LVDS:
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is_lvds = true;
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/* Fallthrough */
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case DRM_MODE_ENCODER_NONE:
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channel = 0;
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break;
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@ -84,10 +176,16 @@ void sun4i_tcon_set_status(struct sun4i_tcon *tcon,
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return;
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}
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if (is_lvds && !enabled)
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sun4i_tcon_lvds_set_status(tcon, encoder, false);
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regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG,
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SUN4I_TCON_GCTL_TCON_ENABLE,
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enabled ? SUN4I_TCON_GCTL_TCON_ENABLE : 0);
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if (is_lvds && enabled)
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sun4i_tcon_lvds_set_status(tcon, encoder, true);
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sun4i_tcon_channel_set_status(tcon, channel, enabled);
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}
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@ -170,6 +268,75 @@ static void sun4i_tcon0_mode_set_common(struct sun4i_tcon *tcon,
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SUN4I_TCON0_BASIC0_Y(mode->crtc_vdisplay));
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}
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static void sun4i_tcon0_mode_set_lvds(struct sun4i_tcon *tcon,
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const struct drm_encoder *encoder,
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const struct drm_display_mode *mode)
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{
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unsigned int bp;
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u8 clk_delay;
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u32 reg, val = 0;
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tcon->dclk_min_div = 7;
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tcon->dclk_max_div = 7;
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sun4i_tcon0_mode_set_common(tcon, mode);
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/* Adjust clock delay */
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clk_delay = sun4i_tcon_get_clk_delay(mode, 0);
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regmap_update_bits(tcon->regs, SUN4I_TCON0_CTL_REG,
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SUN4I_TCON0_CTL_CLK_DELAY_MASK,
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SUN4I_TCON0_CTL_CLK_DELAY(clk_delay));
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/*
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* This is called a backporch in the register documentation,
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* but it really is the back porch + hsync
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*/
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bp = mode->crtc_htotal - mode->crtc_hsync_start;
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DRM_DEBUG_DRIVER("Setting horizontal total %d, backporch %d\n",
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mode->crtc_htotal, bp);
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/* Set horizontal display timings */
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regmap_write(tcon->regs, SUN4I_TCON0_BASIC1_REG,
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SUN4I_TCON0_BASIC1_H_TOTAL(mode->htotal) |
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SUN4I_TCON0_BASIC1_H_BACKPORCH(bp));
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/*
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* This is called a backporch in the register documentation,
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* but it really is the back porch + hsync
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*/
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bp = mode->crtc_vtotal - mode->crtc_vsync_start;
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DRM_DEBUG_DRIVER("Setting vertical total %d, backporch %d\n",
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mode->crtc_vtotal, bp);
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/* Set vertical display timings */
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regmap_write(tcon->regs, SUN4I_TCON0_BASIC2_REG,
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SUN4I_TCON0_BASIC2_V_TOTAL(mode->crtc_vtotal * 2) |
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SUN4I_TCON0_BASIC2_V_BACKPORCH(bp));
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reg = SUN4I_TCON0_LVDS_IF_CLK_SEL_TCON0 |
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SUN4I_TCON0_LVDS_IF_DATA_POL_NORMAL |
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SUN4I_TCON0_LVDS_IF_CLK_POL_NORMAL;
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if (sun4i_tcon_get_pixel_depth(encoder) == 24)
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reg |= SUN4I_TCON0_LVDS_IF_BITWIDTH_24BITS;
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else
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reg |= SUN4I_TCON0_LVDS_IF_BITWIDTH_18BITS;
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regmap_write(tcon->regs, SUN4I_TCON0_LVDS_IF_REG, reg);
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/* Setup the polarity of the various signals */
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if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
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val |= SUN4I_TCON0_IO_POL_HSYNC_POSITIVE;
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if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
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val |= SUN4I_TCON0_IO_POL_VSYNC_POSITIVE;
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regmap_write(tcon->regs, SUN4I_TCON0_IO_POL_REG, val);
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/* Map output pins to channel 0 */
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regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG,
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SUN4I_TCON_GCTL_IOMAP_MASK,
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SUN4I_TCON_GCTL_IOMAP_TCON0);
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}
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static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon,
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const struct drm_display_mode *mode)
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{
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@ -336,6 +503,9 @@ void sun4i_tcon_mode_set(struct sun4i_tcon *tcon,
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const struct drm_display_mode *mode)
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{
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switch (encoder->encoder_type) {
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case DRM_MODE_ENCODER_LVDS:
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sun4i_tcon0_mode_set_lvds(tcon, encoder, mode);
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break;
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case DRM_MODE_ENCODER_NONE:
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sun4i_tcon0_mode_set_rgb(tcon, mode);
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sun4i_tcon_set_mux(tcon, 0, encoder);
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@ -667,7 +837,9 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
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struct drm_device *drm = data;
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struct sun4i_drv *drv = drm->dev_private;
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struct sunxi_engine *engine;
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struct device_node *remote;
|
||||
struct sun4i_tcon *tcon;
|
||||
bool has_lvds_rst, has_lvds_alt, can_lvds;
|
||||
int ret;
|
||||
|
||||
engine = sun4i_tcon_find_engine(drv, dev->of_node);
|
||||
@ -698,6 +870,54 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* This can only be made optional since we've had DT nodes
|
||||
* without the LVDS reset properties.
|
||||
*
|
||||
* If the property is missing, just disable LVDS, and print a
|
||||
* warning.
|
||||
*/
|
||||
tcon->lvds_rst = devm_reset_control_get_optional(dev, "lvds");
|
||||
if (IS_ERR(tcon->lvds_rst)) {
|
||||
dev_err(dev, "Couldn't get our reset line\n");
|
||||
return PTR_ERR(tcon->lvds_rst);
|
||||
} else if (tcon->lvds_rst) {
|
||||
has_lvds_rst = true;
|
||||
reset_control_reset(tcon->lvds_rst);
|
||||
} else {
|
||||
has_lvds_rst = false;
|
||||
}
|
||||
|
||||
/*
|
||||
* This can only be made optional since we've had DT nodes
|
||||
* without the LVDS reset properties.
|
||||
*
|
||||
* If the property is missing, just disable LVDS, and print a
|
||||
* warning.
|
||||
*/
|
||||
if (tcon->quirks->has_lvds_alt) {
|
||||
tcon->lvds_pll = devm_clk_get(dev, "lvds-alt");
|
||||
if (IS_ERR(tcon->lvds_pll)) {
|
||||
if (PTR_ERR(tcon->lvds_pll) == -ENOENT) {
|
||||
has_lvds_alt = false;
|
||||
} else {
|
||||
dev_err(dev, "Couldn't get the LVDS PLL\n");
|
||||
return PTR_ERR(tcon->lvds_rst);
|
||||
}
|
||||
} else {
|
||||
has_lvds_alt = true;
|
||||
}
|
||||
}
|
||||
|
||||
if (!has_lvds_rst || (tcon->quirks->has_lvds_alt && !has_lvds_alt)) {
|
||||
dev_warn(dev,
|
||||
"Missing LVDS properties, Please upgrade your DT\n");
|
||||
dev_warn(dev, "LVDS output disabled\n");
|
||||
can_lvds = false;
|
||||
} else {
|
||||
can_lvds = true;
|
||||
}
|
||||
|
||||
ret = sun4i_tcon_init_clocks(dev, tcon);
|
||||
if (ret) {
|
||||
dev_err(dev, "Couldn't init our TCON clocks\n");
|
||||
@ -729,7 +949,21 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
|
||||
goto err_free_clocks;
|
||||
}
|
||||
|
||||
ret = sun4i_rgb_init(drm, tcon);
|
||||
/*
|
||||
* If we have an LVDS panel connected to the TCON, we should
|
||||
* just probe the LVDS connector. Otherwise, just probe RGB as
|
||||
* we used to.
|
||||
*/
|
||||
remote = of_graph_get_remote_node(dev->of_node, 1, 0);
|
||||
if (of_device_is_compatible(remote, "panel-lvds"))
|
||||
if (can_lvds)
|
||||
ret = sun4i_lvds_init(drm, tcon);
|
||||
else
|
||||
ret = -EINVAL;
|
||||
else
|
||||
ret = sun4i_rgb_init(drm, tcon);
|
||||
of_node_put(remote);
|
||||
|
||||
if (ret < 0)
|
||||
goto err_free_clocks;
|
||||
|
||||
@ -879,6 +1113,7 @@ static const struct sun4i_tcon_quirks sun5i_a13_quirks = {
|
||||
|
||||
static const struct sun4i_tcon_quirks sun6i_a31_quirks = {
|
||||
.has_channel_1 = true,
|
||||
.has_lvds_alt = true,
|
||||
.needs_de_be_mux = true,
|
||||
.set_mux = sun6i_tcon_set_mux,
|
||||
};
|
||||
@ -895,7 +1130,7 @@ static const struct sun4i_tcon_quirks sun7i_a20_quirks = {
|
||||
};
|
||||
|
||||
static const struct sun4i_tcon_quirks sun8i_a33_quirks = {
|
||||
/* nothing is supported */
|
||||
.has_lvds_alt = true,
|
||||
};
|
||||
|
||||
static const struct sun4i_tcon_quirks sun8i_v3s_quirks = {
|
||||
|
||||
@ -70,7 +70,21 @@
|
||||
#define SUN4I_TCON0_TTL2_REG 0x78
|
||||
#define SUN4I_TCON0_TTL3_REG 0x7c
|
||||
#define SUN4I_TCON0_TTL4_REG 0x80
|
||||
|
||||
#define SUN4I_TCON0_LVDS_IF_REG 0x84
|
||||
#define SUN4I_TCON0_LVDS_IF_EN BIT(31)
|
||||
#define SUN4I_TCON0_LVDS_IF_BITWIDTH_MASK BIT(26)
|
||||
#define SUN4I_TCON0_LVDS_IF_BITWIDTH_18BITS (1 << 26)
|
||||
#define SUN4I_TCON0_LVDS_IF_BITWIDTH_24BITS (0 << 26)
|
||||
#define SUN4I_TCON0_LVDS_IF_CLK_SEL_MASK BIT(20)
|
||||
#define SUN4I_TCON0_LVDS_IF_CLK_SEL_TCON0 (1 << 20)
|
||||
#define SUN4I_TCON0_LVDS_IF_CLK_POL_MASK BIT(4)
|
||||
#define SUN4I_TCON0_LVDS_IF_CLK_POL_NORMAL (1 << 4)
|
||||
#define SUN4I_TCON0_LVDS_IF_CLK_POL_INV (0 << 4)
|
||||
#define SUN4I_TCON0_LVDS_IF_DATA_POL_MASK GENMASK(3, 0)
|
||||
#define SUN4I_TCON0_LVDS_IF_DATA_POL_NORMAL (0xf)
|
||||
#define SUN4I_TCON0_LVDS_IF_DATA_POL_INV (0)
|
||||
|
||||
#define SUN4I_TCON0_IO_POL_REG 0x88
|
||||
#define SUN4I_TCON0_IO_POL_DCLK_PHASE(phase) ((phase & 3) << 28)
|
||||
#define SUN4I_TCON0_IO_POL_HSYNC_POSITIVE BIT(25)
|
||||
@ -131,6 +145,16 @@
|
||||
#define SUN4I_TCON_CEU_RANGE_G_REG 0x144
|
||||
#define SUN4I_TCON_CEU_RANGE_B_REG 0x148
|
||||
#define SUN4I_TCON_MUX_CTRL_REG 0x200
|
||||
|
||||
#define SUN4I_TCON0_LVDS_ANA0_REG 0x220
|
||||
#define SUN6I_TCON0_LVDS_ANA0_EN_MB BIT(31)
|
||||
#define SUN6I_TCON0_LVDS_ANA0_EN_LDO BIT(30)
|
||||
#define SUN6I_TCON0_LVDS_ANA0_EN_DRVC BIT(24)
|
||||
#define SUN6I_TCON0_LVDS_ANA0_EN_DRVD(x) (((x) & 0xf) << 20)
|
||||
#define SUN6I_TCON0_LVDS_ANA0_C(x) (((x) & 3) << 17)
|
||||
#define SUN6I_TCON0_LVDS_ANA0_V(x) (((x) & 3) << 8)
|
||||
#define SUN6I_TCON0_LVDS_ANA0_PD(x) (((x) & 3) << 4)
|
||||
|
||||
#define SUN4I_TCON1_FILL_CTL_REG 0x300
|
||||
#define SUN4I_TCON1_FILL_BEG0_REG 0x304
|
||||
#define SUN4I_TCON1_FILL_END0_REG 0x308
|
||||
@ -149,6 +173,7 @@ struct sun4i_tcon;
|
||||
|
||||
struct sun4i_tcon_quirks {
|
||||
bool has_channel_1; /* a33 does not have channel 1 */
|
||||
bool has_lvds_alt; /* Does the LVDS clock have a parent other than the TCON clock? */
|
||||
bool needs_de_be_mux; /* sun6i needs mux to select backend */
|
||||
|
||||
/* callback to handle tcon muxing options */
|
||||
@ -167,6 +192,9 @@ struct sun4i_tcon {
|
||||
struct clk *sclk0;
|
||||
struct clk *sclk1;
|
||||
|
||||
/* Possible mux for the LVDS clock */
|
||||
struct clk *lvds_pll;
|
||||
|
||||
/* Pixel clock */
|
||||
struct clk *dclk;
|
||||
u8 dclk_max_div;
|
||||
@ -174,6 +202,7 @@ struct sun4i_tcon {
|
||||
|
||||
/* Reset control */
|
||||
struct reset_control *lcd_rst;
|
||||
struct reset_control *lvds_rst;
|
||||
|
||||
struct drm_panel *panel;
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user