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drm/amd/powerplay: fix memory leak in smu7_hwmgr

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add pp_smu7_thermal_fini function to free related
data when smu7_hwmgr_fini.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Rex Zhu 2016-12-28 20:15:45 +08:00 committed by Alex Deucher
parent cd576e63d2
commit a0aa70463e
5 changed files with 25 additions and 19 deletions
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15
drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
View File

@ -625,21 +625,6 @@ int phm_initializa_dynamic_state_adjustment_rule_settings(struct pp_hwmgr *hwmgr
return 0;
}
int phm_hwmgr_backend_fini(struct pp_hwmgr *hwmgr)
{
if (NULL != hwmgr->dyn_state.vddc_dep_on_dal_pwrl) {
kfree(hwmgr->dyn_state.vddc_dep_on_dal_pwrl);
hwmgr->dyn_state.vddc_dep_on_dal_pwrl = NULL;
}
if (NULL != hwmgr->backend) {
kfree(hwmgr->backend);
hwmgr->backend = NULL;
}
return 0;
}
uint32_t phm_get_lowest_enabled_level(struct pp_hwmgr *hwmgr, uint32_t mask)
{
uint32_t level = 0;

21
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
View File

@ -2269,6 +2269,21 @@ static int smu7_set_private_data_based_on_pptable_v0(struct pp_hwmgr *hwmgr)
return 0;
}
static int smu7_hwmgr_backend_fini(struct pp_hwmgr *hwmgr)
{
if (NULL != hwmgr->dyn_state.vddc_dep_on_dal_pwrl) {
kfree(hwmgr->dyn_state.vddc_dep_on_dal_pwrl);
hwmgr->dyn_state.vddc_dep_on_dal_pwrl = NULL;
}
pp_smu7_thermal_fini(hwmgr);
if (NULL != hwmgr->backend) {
kfree(hwmgr->backend);
hwmgr->backend = NULL;
}
return 0;
}
static int smu7_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
{
struct smu7_hwmgr *data;
@ -2279,6 +2294,7 @@ static int smu7_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
return -ENOMEM;
hwmgr->backend = data;
pp_smu7_thermal_initialize(hwmgr);
smu7_patch_voltage_workaround(hwmgr);
smu7_init_dpm_defaults(hwmgr);
@ -2336,7 +2352,7 @@ static int smu7_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
smu7_thermal_parameter_init(hwmgr);
} else {
/* Ignore return value in here, we are cleaning up a mess. */
phm_hwmgr_backend_fini(hwmgr);
smu7_hwmgr_backend_fini(hwmgr);
}
return 0;
@ -4355,7 +4371,7 @@ static int smu7_release_firmware(struct pp_hwmgr *hwmgr)
static const struct pp_hwmgr_func smu7_hwmgr_funcs = {
.backend_init = &smu7_hwmgr_backend_init,
.backend_fini = &phm_hwmgr_backend_fini,
.backend_fini = &smu7_hwmgr_backend_fini,
.asic_setup = &smu7_setup_asic_task,
.dynamic_state_management_enable = &smu7_enable_dpm_tasks,
.apply_state_adjust_rules = smu7_apply_state_adjust_rules,
@ -4431,7 +4447,6 @@ int smu7_hwmgr_init(struct pp_hwmgr *hwmgr)
else if (hwmgr->pp_table_version == PP_TABLE_V1)
hwmgr->pptable_func = &pptable_v1_0_funcs;
pp_smu7_thermal_initialize(hwmgr);
return ret;
}

6
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_thermal.c
View File

@ -575,3 +575,9 @@ int pp_smu7_thermal_initialize(struct pp_hwmgr *hwmgr)
return result;
}
void pp_smu7_thermal_fini(struct pp_hwmgr *hwmgr)
{
phm_destroy_table(hwmgr, &(hwmgr->set_temperature_range));
phm_destroy_table(hwmgr, &(hwmgr->start_thermal_controller));
return;
}

1
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_thermal.h
View File

@ -47,6 +47,7 @@ extern int smu7_fan_ctrl_set_static_mode(struct pp_hwmgr *hwmgr, uint32_t mode);
extern int smu7_fan_ctrl_set_fan_speed_percent(struct pp_hwmgr *hwmgr, uint32_t speed);
extern int smu7_fan_ctrl_reset_fan_speed_to_default(struct pp_hwmgr *hwmgr);
extern int pp_smu7_thermal_initialize(struct pp_hwmgr *hwmgr);
extern void pp_smu7_thermal_fini(struct pp_hwmgr *hwmgr);
extern int smu7_thermal_ctrl_uninitialize_thermal_controller(struct pp_hwmgr *hwmgr);
extern int smu7_fan_ctrl_set_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t speed);
extern int smu7_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t *speed);

1
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
View File

@ -685,7 +685,6 @@ extern int phm_find_boot_level(void *table, uint32_t value, uint32_t *boot_level
extern int phm_get_sclk_for_voltage_evv(struct pp_hwmgr *hwmgr, phm_ppt_v1_voltage_lookup_table *lookup_table,
uint16_t virtual_voltage_id, int32_t *sclk);
extern int phm_initializa_dynamic_state_adjustment_rule_settings(struct pp_hwmgr *hwmgr);
extern int phm_hwmgr_backend_fini(struct pp_hwmgr *hwmgr);
extern uint32_t phm_get_lowest_enabled_level(struct pp_hwmgr *hwmgr, uint32_t mask);
extern void phm_apply_dal_min_voltage_request(struct pp_hwmgr *hwmgr);