forked from Minki/linux
net: dsa: mv88e6xxx: abstract REG_GLOBAL2
Similarly to the ports, phys, and Global SMI devices, abstract the SMI device address of the Global 2 registers in a few g2 static helpers. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Vivien Didelot
David S. Miller
parent
a935c0523c
commit
9fe850fb21
@ -14,6 +14,28 @@
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#include "mv88e6xxx.h"
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#include "global2.h"
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#define ADDR_GLOBAL2 0x1c
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static int mv88e6xxx_g2_read(struct mv88e6xxx_chip *chip, int reg, u16 *val)
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{
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return mv88e6xxx_read(chip, ADDR_GLOBAL2, reg, val);
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}
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static int mv88e6xxx_g2_write(struct mv88e6xxx_chip *chip, int reg, u16 val)
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{
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return mv88e6xxx_write(chip, ADDR_GLOBAL2, reg, val);
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}
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static int mv88e6xxx_g2_update(struct mv88e6xxx_chip *chip, int reg, u16 update)
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{
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return mv88e6xxx_update(chip, ADDR_GLOBAL2, reg, update);
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}
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static int mv88e6xxx_g2_wait(struct mv88e6xxx_chip *chip, int reg, u16 mask)
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{
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return mv88e6xxx_wait(chip, ADDR_GLOBAL2, reg, mask);
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}
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/* Offset 0x06: Device Mapping Table register */
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static int mv88e6xxx_g2_device_mapping_write(struct mv88e6xxx_chip *chip,
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@ -21,7 +43,7 @@ static int mv88e6xxx_g2_device_mapping_write(struct mv88e6xxx_chip *chip,
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{
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u16 val = (target << 8) | (port & 0xf);
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return mv88e6xxx_update(chip, REG_GLOBAL2, GLOBAL2_DEVICE_MAPPING, val);
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return mv88e6xxx_g2_update(chip, GLOBAL2_DEVICE_MAPPING, val);
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}
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static int mv88e6xxx_g2_set_device_mapping(struct mv88e6xxx_chip *chip)
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@ -58,7 +80,7 @@ static int mv88e6xxx_g2_trunk_mask_write(struct mv88e6xxx_chip *chip, int num,
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if (hask)
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val |= GLOBAL2_TRUNK_MASK_HASK;
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return mv88e6xxx_update(chip, REG_GLOBAL2, GLOBAL2_TRUNK_MASK, val);
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return mv88e6xxx_g2_update(chip, GLOBAL2_TRUNK_MASK, val);
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}
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/* Offset 0x08: Trunk Mapping Table register */
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@ -69,7 +91,7 @@ static int mv88e6xxx_g2_trunk_mapping_write(struct mv88e6xxx_chip *chip, int id,
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const u16 port_mask = BIT(chip->info->num_ports) - 1;
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u16 val = (id << 11) | (map & port_mask);
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return mv88e6xxx_update(chip, REG_GLOBAL2, GLOBAL2_TRUNK_MAPPING, val);
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return mv88e6xxx_g2_update(chip, GLOBAL2_TRUNK_MAPPING, val);
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}
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static int mv88e6xxx_g2_clear_trunk(struct mv88e6xxx_chip *chip)
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@ -105,15 +127,15 @@ static int mv88e6xxx_g2_clear_irl(struct mv88e6xxx_chip *chip)
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/* Init all Ingress Rate Limit resources of all ports */
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for (port = 0; port < chip->info->num_ports; ++port) {
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/* XXX newer chips (like 88E6390) have different 2-bit ops */
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err = mv88e6xxx_write(chip, REG_GLOBAL2, GLOBAL2_IRL_CMD,
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GLOBAL2_IRL_CMD_OP_INIT_ALL |
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(port << 8));
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err = mv88e6xxx_g2_write(chip, GLOBAL2_IRL_CMD,
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GLOBAL2_IRL_CMD_OP_INIT_ALL |
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(port << 8));
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if (err)
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break;
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/* Wait for the operation to complete */
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err = mv88e6xxx_wait(chip, REG_GLOBAL2, GLOBAL2_IRL_CMD,
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GLOBAL2_IRL_CMD_BUSY);
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err = mv88e6xxx_g2_wait(chip, GLOBAL2_IRL_CMD,
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GLOBAL2_IRL_CMD_BUSY);
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if (err)
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break;
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}
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@ -128,7 +150,7 @@ static int mv88e6xxx_g2_switch_mac_write(struct mv88e6xxx_chip *chip,
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{
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u16 val = (pointer << 8) | data;
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return mv88e6xxx_update(chip, REG_GLOBAL2, GLOBAL2_SWITCH_MAC, val);
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return mv88e6xxx_g2_update(chip, GLOBAL2_SWITCH_MAC, val);
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}
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int mv88e6xxx_g2_set_switch_mac(struct mv88e6xxx_chip *chip, u8 *addr)
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@ -151,7 +173,7 @@ static int mv88e6xxx_g2_pot_write(struct mv88e6xxx_chip *chip, int pointer,
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{
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u16 val = (pointer << 8) | (data & 0x7);
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return mv88e6xxx_update(chip, REG_GLOBAL2, GLOBAL2_PRIO_OVERRIDE, val);
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return mv88e6xxx_g2_update(chip, GLOBAL2_PRIO_OVERRIDE, val);
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}
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static int mv88e6xxx_g2_clear_pot(struct mv88e6xxx_chip *chip)
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@ -174,16 +196,16 @@ static int mv88e6xxx_g2_clear_pot(struct mv88e6xxx_chip *chip)
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static int mv88e6xxx_g2_eeprom_wait(struct mv88e6xxx_chip *chip)
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{
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return mv88e6xxx_wait(chip, REG_GLOBAL2, GLOBAL2_EEPROM_CMD,
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GLOBAL2_EEPROM_CMD_BUSY |
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GLOBAL2_EEPROM_CMD_RUNNING);
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return mv88e6xxx_g2_wait(chip, GLOBAL2_EEPROM_CMD,
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GLOBAL2_EEPROM_CMD_BUSY |
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GLOBAL2_EEPROM_CMD_RUNNING);
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}
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static int mv88e6xxx_g2_eeprom_cmd(struct mv88e6xxx_chip *chip, u16 cmd)
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{
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int err;
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err = mv88e6xxx_write(chip, REG_GLOBAL2, GLOBAL2_EEPROM_CMD, cmd);
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err = mv88e6xxx_g2_write(chip, GLOBAL2_EEPROM_CMD, cmd);
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if (err)
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return err;
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@ -204,7 +226,7 @@ static int mv88e6xxx_g2_eeprom_read16(struct mv88e6xxx_chip *chip,
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if (err)
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return err;
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return mv88e6xxx_read(chip, REG_GLOBAL2, GLOBAL2_EEPROM_DATA, data);
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return mv88e6xxx_g2_read(chip, GLOBAL2_EEPROM_DATA, data);
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}
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static int mv88e6xxx_g2_eeprom_write16(struct mv88e6xxx_chip *chip,
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@ -217,7 +239,7 @@ static int mv88e6xxx_g2_eeprom_write16(struct mv88e6xxx_chip *chip,
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if (err)
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return err;
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err = mv88e6xxx_write(chip, REG_GLOBAL2, GLOBAL2_EEPROM_DATA, data);
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err = mv88e6xxx_g2_write(chip, GLOBAL2_EEPROM_DATA, data);
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if (err)
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return err;
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@ -283,7 +305,7 @@ int mv88e6xxx_g2_set_eeprom16(struct mv88e6xxx_chip *chip,
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int err;
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/* Ensure the RO WriteEn bit is set */
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err = mv88e6xxx_read(chip, REG_GLOBAL2, GLOBAL2_EEPROM_CMD, &val);
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err = mv88e6xxx_g2_read(chip, GLOBAL2_EEPROM_CMD, &val);
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if (err)
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return err;
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@ -346,15 +368,15 @@ int mv88e6xxx_g2_set_eeprom16(struct mv88e6xxx_chip *chip,
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static int mv88e6xxx_g2_smi_phy_wait(struct mv88e6xxx_chip *chip)
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{
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return mv88e6xxx_wait(chip, REG_GLOBAL2, GLOBAL2_SMI_PHY_CMD,
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GLOBAL2_SMI_PHY_CMD_BUSY);
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return mv88e6xxx_g2_wait(chip, GLOBAL2_SMI_PHY_CMD,
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GLOBAL2_SMI_PHY_CMD_BUSY);
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}
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static int mv88e6xxx_g2_smi_phy_cmd(struct mv88e6xxx_chip *chip, u16 cmd)
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{
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int err;
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err = mv88e6xxx_write(chip, REG_GLOBAL2, GLOBAL2_SMI_PHY_CMD, cmd);
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err = mv88e6xxx_g2_write(chip, GLOBAL2_SMI_PHY_CMD, cmd);
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if (err)
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return err;
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@ -375,7 +397,7 @@ int mv88e6xxx_g2_smi_phy_read(struct mv88e6xxx_chip *chip, int addr, int reg,
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if (err)
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return err;
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return mv88e6xxx_read(chip, REG_GLOBAL2, GLOBAL2_SMI_PHY_DATA, val);
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return mv88e6xxx_g2_read(chip, GLOBAL2_SMI_PHY_DATA, val);
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}
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int mv88e6xxx_g2_smi_phy_write(struct mv88e6xxx_chip *chip, int addr, int reg,
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@ -388,7 +410,7 @@ int mv88e6xxx_g2_smi_phy_write(struct mv88e6xxx_chip *chip, int addr, int reg,
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if (err)
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return err;
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err = mv88e6xxx_write(chip, REG_GLOBAL2, GLOBAL2_SMI_PHY_DATA, val);
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err = mv88e6xxx_g2_write(chip, GLOBAL2_SMI_PHY_DATA, val);
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if (err)
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return err;
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@ -404,8 +426,7 @@ int mv88e6xxx_g2_setup(struct mv88e6xxx_chip *chip)
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/* Consider the frames with reserved multicast destination
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* addresses matching 01:80:c2:00:00:2x as MGMT.
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*/
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err = mv88e6xxx_write(chip, REG_GLOBAL2, GLOBAL2_MGMT_EN_2X,
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0xffff);
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err = mv88e6xxx_g2_write(chip, GLOBAL2_MGMT_EN_2X, 0xffff);
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if (err)
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return err;
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}
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@ -414,8 +435,7 @@ int mv88e6xxx_g2_setup(struct mv88e6xxx_chip *chip)
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/* Consider the frames with reserved multicast destination
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* addresses matching 01:80:c2:00:00:0x as MGMT.
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*/
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err = mv88e6xxx_write(chip, REG_GLOBAL2, GLOBAL2_MGMT_EN_0X,
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0xffff);
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err = mv88e6xxx_g2_write(chip, GLOBAL2_MGMT_EN_0X, 0xffff);
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if (err)
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return err;
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}
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@ -429,7 +449,7 @@ int mv88e6xxx_g2_setup(struct mv88e6xxx_chip *chip)
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if (mv88e6xxx_has(chip, MV88E6XXX_FLAG_G2_MGMT_EN_0X) ||
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mv88e6xxx_has(chip, MV88E6XXX_FLAG_G2_MGMT_EN_2X))
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reg |= GLOBAL2_SWITCH_MGMT_RSVD2CPU | 0x7;
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err = mv88e6xxx_write(chip, REG_GLOBAL2, GLOBAL2_SWITCH_MGMT, reg);
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err = mv88e6xxx_g2_write(chip, GLOBAL2_SWITCH_MGMT, reg);
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if (err)
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return err;
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@ -454,8 +474,8 @@ int mv88e6xxx_g2_setup(struct mv88e6xxx_chip *chip)
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if (mv88e6xxx_has(chip, MV88E6XXX_FLAGS_PVT)) {
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/* Initialize Cross-chip Port VLAN Table to reset defaults */
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err = mv88e6xxx_write(chip, REG_GLOBAL2, GLOBAL2_PVT_ADDR,
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GLOBAL2_PVT_ADDR_OP_INIT_ONES);
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err = mv88e6xxx_g2_write(chip, GLOBAL2_PVT_ADDR,
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GLOBAL2_PVT_ADDR_OP_INIT_ONES);
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if (err)
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return err;
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}
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@ -276,7 +276,6 @@
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#define GLOBAL_STATS_COUNTER_32 0x1e
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#define GLOBAL_STATS_COUNTER_01 0x1f
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#define REG_GLOBAL2 0x1c
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#define GLOBAL2_INT_SOURCE 0x00
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#define GLOBAL2_INT_MASK 0x01
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#define GLOBAL2_MGMT_EN_2X 0x02
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