forked from Minki/linux
ARM i.MX27: Add devicetree support
This patch adds basic devicetree support for i.MX27 based SoCs. Only the bindings for which drivers exist are added here: - UART - fec - CSPI - I2C - watchdog - gpio Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sascha Hauer
parent
6b21d18ed5
commit
9f0749e3eb
217
arch/arm/boot/dts/imx27.dtsi
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217
arch/arm/boot/dts/imx27.dtsi
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@ -0,0 +1,217 @@
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/*
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* Copyright 2012 Sascha Hauer, Pengutronix
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/include/ "skeleton.dtsi"
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/ {
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aliases {
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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serial3 = &uart4;
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serial4 = &uart5;
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serial5 = &uart6;
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};
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avic: avic-interrupt-controller@e0000000 {
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compatible = "fsl,imx27-avic", "fsl,avic";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x10040000 0x1000>;
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};
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clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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osc26m {
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compatible = "fsl,imx-osc26m", "fixed-clock";
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clock-frequency = <26000000>;
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};
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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interrupt-parent = <&avic>;
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ranges;
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aipi@10000000 { /* AIPI1 */
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compatible = "fsl,aipi-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x10000000 0x10000000>;
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ranges;
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wdog@10002000 {
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compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
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reg = <0x10002000 0x4000>;
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interrupts = <27>;
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status = "disabled";
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};
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uart1: uart@1000a000 {
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compatible = "fsl,imx27-uart", "fsl,imx21-uart";
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reg = <0x1000a000 0x1000>;
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interrupts = <20>;
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status = "disabled";
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};
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uart2: uart@1000b000 {
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compatible = "fsl,imx27-uart", "fsl,imx21-uart";
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reg = <0x1000b000 0x1000>;
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interrupts = <19>;
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status = "disabled";
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};
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uart3: uart@1000c000 {
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compatible = "fsl,imx27-uart", "fsl,imx21-uart";
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reg = <0x1000c000 0x1000>;
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interrupts = <18>;
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status = "disabled";
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};
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uart4: uart@1000d000 {
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compatible = "fsl,imx27-uart", "fsl,imx21-uart";
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reg = <0x1000d000 0x1000>;
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interrupts = <17>;
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status = "disabled";
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};
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cspi1: cspi@1000e000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx27-cspi";
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reg = <0x1000e000 0x1000>;
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interrupts = <16>;
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status = "disabled";
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};
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cspi2: cspi@1000f000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx27-cspi";
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reg = <0x1000f000 0x1000>;
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interrupts = <15>;
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status = "disabled";
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};
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i2c1: i2c@10012000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
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reg = <0x10012000 0x1000>;
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interrupts = <12>;
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status = "disabled";
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};
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gpio1: gpio@10015000 {
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compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
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reg = <0x10015000 0x100>;
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interrupts = <8>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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gpio2: gpio@10015100 {
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compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
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reg = <0x10015100 0x100>;
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interrupts = <8>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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gpio3: gpio@10015200 {
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compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
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reg = <0x10015200 0x100>;
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interrupts = <8>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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gpio4: gpio@10015300 {
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compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
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reg = <0x10015300 0x100>;
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interrupts = <8>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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gpio5: gpio@10015400 {
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compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
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reg = <0x10015400 0x100>;
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interrupts = <8>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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gpio6: gpio@10015500 {
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compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
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reg = <0x10015500 0x100>;
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interrupts = <8>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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cspi3: cspi@10017000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx27-cspi";
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reg = <0x10017000 0x1000>;
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interrupts = <6>;
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status = "disabled";
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};
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uart5: uart@1001b000 {
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compatible = "fsl,imx27-uart", "fsl,imx21-uart";
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reg = <0x1001b000 0x1000>;
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interrupts = <49>;
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status = "disabled";
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};
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uart6: uart@1001c000 {
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compatible = "fsl,imx27-uart", "fsl,imx21-uart";
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reg = <0x1001c000 0x1000>;
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interrupts = <48>;
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status = "disabled";
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};
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i2c2: i2c@1001d000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
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reg = <0x1001d000 0x1000>;
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interrupts = <1>;
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status = "disabled";
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};
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fec: fec@1002b000 {
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compatible = "fsl,imx27-fec";
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reg = <0x1002b000 0x4000>;
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interrupts = <50>;
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status = "disabled";
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};
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};
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};
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};
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@ -376,6 +376,14 @@ config MACH_IMX27IPCAM
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Include support for IMX27 IPCAM platform. This includes specific
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configurations for the board and its peripherals.
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config MACH_IMX27_DT
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bool "Support i.MX27 platforms from device tree"
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select SOC_IMX27
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select USE_OF
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help
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Include support for Freescale i.MX27 based platforms
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using the device tree for discovery
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endif
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if ARCH_IMX_V6_V7
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@ -41,6 +41,7 @@ obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o
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obj-$(CONFIG_MACH_PCA100) += mach-pca100.o
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obj-$(CONFIG_MACH_MXT_TD60) += mach-mxt_td60.o
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obj-$(CONFIG_MACH_IMX27IPCAM) += mach-imx27ipcam.o
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obj-$(CONFIG_MACH_IMX27_DT) += imx27-dt.o
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# i.MX31 based machines
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obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o
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@ -22,6 +22,7 @@
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/clkdev.h>
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#include <linux/of.h>
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#include <asm/div64.h>
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@ -764,3 +765,20 @@ int __init mx27_clocks_init(unsigned long fref)
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return 0;
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}
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#ifdef CONFIG_OF
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int __init mx27_clocks_init_dt(void)
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{
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struct device_node *np;
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u32 fref = 26000000; /* default */
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for_each_compatible_node(np, NULL, "fixed-clock") {
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if (!of_device_is_compatible(np, "fsl,imx-osc26m"))
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continue;
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if (!of_property_read_u32(np, "clock-frequency", &fref))
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break;
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}
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return mx27_clocks_init(fref);
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}
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#endif
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89
arch/arm/mach-imx/imx27-dt.c
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89
arch/arm/mach-imx/imx27-dt.c
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@ -0,0 +1,89 @@
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/*
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* Copyright 2012 Sascha Hauer, Pengutronix
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <mach/common.h>
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#include <mach/mx27.h>
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static const struct of_dev_auxdata imx27_auxdata_lookup[] __initconst = {
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OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART1_BASE_ADDR, "imx21-uart.0", NULL),
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OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART2_BASE_ADDR, "imx21-uart.1", NULL),
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OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART3_BASE_ADDR, "imx21-uart.2", NULL),
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OF_DEV_AUXDATA("fsl,imx27-fec", MX27_FEC_BASE_ADDR, "imx27-fec.0", NULL),
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OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
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OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
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OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI1_BASE_ADDR, "imx27-cspi.0", NULL),
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OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI2_BASE_ADDR, "imx27-cspi.1", NULL),
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OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI3_BASE_ADDR, "imx27-cspi.2", NULL),
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OF_DEV_AUXDATA("fsl,imx27-wdt", MX27_WDOG_BASE_ADDR, "imx2-wdt.0", NULL),
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{ /* sentinel */ }
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};
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static int __init imx27_avic_add_irq_domain(struct device_node *np,
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struct device_node *interrupt_parent)
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{
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irq_domain_add_simple(np, 0);
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return 0;
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}
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static int __init imx27_gpio_add_irq_domain(struct device_node *np,
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struct device_node *interrupt_parent)
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{
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static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
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irq_domain_add_simple(np, gpio_irq_base);
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return 0;
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}
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static const struct of_device_id imx27_irq_match[] __initconst = {
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{ .compatible = "fsl,imx27-avic", .data = imx27_avic_add_irq_domain, },
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{ .compatible = "fsl,imx27-gpio", .data = imx27_gpio_add_irq_domain, },
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{ /* sentinel */ }
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};
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static void __init imx27_dt_init(void)
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{
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of_irq_init(imx27_irq_match);
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of_platform_populate(NULL, of_default_bus_match_table,
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imx27_auxdata_lookup, NULL);
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}
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static void __init imx27_timer_init(void)
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{
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mx27_clocks_init_dt();
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}
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static struct sys_timer imx27_timer = {
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.init = imx27_timer_init,
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};
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static const char *imx27_dt_board_compat[] __initdata = {
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"fsl,imx27",
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NULL
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};
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DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)")
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.map_io = mx27_map_io,
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.init_early = imx27_init_early,
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.init_irq = mx27_init_irq,
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.handle_irq = imx27_handle_irq,
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.timer = &imx27_timer,
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.init_machine = imx27_dt_init,
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.dt_compat = imx27_dt_board_compat,
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.restart = mxc_restart,
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MACHINE_END
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@ -65,6 +65,7 @@ extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
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unsigned long ckih1, unsigned long ckih2);
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extern int mx53_clocks_init(unsigned long ckil, unsigned long osc,
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unsigned long ckih1, unsigned long ckih2);
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extern int mx27_clocks_init_dt(void);
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extern int mx51_clocks_init_dt(void);
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extern int mx53_clocks_init_dt(void);
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extern int mx6q_clocks_init(void);
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