ARM: dts: am33xx-clock: Fix ehrpwm tbclk data

tbclk does not need to be a composite clock, we can simply
use gate clock for this purpose.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
This commit is contained in:
Poddar, Sourav 2014-04-29 14:04:20 +05:30 committed by Tero Kristo
parent 2febd99976
commit 9e100ebafb

View File

@ -96,47 +96,29 @@
clock-div = <1>; clock-div = <1>;
}; };
ehrpwm0_gate_tbclk: ehrpwm0_gate_tbclk { ehrpwm0_tbclk: ehrpwm0_tbclk@44e10664 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,composite-no-wait-gate-clock"; compatible = "ti,gate-clock";
clocks = <&dpll_per_m2_ck>; clocks = <&dpll_per_m2_ck>;
ti,bit-shift = <0>; ti,bit-shift = <0>;
reg = <0x0664>; reg = <0x0664>;
}; };
ehrpwm0_tbclk: ehrpwm0_tbclk { ehrpwm1_tbclk: ehrpwm1_tbclk@44e10664 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,composite-clock"; compatible = "ti,gate-clock";
clocks = <&ehrpwm0_gate_tbclk>;
};
ehrpwm1_gate_tbclk: ehrpwm1_gate_tbclk {
#clock-cells = <0>;
compatible = "ti,composite-no-wait-gate-clock";
clocks = <&dpll_per_m2_ck>; clocks = <&dpll_per_m2_ck>;
ti,bit-shift = <1>; ti,bit-shift = <1>;
reg = <0x0664>; reg = <0x0664>;
}; };
ehrpwm1_tbclk: ehrpwm1_tbclk { ehrpwm2_tbclk: ehrpwm2_tbclk@44e10664 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,composite-clock"; compatible = "ti,gate-clock";
clocks = <&ehrpwm1_gate_tbclk>;
};
ehrpwm2_gate_tbclk: ehrpwm2_gate_tbclk {
#clock-cells = <0>;
compatible = "ti,composite-no-wait-gate-clock";
clocks = <&dpll_per_m2_ck>; clocks = <&dpll_per_m2_ck>;
ti,bit-shift = <2>; ti,bit-shift = <2>;
reg = <0x0664>; reg = <0x0664>;
}; };
ehrpwm2_tbclk: ehrpwm2_tbclk {
#clock-cells = <0>;
compatible = "ti,composite-clock";
clocks = <&ehrpwm2_gate_tbclk>;
};
}; };
&prcm_clocks { &prcm_clocks {
clk_32768_ck: clk_32768_ck { clk_32768_ck: clk_32768_ck {