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stmmac: tidy-up stmmac_priv structure

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This patch tidies-up the stmmac_priv structure
that had many fileds alredy defined in the
plat_stmmacenet_data structure.

Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Giuseppe CAVALLARO 2010-11-24 02:37:58 +00:00 committed by David S. Miller
parent b340007f79
commit 9dfeb4d953
4 changed files with 44 additions and 52 deletions
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15
drivers/net/stmmac/stmmac.h
View File

@ -37,7 +37,6 @@ struct stmmac_priv {
unsigned int cur_tx; unsigned int cur_tx;
unsigned int dirty_tx; unsigned int dirty_tx;
unsigned int dma_tx_size; unsigned int dma_tx_size;
int tx_coe;
int tx_coalesce; int tx_coalesce;
struct dma_desc *dma_rx ; struct dma_desc *dma_rx ;
@ -48,7 +47,6 @@ struct stmmac_priv {
struct sk_buff_head rx_recycle; struct sk_buff_head rx_recycle;
struct net_device *dev; struct net_device *dev;
int is_gmac;
dma_addr_t dma_rx_phy; dma_addr_t dma_rx_phy;
unsigned int dma_rx_size; unsigned int dma_rx_size;
unsigned int dma_buf_sz; unsigned int dma_buf_sz;
@ -60,14 +58,11 @@ struct stmmac_priv {
struct napi_struct napi; struct napi_struct napi;
phy_interface_t phy_interface; phy_interface_t phy_interface;
int pbl;
int bus_id;
int phy_addr; int phy_addr;
int phy_mask; int phy_mask;
int (*phy_reset) (void *priv); int (*phy_reset) (void *priv);
void (*fix_mac_speed) (void *priv, unsigned int speed); int rx_coe;
void (*bus_setup)(void __iomem *ioaddr); int no_csum_insertion;
void *bsp_priv;
int phy_irq; int phy_irq;
struct phy_device *phydev; struct phy_device *phydev;
@ -77,7 +72,6 @@ struct stmmac_priv {
unsigned int flow_ctrl; unsigned int flow_ctrl;
unsigned int pause; unsigned int pause;
struct mii_bus *mii; struct mii_bus *mii;
int mii_clk_csr;
u32 msg_enable; u32 msg_enable;
spinlock_t lock; spinlock_t lock;
@ -90,10 +84,7 @@ struct stmmac_priv {
#ifdef STMMAC_VLAN_TAG_USED #ifdef STMMAC_VLAN_TAG_USED
struct vlan_group *vlgrp; struct vlan_group *vlgrp;
#endif #endif
int enh_desc; struct plat_stmmacenet_data *plat;
int rx_coe;
int bugged_jumbo;
int no_csum_insertion;
}; };
#ifdef CONFIG_STM_DRIVERS #ifdef CONFIG_STM_DRIVERS

4
drivers/net/stmmac/stmmac_ethtool.c
View File

@ -94,7 +94,7 @@ static void stmmac_ethtool_getdrvinfo(struct net_device *dev,
{ {
struct stmmac_priv *priv = netdev_priv(dev); struct stmmac_priv *priv = netdev_priv(dev);
if (!priv->is_gmac) if (!priv->plat->has_gmac)
strcpy(info->driver, MAC100_ETHTOOL_NAME); strcpy(info->driver, MAC100_ETHTOOL_NAME);
else else
strcpy(info->driver, GMAC_ETHTOOL_NAME); strcpy(info->driver, GMAC_ETHTOOL_NAME);
@ -176,7 +176,7 @@ static void stmmac_ethtool_gregs(struct net_device *dev,
memset(reg_space, 0x0, REG_SPACE_SIZE); memset(reg_space, 0x0, REG_SPACE_SIZE);
if (!priv->is_gmac) { if (!priv->plat->has_gmac) {
/* MAC registers */ /* MAC registers */
for (i = 0; i < 12; i++) for (i = 0; i < 12; i++)
reg_space[i] = readl(priv->ioaddr + (i * 4)); reg_space[i] = readl(priv->ioaddr + (i * 4));

69
drivers/net/stmmac/stmmac_main.c
View File

@ -186,6 +186,18 @@ static inline u32 stmmac_tx_avail(struct stmmac_priv *priv)
return priv->dirty_tx + priv->dma_tx_size - priv->cur_tx - 1; return priv->dirty_tx + priv->dma_tx_size - priv->cur_tx - 1;
} }
/* On some ST platforms, some HW system configuraton registers have to be
* set according to the link speed negotiated.
*/
static inline void stmmac_hw_fix_mac_speed(struct stmmac_priv *priv)
{
struct phy_device *phydev = priv->phydev;
if (likely(priv->plat->fix_mac_speed))
priv->plat->fix_mac_speed(priv->plat->bsp_priv,
phydev->speed);
}
/** /**
* stmmac_adjust_link * stmmac_adjust_link
* @dev: net device structure * @dev: net device structure
@ -228,15 +240,13 @@ static void stmmac_adjust_link(struct net_device *dev)
new_state = 1; new_state = 1;
switch (phydev->speed) { switch (phydev->speed) {
case 1000: case 1000:
if (likely(priv->is_gmac)) if (likely(priv->plat->has_gmac))
ctrl &= ~priv->hw->link.port; ctrl &= ~priv->hw->link.port;
if (likely(priv->fix_mac_speed)) stmmac_hw_fix_mac_speed(priv);
priv->fix_mac_speed(priv->bsp_priv,
phydev->speed);
break; break;
case 100: case 100:
case 10: case 10:
if (priv->is_gmac) { if (priv->plat->has_gmac) {
ctrl |= priv->hw->link.port; ctrl |= priv->hw->link.port;
if (phydev->speed == SPEED_100) { if (phydev->speed == SPEED_100) {
ctrl |= priv->hw->link.speed; ctrl |= priv->hw->link.speed;
@ -246,9 +256,7 @@ static void stmmac_adjust_link(struct net_device *dev)
} else { } else {
ctrl &= ~priv->hw->link.port; ctrl &= ~priv->hw->link.port;
} }
if (likely(priv->fix_mac_speed)) stmmac_hw_fix_mac_speed(priv);
priv->fix_mac_speed(priv->bsp_priv,
phydev->speed);
break; break;
default: default:
if (netif_msg_link(priv)) if (netif_msg_link(priv))
@ -305,7 +313,7 @@ static int stmmac_init_phy(struct net_device *dev)
return 0; return 0;
} }
snprintf(bus_id, MII_BUS_ID_SIZE, "%x", priv->bus_id); snprintf(bus_id, MII_BUS_ID_SIZE, "%x", priv->plat->bus_id);
snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id, snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
priv->phy_addr); priv->phy_addr);
pr_debug("stmmac_init_phy: trying to attach to %s\n", phy_id); pr_debug("stmmac_init_phy: trying to attach to %s\n", phy_id);
@ -552,7 +560,7 @@ static void free_dma_desc_resources(struct stmmac_priv *priv)
*/ */
static void stmmac_dma_operation_mode(struct stmmac_priv *priv) static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
{ {
if (likely((priv->tx_coe) && (!priv->no_csum_insertion))) { if (likely((priv->plat->tx_coe) && (!priv->no_csum_insertion))) {
/* In case of GMAC, SF mode has to be enabled /* In case of GMAC, SF mode has to be enabled
* to perform the TX COE. This depends on: * to perform the TX COE. This depends on:
* 1) TX COE if actually supported * 1) TX COE if actually supported
@ -814,7 +822,7 @@ static int stmmac_open(struct net_device *dev)
init_dma_desc_rings(dev); init_dma_desc_rings(dev);
/* DMA initialization and SW reset */ /* DMA initialization and SW reset */
if (unlikely(priv->hw->dma->init(priv->ioaddr, priv->pbl, if (unlikely(priv->hw->dma->init(priv->ioaddr, priv->plat->pbl,
priv->dma_tx_phy, priv->dma_tx_phy,
priv->dma_rx_phy) < 0)) { priv->dma_rx_phy) < 0)) {
@ -825,15 +833,15 @@ static int stmmac_open(struct net_device *dev)
/* Copy the MAC addr into the HW */ /* Copy the MAC addr into the HW */
priv->hw->mac->set_umac_addr(priv->ioaddr, dev->dev_addr, 0); priv->hw->mac->set_umac_addr(priv->ioaddr, dev->dev_addr, 0);
/* If required, perform hw setup of the bus. */ /* If required, perform hw setup of the bus. */
if (priv->bus_setup) if (priv->plat->bus_setup)
priv->bus_setup(priv->ioaddr); priv->plat->bus_setup(priv->ioaddr);
/* Initialize the MAC Core */ /* Initialize the MAC Core */
priv->hw->mac->core_init(priv->ioaddr); priv->hw->mac->core_init(priv->ioaddr);
priv->rx_coe = priv->hw->mac->rx_coe(priv->ioaddr); priv->rx_coe = priv->hw->mac->rx_coe(priv->ioaddr);
if (priv->rx_coe) if (priv->rx_coe)
pr_info("stmmac: Rx Checksum Offload Engine supported\n"); pr_info("stmmac: Rx Checksum Offload Engine supported\n");
if (priv->tx_coe) if (priv->plat->tx_coe)
pr_info("\tTX Checksum insertion supported\n"); pr_info("\tTX Checksum insertion supported\n");
priv->shutdown = 0; priv->shutdown = 0;
@ -1042,7 +1050,8 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
return stmmac_sw_tso(priv, skb); return stmmac_sw_tso(priv, skb);
if (likely((skb->ip_summed == CHECKSUM_PARTIAL))) { if (likely((skb->ip_summed == CHECKSUM_PARTIAL))) {
if (unlikely((!priv->tx_coe) || (priv->no_csum_insertion))) if (unlikely((!priv->plat->tx_coe) ||
(priv->no_csum_insertion)))
skb_checksum_help(skb); skb_checksum_help(skb);
else else
csum_insertion = 1; csum_insertion = 1;
@ -1146,7 +1155,7 @@ static inline void stmmac_rx_refill(struct stmmac_priv *priv)
DMA_FROM_DEVICE); DMA_FROM_DEVICE);
(p + entry)->des2 = priv->rx_skbuff_dma[entry]; (p + entry)->des2 = priv->rx_skbuff_dma[entry];
if (unlikely(priv->is_gmac)) { if (unlikely(priv->plat->has_gmac)) {
if (bfsize >= BUF_SIZE_8KiB) if (bfsize >= BUF_SIZE_8KiB)
(p + entry)->des3 = (p + entry)->des3 =
(p + entry)->des2 + BUF_SIZE_8KiB; (p + entry)->des2 + BUF_SIZE_8KiB;
@ -1356,7 +1365,7 @@ static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
return -EBUSY; return -EBUSY;
} }
if (priv->is_gmac) if (priv->plat->has_gmac)
max_mtu = JUMBO_LEN; max_mtu = JUMBO_LEN;
else else
max_mtu = ETH_DATA_LEN; max_mtu = ETH_DATA_LEN;
@ -1370,7 +1379,7 @@ static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
* needs to have the Tx COE disabled for oversized frames * needs to have the Tx COE disabled for oversized frames
* (due to limited buffer sizes). In this case we disable * (due to limited buffer sizes). In this case we disable
* the TX csum insertionin the TDES and not use SF. */ * the TX csum insertionin the TDES and not use SF. */
if ((priv->bugged_jumbo) && (priv->dev->mtu > ETH_DATA_LEN)) if ((priv->plat->bugged_jumbo) && (priv->dev->mtu > ETH_DATA_LEN))
priv->no_csum_insertion = 1; priv->no_csum_insertion = 1;
else else
priv->no_csum_insertion = 0; priv->no_csum_insertion = 0;
@ -1390,7 +1399,7 @@ static irqreturn_t stmmac_interrupt(int irq, void *dev_id)
return IRQ_NONE; return IRQ_NONE;
} }
if (priv->is_gmac) if (priv->plat->has_gmac)
/* To handle GMAC own interrupts */ /* To handle GMAC own interrupts */
priv->hw->mac->host_irq_status((void __iomem *) dev->base_addr); priv->hw->mac->host_irq_status((void __iomem *) dev->base_addr);
@ -1536,7 +1545,7 @@ static int stmmac_mac_device_setup(struct net_device *dev)
struct mac_device_info *device; struct mac_device_info *device;
if (priv->is_gmac) if (priv->plat->has_gmac)
device = dwmac1000_setup(priv->ioaddr); device = dwmac1000_setup(priv->ioaddr);
else else
device = dwmac100_setup(priv->ioaddr); device = dwmac100_setup(priv->ioaddr);
@ -1544,7 +1553,7 @@ static int stmmac_mac_device_setup(struct net_device *dev)
if (!device) if (!device)
return -ENOMEM; return -ENOMEM;
if (priv->enh_desc) { if (priv->plat->enh_desc) {
device->desc = &enh_desc_ops; device->desc = &enh_desc_ops;
pr_info("\tEnhanced descriptor structure\n"); pr_info("\tEnhanced descriptor structure\n");
} else } else
@ -1598,7 +1607,7 @@ static int stmmac_associate_phy(struct device *dev, void *data)
plat_dat->bus_id); plat_dat->bus_id);
/* Check that this phy is for the MAC being initialised */ /* Check that this phy is for the MAC being initialised */
if (priv->bus_id != plat_dat->bus_id) if (priv->plat->bus_id != plat_dat->bus_id)
return 0; return 0;
/* OK, this PHY is connected to the MAC. /* OK, this PHY is connected to the MAC.
@ -1683,13 +1692,9 @@ static int stmmac_dvr_probe(struct platform_device *pdev)
priv->device = &(pdev->dev); priv->device = &(pdev->dev);
priv->dev = ndev; priv->dev = ndev;
plat_dat = pdev->dev.platform_data; plat_dat = pdev->dev.platform_data;
priv->bus_id = plat_dat->bus_id;
priv->pbl = plat_dat->pbl; /* TLI */ priv->plat = plat_dat;
priv->mii_clk_csr = plat_dat->clk_csr;
priv->tx_coe = plat_dat->tx_coe;
priv->bugged_jumbo = plat_dat->bugged_jumbo;
priv->is_gmac = plat_dat->has_gmac; /* GMAC is on board */
priv->enh_desc = plat_dat->enh_desc;
priv->ioaddr = addr; priv->ioaddr = addr;
/* PMT module is not integrated in all the MAC devices. */ /* PMT module is not integrated in all the MAC devices. */
@ -1727,16 +1732,12 @@ static int stmmac_dvr_probe(struct platform_device *pdev)
goto out; goto out;
} }
priv->fix_mac_speed = plat_dat->fix_mac_speed;
priv->bus_setup = plat_dat->bus_setup;
priv->bsp_priv = plat_dat->bsp_priv;
pr_info("\t%s - (dev. name: %s - id: %d, IRQ #%d\n" pr_info("\t%s - (dev. name: %s - id: %d, IRQ #%d\n"
"\tIO base addr: 0x%p)\n", ndev->name, pdev->name, "\tIO base addr: 0x%p)\n", ndev->name, pdev->name,
pdev->id, ndev->irq, addr); pdev->id, ndev->irq, addr);
/* MDIO bus Registration */ /* MDIO bus Registration */
pr_debug("\tMDIO bus (id: %d)...", priv->bus_id); pr_debug("\tMDIO bus (id: %d)...", priv->plat->bus_id);
ret = stmmac_mdio_register(ndev); ret = stmmac_mdio_register(ndev);
if (ret < 0) if (ret < 0)
goto out; goto out;

8
drivers/net/stmmac/stmmac_mdio.c
View File

@ -53,7 +53,7 @@ static int stmmac_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg)
int data; int data;
u16 regValue = (((phyaddr << 11) & (0x0000F800)) | u16 regValue = (((phyaddr << 11) & (0x0000F800)) |
((phyreg << 6) & (0x000007C0))); ((phyreg << 6) & (0x000007C0)));
regValue |= MII_BUSY | ((priv->mii_clk_csr & 7) << 2); regValue |= MII_BUSY | ((priv->plat->clk_csr & 7) << 2);
do {} while (((readl(priv->ioaddr + mii_address)) & MII_BUSY) == 1); do {} while (((readl(priv->ioaddr + mii_address)) & MII_BUSY) == 1);
writel(regValue, priv->ioaddr + mii_address); writel(regValue, priv->ioaddr + mii_address);
@ -85,7 +85,7 @@ static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg,
(((phyaddr << 11) & (0x0000F800)) | ((phyreg << 6) & (0x000007C0))) (((phyaddr << 11) & (0x0000F800)) | ((phyreg << 6) & (0x000007C0)))
| MII_WRITE; | MII_WRITE;
value |= MII_BUSY | ((priv->mii_clk_csr & 7) << 2); value |= MII_BUSY | ((priv->plat->clk_csr & 7) << 2);
/* Wait until any existing MII operation is complete */ /* Wait until any existing MII operation is complete */
@ -114,7 +114,7 @@ static int stmmac_mdio_reset(struct mii_bus *bus)
if (priv->phy_reset) { if (priv->phy_reset) {
pr_debug("stmmac_mdio_reset: calling phy_reset\n"); pr_debug("stmmac_mdio_reset: calling phy_reset\n");
priv->phy_reset(priv->bsp_priv); priv->phy_reset(priv->plat->bsp_priv);
} }
/* This is a workaround for problems with the STE101P PHY. /* This is a workaround for problems with the STE101P PHY.
@ -157,7 +157,7 @@ int stmmac_mdio_register(struct net_device *ndev)
new_bus->read = &stmmac_mdio_read; new_bus->read = &stmmac_mdio_read;
new_bus->write = &stmmac_mdio_write; new_bus->write = &stmmac_mdio_write;
new_bus->reset = &stmmac_mdio_reset; new_bus->reset = &stmmac_mdio_reset;
snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", priv->bus_id); snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", priv->plat->bus_id);
new_bus->priv = ndev; new_bus->priv = ndev;
new_bus->irq = irqlist; new_bus->irq = irqlist;
new_bus->phy_mask = priv->phy_mask; new_bus->phy_mask = priv->phy_mask;