forked from Minki/linux
Merge remote-tracking branch 'scott/next' into next
Latest FSL updates from Scott: << Highlights include changes in compiler flag settings on e500 family cores, booke64 hibernation support, support for two new boards, and an erratum workaround. >>
This commit is contained in:
Benjamin Herrenschmidt
commit
9d56851e69
157
Documentation/devicetree/bindings/crypto/fsl-sec6.txt
Normal file
157
Documentation/devicetree/bindings/crypto/fsl-sec6.txt
Normal file
@ -0,0 +1,157 @@
|
|||||||
|
SEC 6 is as Freescale's Cryptographic Accelerator and Assurance Module (CAAM).
|
||||||
|
Currently Freescale powerpc chip C29X is embeded with SEC 6.
|
||||||
|
SEC 6 device tree binding include:
|
||||||
|
-SEC 6 Node
|
||||||
|
-Job Ring Node
|
||||||
|
-Full Example
|
||||||
|
|
||||||
|
=====================================================================
|
||||||
|
SEC 6 Node
|
||||||
|
|
||||||
|
Description
|
||||||
|
|
||||||
|
Node defines the base address of the SEC 6 block.
|
||||||
|
This block specifies the address range of all global
|
||||||
|
configuration registers for the SEC 6 block.
|
||||||
|
For example, In C293, we could see three SEC 6 node.
|
||||||
|
|
||||||
|
PROPERTIES
|
||||||
|
|
||||||
|
- compatible
|
||||||
|
Usage: required
|
||||||
|
Value type: <string>
|
||||||
|
Definition: Must include "fsl,sec-v6.0".
|
||||||
|
|
||||||
|
- fsl,sec-era
|
||||||
|
Usage: optional
|
||||||
|
Value type: <u32>
|
||||||
|
Definition: A standard property. Define the 'ERA' of the SEC
|
||||||
|
device.
|
||||||
|
|
||||||
|
- #address-cells
|
||||||
|
Usage: required
|
||||||
|
Value type: <u32>
|
||||||
|
Definition: A standard property. Defines the number of cells
|
||||||
|
for representing physical addresses in child nodes.
|
||||||
|
|
||||||
|
- #size-cells
|
||||||
|
Usage: required
|
||||||
|
Value type: <u32>
|
||||||
|
Definition: A standard property. Defines the number of cells
|
||||||
|
for representing the size of physical addresses in
|
||||||
|
child nodes.
|
||||||
|
|
||||||
|
- reg
|
||||||
|
Usage: required
|
||||||
|
Value type: <prop-encoded-array>
|
||||||
|
Definition: A standard property. Specifies the physical
|
||||||
|
address and length of the SEC 6 configuration registers.
|
||||||
|
|
||||||
|
- ranges
|
||||||
|
Usage: required
|
||||||
|
Value type: <prop-encoded-array>
|
||||||
|
Definition: A standard property. Specifies the physical address
|
||||||
|
range of the SEC 6.0 register space (-SNVS not included). A
|
||||||
|
triplet that includes the child address, parent address, &
|
||||||
|
length.
|
||||||
|
|
||||||
|
Note: All other standard properties (see the ePAPR) are allowed
|
||||||
|
but are optional.
|
||||||
|
|
||||||
|
EXAMPLE
|
||||||
|
crypto@a0000 {
|
||||||
|
compatible = "fsl,sec-v6.0";
|
||||||
|
fsl,sec-era = <6>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
reg = <0xa0000 0x20000>;
|
||||||
|
ranges = <0 0xa0000 0x20000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
=====================================================================
|
||||||
|
Job Ring (JR) Node
|
||||||
|
|
||||||
|
Child of the crypto node defines data processing interface to SEC 6
|
||||||
|
across the peripheral bus for purposes of processing
|
||||||
|
cryptographic descriptors. The specified address
|
||||||
|
range can be made visible to one (or more) cores.
|
||||||
|
The interrupt defined for this node is controlled within
|
||||||
|
the address range of this node.
|
||||||
|
|
||||||
|
- compatible
|
||||||
|
Usage: required
|
||||||
|
Value type: <string>
|
||||||
|
Definition: Must include "fsl,sec-v6.0-job-ring".
|
||||||
|
|
||||||
|
- reg
|
||||||
|
Usage: required
|
||||||
|
Value type: <prop-encoded-array>
|
||||||
|
Definition: Specifies a two JR parameters: an offset from
|
||||||
|
the parent physical address and the length the JR registers.
|
||||||
|
|
||||||
|
- interrupts
|
||||||
|
Usage: required
|
||||||
|
Value type: <prop_encoded-array>
|
||||||
|
Definition: Specifies the interrupts generated by this
|
||||||
|
device. The value of the interrupts property
|
||||||
|
consists of one interrupt specifier. The format
|
||||||
|
of the specifier is defined by the binding document
|
||||||
|
describing the node's interrupt parent.
|
||||||
|
|
||||||
|
EXAMPLE
|
||||||
|
jr@1000 {
|
||||||
|
compatible = "fsl,sec-v6.0-job-ring";
|
||||||
|
reg = <0x1000 0x1000>;
|
||||||
|
interrupts = <49 2 0 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
===================================================================
|
||||||
|
Full Example
|
||||||
|
|
||||||
|
Since some chips may contain more than one SEC, the dtsi contains
|
||||||
|
only the node contents, not the node itself. A chip using the SEC
|
||||||
|
should include the dtsi inside each SEC node. Example:
|
||||||
|
|
||||||
|
In qoriq-sec6.0.dtsi:
|
||||||
|
|
||||||
|
compatible = "fsl,sec-v6.0";
|
||||||
|
fsl,sec-era = <6>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
|
||||||
|
jr@1000 {
|
||||||
|
compatible = "fsl,sec-v6.0-job-ring",
|
||||||
|
"fsl,sec-v5.2-job-ring",
|
||||||
|
"fsl,sec-v5.0-job-ring",
|
||||||
|
"fsl,sec-v4.4-job-ring",
|
||||||
|
"fsl,sec-v4.0-job-ring";
|
||||||
|
reg = <0x1000 0x1000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
jr@2000 {
|
||||||
|
compatible = "fsl,sec-v6.0-job-ring",
|
||||||
|
"fsl,sec-v5.2-job-ring",
|
||||||
|
"fsl,sec-v5.0-job-ring",
|
||||||
|
"fsl,sec-v4.4-job-ring",
|
||||||
|
"fsl,sec-v4.0-job-ring";
|
||||||
|
reg = <0x2000 0x1000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
In the C293 device tree, we add the include of public property:
|
||||||
|
|
||||||
|
crypto@a0000 {
|
||||||
|
/include/ "qoriq-sec6.0.dtsi"
|
||||||
|
}
|
||||||
|
|
||||||
|
crypto@a0000 {
|
||||||
|
reg = <0xa0000 0x20000>;
|
||||||
|
ranges = <0 0xa0000 0x20000>;
|
||||||
|
|
||||||
|
jr@1000 {
|
||||||
|
interrupts = <49 2 0 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
jr@2000 {
|
||||||
|
interrupts = <50 2 0 0>;
|
||||||
|
};
|
||||||
|
};
|
||||||
@ -88,13 +88,30 @@ CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mcmodel=medium,-mminimal-toc)
|
|||||||
CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mno-pointers-to-nested-functions)
|
CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mno-pointers-to-nested-functions)
|
||||||
CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 -mmultiple
|
CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 -mmultiple
|
||||||
|
|
||||||
|
ifeq ($(CONFIG_PPC_BOOK3S_64),y)
|
||||||
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,-mtune=power4)
|
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,-mtune=power4)
|
||||||
|
else
|
||||||
|
CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=powerpc64
|
||||||
|
endif
|
||||||
|
|
||||||
CFLAGS-$(CONFIG_CELL_CPU) += $(call cc-option,-mcpu=cell)
|
CFLAGS-$(CONFIG_CELL_CPU) += $(call cc-option,-mcpu=cell)
|
||||||
CFLAGS-$(CONFIG_POWER4_CPU) += $(call cc-option,-mcpu=power4)
|
CFLAGS-$(CONFIG_POWER4_CPU) += $(call cc-option,-mcpu=power4)
|
||||||
CFLAGS-$(CONFIG_POWER5_CPU) += $(call cc-option,-mcpu=power5)
|
CFLAGS-$(CONFIG_POWER5_CPU) += $(call cc-option,-mcpu=power5)
|
||||||
CFLAGS-$(CONFIG_POWER6_CPU) += $(call cc-option,-mcpu=power6)
|
CFLAGS-$(CONFIG_POWER6_CPU) += $(call cc-option,-mcpu=power6)
|
||||||
CFLAGS-$(CONFIG_POWER7_CPU) += $(call cc-option,-mcpu=power7)
|
CFLAGS-$(CONFIG_POWER7_CPU) += $(call cc-option,-mcpu=power7)
|
||||||
|
|
||||||
|
E5500_CPU := $(call cc-option,-mcpu=e500mc64,-mcpu=powerpc64)
|
||||||
|
CFLAGS-$(CONFIG_E5500_CPU) += $(E5500_CPU)
|
||||||
|
CFLAGS-$(CONFIG_E6500_CPU) += $(call cc-option,-mcpu=e6500,$(E5500_CPU))
|
||||||
|
|
||||||
|
ifeq ($(CONFIG_PPC32),y)
|
||||||
|
ifeq ($(CONFIG_PPC_E500MC),y)
|
||||||
|
CFLAGS-y += $(call cc-option,-mcpu=e500mc,-mcpu=powerpc)
|
||||||
|
else
|
||||||
|
CFLAGS-$(CONFIG_E500) += $(call cc-option,-mcpu=8540 -msoft-float,-mcpu=powerpc)
|
||||||
|
endif
|
||||||
|
endif
|
||||||
|
|
||||||
CFLAGS-$(CONFIG_TUNE_CELL) += $(call cc-option,-mtune=cell)
|
CFLAGS-$(CONFIG_TUNE_CELL) += $(call cc-option,-mtune=cell)
|
||||||
|
|
||||||
KBUILD_CPPFLAGS += -Iarch/$(ARCH)
|
KBUILD_CPPFLAGS += -Iarch/$(ARCH)
|
||||||
@ -139,7 +156,6 @@ endif
|
|||||||
|
|
||||||
cpu-as-$(CONFIG_4xx) += -Wa,-m405
|
cpu-as-$(CONFIG_4xx) += -Wa,-m405
|
||||||
cpu-as-$(CONFIG_ALTIVEC) += -Wa,-maltivec
|
cpu-as-$(CONFIG_ALTIVEC) += -Wa,-maltivec
|
||||||
cpu-as-$(CONFIG_E500) += -Wa,-me500
|
|
||||||
cpu-as-$(CONFIG_E200) += -Wa,-me200
|
cpu-as-$(CONFIG_E200) += -Wa,-me200
|
||||||
|
|
||||||
KBUILD_AFLAGS += $(cpu-as-y)
|
KBUILD_AFLAGS += $(cpu-as-y)
|
||||||
|
|||||||
223
arch/powerpc/boot/dts/c293pcie.dts
Normal file
223
arch/powerpc/boot/dts/c293pcie.dts
Normal file
@ -0,0 +1,223 @@
|
|||||||
|
/*
|
||||||
|
* C293 PCIE Device Tree Source
|
||||||
|
*
|
||||||
|
* Copyright 2013 Freescale Semiconductor Inc.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
* * Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
* * Neither the name of Freescale Semiconductor nor the
|
||||||
|
* names of its contributors may be used to endorse or promote products
|
||||||
|
* derived from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
*
|
||||||
|
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||||
|
* GNU General Public License ("GPL") as published by the Free Software
|
||||||
|
* Foundation, either version 2 of that License or (at your option) any
|
||||||
|
* later version.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
|
||||||
|
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||||
|
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||||
|
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||||
|
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/include/ "fsl/c293si-pre.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "fsl,C293PCIE";
|
||||||
|
compatible = "fsl,C293PCIE";
|
||||||
|
|
||||||
|
memory {
|
||||||
|
device_type = "memory";
|
||||||
|
};
|
||||||
|
|
||||||
|
ifc: ifc@fffe1e000 {
|
||||||
|
reg = <0xf 0xffe1e000 0 0x2000>;
|
||||||
|
ranges = <0x0 0x0 0xf 0xec000000 0x04000000
|
||||||
|
0x2 0x0 0xf 0xffdf0000 0x00010000>;
|
||||||
|
|
||||||
|
};
|
||||||
|
|
||||||
|
soc: soc@fffe00000 {
|
||||||
|
ranges = <0x0 0xf 0xffe00000 0x100000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
pci0: pcie@fffe0a000 {
|
||||||
|
reg = <0xf 0xffe0a000 0 0x1000>;
|
||||||
|
ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
|
||||||
|
0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
|
||||||
|
pcie@0 {
|
||||||
|
ranges = <0x2000000 0x0 0x80000000
|
||||||
|
0x2000000 0x0 0x80000000
|
||||||
|
0x0 0x20000000
|
||||||
|
|
||||||
|
0x1000000 0x0 0x0
|
||||||
|
0x1000000 0x0 0x0
|
||||||
|
0x0 0x100000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&ifc {
|
||||||
|
nor@0,0 {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
compatible = "cfi-flash";
|
||||||
|
reg = <0x0 0x0 0x4000000>;
|
||||||
|
bank-width = <2>;
|
||||||
|
device-width = <1>;
|
||||||
|
|
||||||
|
partition@0 {
|
||||||
|
/* 1MB for DTB Image */
|
||||||
|
reg = <0x0 0x00100000>;
|
||||||
|
label = "NOR DTB Image";
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@100000 {
|
||||||
|
/* 8 MB for Linux Kernel Image */
|
||||||
|
reg = <0x00100000 0x00800000>;
|
||||||
|
label = "NOR Linux Kernel Image";
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@900000 {
|
||||||
|
/* 53MB for rootfs */
|
||||||
|
reg = <0x00900000 0x03500000>;
|
||||||
|
label = "NOR Rootfs Image";
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@3e00000 {
|
||||||
|
/* 1MB for blob encrypted key */
|
||||||
|
reg = <0x03e00000 0x00100000>;
|
||||||
|
label = "NOR blob encrypted key";
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@3f00000 {
|
||||||
|
/* 512KB for u-boot Bootloader Image and evn */
|
||||||
|
reg = <0x03f00000 0x00100000>;
|
||||||
|
label = "NOR U-Boot Image";
|
||||||
|
read-only;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
nand@1,0 {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
compatible = "fsl,ifc-nand";
|
||||||
|
reg = <0x1 0x0 0x10000>;
|
||||||
|
|
||||||
|
partition@0 {
|
||||||
|
/* This location must not be altered */
|
||||||
|
/* 1MB for u-boot Bootloader Image */
|
||||||
|
reg = <0x0 0x00100000>;
|
||||||
|
label = "NAND U-Boot Image";
|
||||||
|
read-only;
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@100000 {
|
||||||
|
/* 1MB for DTB Image */
|
||||||
|
reg = <0x00100000 0x00100000>;
|
||||||
|
label = "NAND DTB Image";
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@200000 {
|
||||||
|
/* 16MB for Linux Kernel Image */
|
||||||
|
reg = <0x00200000 0x01000000>;
|
||||||
|
label = "NAND Linux Kernel Image";
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@1200000 {
|
||||||
|
/* 4078MB for Root file System Image */
|
||||||
|
reg = <0x00600000 0xfee00000>;
|
||||||
|
label = "NAND RFS Image";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
cpld@2,0 {
|
||||||
|
compatible = "fsl,c293pcie-cpld";
|
||||||
|
reg = <0x2 0x0 0x20>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&soc {
|
||||||
|
i2c@3000 {
|
||||||
|
eeprom@50 {
|
||||||
|
compatible = "st,24c1024";
|
||||||
|
reg = <0x50>;
|
||||||
|
};
|
||||||
|
|
||||||
|
adt7461@4c {
|
||||||
|
compatible = "adi,adt7461";
|
||||||
|
reg = <0x4c>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
spi@7000 {
|
||||||
|
flash@0 {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
compatible = "spansion,s25sl12801";
|
||||||
|
reg = <0>;
|
||||||
|
spi-max-frequency = <50000000>;
|
||||||
|
|
||||||
|
partition@0 {
|
||||||
|
/* 1MB for u-boot Bootloader Image */
|
||||||
|
/* 1MB for Environment */
|
||||||
|
reg = <0x0 0x00100000>;
|
||||||
|
label = "SPI Flash U-Boot Image";
|
||||||
|
read-only;
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@100000 {
|
||||||
|
/* 512KB for DTB Image */
|
||||||
|
reg = <0x00100000 0x00080000>;
|
||||||
|
label = "SPI Flash DTB Image";
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@180000 {
|
||||||
|
/* 4MB for Linux Kernel Image */
|
||||||
|
reg = <0x00180000 0x00400000>;
|
||||||
|
label = "SPI Flash Linux Kernel Image";
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@580000 {
|
||||||
|
/* 10.5MB for RFS Image */
|
||||||
|
reg = <0x00580000 0x00a80000>;
|
||||||
|
label = "SPI Flash RFS Image";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
mdio@24000 {
|
||||||
|
phy0: ethernet-phy@0 {
|
||||||
|
interrupts = <2 1 0 0>;
|
||||||
|
reg = <0x0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
phy1: ethernet-phy@1 {
|
||||||
|
interrupts = <2 1 0 0>;
|
||||||
|
reg = <0x2>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
enet0: ethernet@b0000 {
|
||||||
|
phy-handle = <&phy0>;
|
||||||
|
phy-connection-type = "rgmii-id";
|
||||||
|
};
|
||||||
|
|
||||||
|
enet1: ethernet@b1000 {
|
||||||
|
phy-handle = <&phy1>;
|
||||||
|
phy-connection-type = "rgmii-id";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
/include/ "fsl/c293si-post.dtsi"
|
||||||
193
arch/powerpc/boot/dts/fsl/c293si-post.dtsi
Normal file
193
arch/powerpc/boot/dts/fsl/c293si-post.dtsi
Normal file
@ -0,0 +1,193 @@
|
|||||||
|
/*
|
||||||
|
* C293 Silicon/SoC Device Tree Source (post include)
|
||||||
|
*
|
||||||
|
* Copyright 2012 Freescale Semiconductor Inc.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
* * Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
* * Neither the name of Freescale Semiconductor nor the
|
||||||
|
* names of its contributors may be used to endorse or promote products
|
||||||
|
* derived from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
*
|
||||||
|
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||||
|
* GNU General Public License ("GPL") as published by the Free Software
|
||||||
|
* Foundation, either version 2 of that License or (at your option) any
|
||||||
|
* later version.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||||
|
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||||
|
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||||
|
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||||
|
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
&ifc {
|
||||||
|
#address-cells = <2>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
compatible = "fsl,ifc", "simple-bus";
|
||||||
|
interrupts = <19 2 0 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* controller at 0xa000 */
|
||||||
|
&pci0 {
|
||||||
|
compatible = "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
|
||||||
|
device_type = "pci";
|
||||||
|
#size-cells = <2>;
|
||||||
|
#address-cells = <3>;
|
||||||
|
bus-range = <0 255>;
|
||||||
|
clock-frequency = <33333333>;
|
||||||
|
interrupts = <16 2 0 0>;
|
||||||
|
|
||||||
|
pcie@0 {
|
||||||
|
reg = <0 0 0 0 0>;
|
||||||
|
#interrupt-cells = <1>;
|
||||||
|
#size-cells = <2>;
|
||||||
|
#address-cells = <3>;
|
||||||
|
device_type = "pci";
|
||||||
|
interrupts = <16 2 0 0>;
|
||||||
|
interrupt-map-mask = <0xf800 0 0 7>;
|
||||||
|
interrupt-map = <
|
||||||
|
/* IDSEL 0x0 */
|
||||||
|
0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
|
||||||
|
0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
|
||||||
|
0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
|
||||||
|
0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&soc {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
device_type = "soc";
|
||||||
|
compatible = "simple-bus";
|
||||||
|
bus-frequency = <0>; // Filled out by uboot.
|
||||||
|
|
||||||
|
ecm-law@0 {
|
||||||
|
compatible = "fsl,ecm-law";
|
||||||
|
reg = <0x0 0x1000>;
|
||||||
|
fsl,num-laws = <12>;
|
||||||
|
};
|
||||||
|
|
||||||
|
ecm@1000 {
|
||||||
|
compatible = "fsl,c293-ecm", "fsl,ecm";
|
||||||
|
reg = <0x1000 0x1000>;
|
||||||
|
interrupts = <16 2 0 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
memory-controller@2000 {
|
||||||
|
compatible = "fsl,c293-memory-controller";
|
||||||
|
reg = <0x2000 0x1000>;
|
||||||
|
interrupts = <16 2 0 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
/include/ "pq3-i2c-0.dtsi"
|
||||||
|
/include/ "pq3-i2c-1.dtsi"
|
||||||
|
/include/ "pq3-duart-0.dtsi"
|
||||||
|
/include/ "pq3-espi-0.dtsi"
|
||||||
|
spi0: spi@7000 {
|
||||||
|
fsl,espi-num-chipselects = <1>;
|
||||||
|
};
|
||||||
|
|
||||||
|
/include/ "pq3-gpio-0.dtsi"
|
||||||
|
L2: l2-cache-controller@20000 {
|
||||||
|
compatible = "fsl,c293-l2-cache-controller";
|
||||||
|
reg = <0x20000 0x1000>;
|
||||||
|
cache-line-size = <32>; // 32 bytes
|
||||||
|
cache-size = <0x80000>; // L2,512K
|
||||||
|
interrupts = <16 2 0 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
/include/ "pq3-dma-0.dtsi"
|
||||||
|
/include/ "pq3-esdhc-0.dtsi"
|
||||||
|
sdhc@2e000 {
|
||||||
|
compatible = "fsl,c293-esdhc", "fsl,esdhc";
|
||||||
|
sdhci,auto-cmd12;
|
||||||
|
};
|
||||||
|
|
||||||
|
crypto@80000 {
|
||||||
|
/include/ "qoriq-sec6.0-0.dtsi"
|
||||||
|
};
|
||||||
|
|
||||||
|
crypto@80000 {
|
||||||
|
reg = <0x80000 0x20000>;
|
||||||
|
ranges = <0x0 0x80000 0x20000>;
|
||||||
|
|
||||||
|
jr@1000{
|
||||||
|
interrupts = <45 2 0 0>;
|
||||||
|
};
|
||||||
|
jr@2000{
|
||||||
|
interrupts = <57 2 0 0>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
crypto@a0000 {
|
||||||
|
/include/ "qoriq-sec6.0-0.dtsi"
|
||||||
|
};
|
||||||
|
|
||||||
|
crypto@a0000 {
|
||||||
|
reg = <0xa0000 0x20000>;
|
||||||
|
ranges = <0x0 0xa0000 0x20000>;
|
||||||
|
|
||||||
|
jr@1000{
|
||||||
|
interrupts = <49 2 0 0>;
|
||||||
|
};
|
||||||
|
jr@2000{
|
||||||
|
interrupts = <50 2 0 0>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
crypto@c0000 {
|
||||||
|
/include/ "qoriq-sec6.0-0.dtsi"
|
||||||
|
};
|
||||||
|
|
||||||
|
crypto@c0000 {
|
||||||
|
reg = <0xc0000 0x20000>;
|
||||||
|
ranges = <0x0 0xc0000 0x20000>;
|
||||||
|
|
||||||
|
jr@1000{
|
||||||
|
interrupts = <55 2 0 0>;
|
||||||
|
};
|
||||||
|
jr@2000{
|
||||||
|
interrupts = <56 2 0 0>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
/include/ "pq3-mpic.dtsi"
|
||||||
|
/include/ "pq3-mpic-timer-B.dtsi"
|
||||||
|
|
||||||
|
/include/ "pq3-etsec2-0.dtsi"
|
||||||
|
enet0: ethernet@b0000 {
|
||||||
|
queue-group@b0000 {
|
||||||
|
reg = <0x10000 0x1000>;
|
||||||
|
fsl,rx-bit-map = <0xff>;
|
||||||
|
fsl,tx-bit-map = <0xff>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
/include/ "pq3-etsec2-1.dtsi"
|
||||||
|
enet1: ethernet@b1000 {
|
||||||
|
queue-group@b1000 {
|
||||||
|
reg = <0x11000 0x1000>;
|
||||||
|
fsl,rx-bit-map = <0xff>;
|
||||||
|
fsl,tx-bit-map = <0xff>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
global-utilities@e0000 {
|
||||||
|
compatible = "fsl,c293-guts";
|
||||||
|
reg = <0xe0000 0x1000>;
|
||||||
|
fsl,has-rstcr;
|
||||||
|
};
|
||||||
|
};
|
||||||
63
arch/powerpc/boot/dts/fsl/c293si-pre.dtsi
Normal file
63
arch/powerpc/boot/dts/fsl/c293si-pre.dtsi
Normal file
@ -0,0 +1,63 @@
|
|||||||
|
/*
|
||||||
|
* C293 Silicon/SoC Device Tree Source (pre include)
|
||||||
|
*
|
||||||
|
* Copyright 2012 Freescale Semiconductor Inc.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
* * Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
* * Neither the name of Freescale Semiconductor nor the
|
||||||
|
* names of its contributors may be used to endorse or promote products
|
||||||
|
* derived from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
*
|
||||||
|
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||||
|
* GNU General Public License ("GPL") as published by the Free Software
|
||||||
|
* Foundation, either version 2 of that License or (at your option) any
|
||||||
|
* later version.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||||
|
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||||
|
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||||
|
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||||
|
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
|
||||||
|
/include/ "e500v2_power_isa.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
compatible = "fsl,C293";
|
||||||
|
#address-cells = <2>;
|
||||||
|
#size-cells = <2>;
|
||||||
|
interrupt-parent = <&mpic>;
|
||||||
|
|
||||||
|
aliases {
|
||||||
|
serial0 = &serial0;
|
||||||
|
serial1 = &serial1;
|
||||||
|
ethernet0 = &enet0;
|
||||||
|
ethernet1 = &enet1;
|
||||||
|
pci0 = &pci0;
|
||||||
|
};
|
||||||
|
|
||||||
|
cpus {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
PowerPC,e500v2@0 {
|
||||||
|
device_type = "cpu";
|
||||||
|
reg = <0x0>;
|
||||||
|
next-level-cache = <&L2>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
56
arch/powerpc/boot/dts/fsl/qoriq-sec6.0-0.dtsi
Normal file
56
arch/powerpc/boot/dts/fsl/qoriq-sec6.0-0.dtsi
Normal file
@ -0,0 +1,56 @@
|
|||||||
|
/*
|
||||||
|
* QorIQ Sec/Crypto 6.0 device tree stub
|
||||||
|
*
|
||||||
|
* Copyright 2013 Freescale Semiconductor Inc.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
* * Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
* * Neither the name of Freescale Semiconductor nor the
|
||||||
|
* names of its contributors may be used to endorse or promote products
|
||||||
|
* derived from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
*
|
||||||
|
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||||
|
* GNU General Public License ("GPL") as published by the Free Software
|
||||||
|
* Foundation, either version 2 of that License or (at your option) any
|
||||||
|
* later version.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||||
|
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||||
|
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||||
|
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||||
|
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
compatible = "fsl,sec-v6.0";
|
||||||
|
fsl,sec-era = <6>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
|
||||||
|
jr@1000 {
|
||||||
|
compatible = "fsl,sec-v6.0-job-ring",
|
||||||
|
"fsl,sec-v5.2-job-ring",
|
||||||
|
"fsl,sec-v5.0-job-ring",
|
||||||
|
"fsl,sec-v4.4-job-ring",
|
||||||
|
"fsl,sec-v4.0-job-ring";
|
||||||
|
reg = <0x1000 0x1000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
jr@2000 {
|
||||||
|
compatible = "fsl,sec-v6.0-job-ring",
|
||||||
|
"fsl,sec-v5.2-job-ring",
|
||||||
|
"fsl,sec-v5.0-job-ring",
|
||||||
|
"fsl,sec-v4.4-job-ring",
|
||||||
|
"fsl,sec-v4.0-job-ring";
|
||||||
|
reg = <0x2000 0x1000>;
|
||||||
|
};
|
||||||
234
arch/powerpc/boot/dts/p1023rdb.dts
Normal file
234
arch/powerpc/boot/dts/p1023rdb.dts
Normal file
@ -0,0 +1,234 @@
|
|||||||
|
/*
|
||||||
|
* P1023 RDB Device Tree Source
|
||||||
|
*
|
||||||
|
* Copyright 2013 Freescale Semiconductor Inc.
|
||||||
|
*
|
||||||
|
* Author: Chunhe Lan <Chunhe.Lan@freescale.com>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
* * Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
* * Neither the name of Freescale Semiconductor nor the
|
||||||
|
* names of its contributors may be used to endorse or promote products
|
||||||
|
* derived from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
*
|
||||||
|
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||||
|
* GNU General Public License ("GPL") as published by the Free Software
|
||||||
|
* Foundation, either version 2 of that License or (at your option) any
|
||||||
|
* later version.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||||
|
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||||
|
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||||
|
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||||
|
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/include/ "fsl/p1023si-pre.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "fsl,P1023";
|
||||||
|
compatible = "fsl,P1023RDB";
|
||||||
|
#address-cells = <2>;
|
||||||
|
#size-cells = <2>;
|
||||||
|
interrupt-parent = <&mpic>;
|
||||||
|
|
||||||
|
memory {
|
||||||
|
device_type = "memory";
|
||||||
|
};
|
||||||
|
|
||||||
|
soc: soc@ff600000 {
|
||||||
|
ranges = <0x0 0x0 0xff600000 0x200000>;
|
||||||
|
|
||||||
|
i2c@3000 {
|
||||||
|
eeprom@53 {
|
||||||
|
compatible = "at24,24c04";
|
||||||
|
reg = <0x53>;
|
||||||
|
};
|
||||||
|
|
||||||
|
rtc@6f {
|
||||||
|
compatible = "microchip,mcp7941x";
|
||||||
|
reg = <0x6f>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
usb@22000 {
|
||||||
|
dr_mode = "host";
|
||||||
|
phy_type = "ulpi";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
lbc: localbus@ff605000 {
|
||||||
|
reg = <0 0xff605000 0 0x1000>;
|
||||||
|
|
||||||
|
/* NOR, NAND Flashes */
|
||||||
|
ranges = <0x0 0x0 0x0 0xec000000 0x04000000
|
||||||
|
0x1 0x0 0x0 0xffa00000 0x08000000>;
|
||||||
|
|
||||||
|
nor@0,0 {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
compatible = "cfi-flash";
|
||||||
|
reg = <0x0 0x0 0x04000000>;
|
||||||
|
bank-width = <2>;
|
||||||
|
device-width = <1>;
|
||||||
|
|
||||||
|
partition@0 {
|
||||||
|
/* 48MB for Root File System */
|
||||||
|
reg = <0x00000000 0x03000000>;
|
||||||
|
label = "NOR Root File System";
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@3000000 {
|
||||||
|
/* 1MB for DTB Image */
|
||||||
|
reg = <0x03000000 0x00100000>;
|
||||||
|
label = "NOR DTB Image";
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@3100000 {
|
||||||
|
/* 14MB for Linux Kernel Image */
|
||||||
|
reg = <0x03100000 0x00e00000>;
|
||||||
|
label = "NOR Linux Kernel Image";
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@3f00000 {
|
||||||
|
/* This location must not be altered */
|
||||||
|
/* 512KB for u-boot Bootloader Image */
|
||||||
|
/* 512KB for u-boot Environment Variables */
|
||||||
|
reg = <0x03f00000 0x00100000>;
|
||||||
|
label = "NOR U-Boot Image";
|
||||||
|
read-only;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
nand@1,0 {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
compatible = "fsl,elbc-fcm-nand";
|
||||||
|
reg = <0x1 0x0 0x40000>;
|
||||||
|
|
||||||
|
partition@0 {
|
||||||
|
/* This location must not be altered */
|
||||||
|
/* 1MB for u-boot Bootloader Image */
|
||||||
|
reg = <0x0 0x00100000>;
|
||||||
|
label = "NAND U-Boot Image";
|
||||||
|
read-only;
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@100000 {
|
||||||
|
/* 1MB for DTB Image */
|
||||||
|
reg = <0x00100000 0x00100000>;
|
||||||
|
label = "NAND DTB Image";
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@200000 {
|
||||||
|
/* 14MB for Linux Kernel Image */
|
||||||
|
reg = <0x00200000 0x00e00000>;
|
||||||
|
label = "NAND Linux Kernel Image";
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@1000000 {
|
||||||
|
/* 96MB for Root File System Image */
|
||||||
|
reg = <0x01000000 0x06000000>;
|
||||||
|
label = "NAND Root File System";
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@7000000 {
|
||||||
|
/* 16MB for User Writable Area */
|
||||||
|
reg = <0x07000000 0x01000000>;
|
||||||
|
label = "NAND Writable User area";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
pci0: pcie@ff60a000 {
|
||||||
|
reg = <0 0xff60a000 0 0x1000>;
|
||||||
|
ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
|
||||||
|
0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
|
||||||
|
pcie@0 {
|
||||||
|
/* IRQ[0:3] are pulled up on board, set to active-low */
|
||||||
|
interrupt-map-mask = <0xf800 0 0 7>;
|
||||||
|
interrupt-map = <
|
||||||
|
/* IDSEL 0x0 */
|
||||||
|
0000 0 0 1 &mpic 0 1 0 0
|
||||||
|
0000 0 0 2 &mpic 1 1 0 0
|
||||||
|
0000 0 0 3 &mpic 2 1 0 0
|
||||||
|
0000 0 0 4 &mpic 3 1 0 0
|
||||||
|
>;
|
||||||
|
ranges = <0x2000000 0x0 0xc0000000
|
||||||
|
0x2000000 0x0 0xc0000000
|
||||||
|
0x0 0x20000000
|
||||||
|
|
||||||
|
0x1000000 0x0 0x0
|
||||||
|
0x1000000 0x0 0x0
|
||||||
|
0x0 0x100000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
board_pci1: pci1: pcie@ff609000 {
|
||||||
|
reg = <0 0xff609000 0 0x1000>;
|
||||||
|
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
|
||||||
|
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
|
||||||
|
pcie@0 {
|
||||||
|
/*
|
||||||
|
* IRQ[4:6] only for PCIe, set to active-high,
|
||||||
|
* IRQ[7] is pulled up on board, set to active-low
|
||||||
|
*/
|
||||||
|
interrupt-map-mask = <0xf800 0 0 7>;
|
||||||
|
interrupt-map = <
|
||||||
|
/* IDSEL 0x0 */
|
||||||
|
0000 0 0 1 &mpic 4 2 0 0
|
||||||
|
0000 0 0 2 &mpic 5 2 0 0
|
||||||
|
0000 0 0 3 &mpic 6 2 0 0
|
||||||
|
0000 0 0 4 &mpic 7 1 0 0
|
||||||
|
>;
|
||||||
|
ranges = <0x2000000 0x0 0xa0000000
|
||||||
|
0x2000000 0x0 0xa0000000
|
||||||
|
0x0 0x20000000
|
||||||
|
|
||||||
|
0x1000000 0x0 0x0
|
||||||
|
0x1000000 0x0 0x0
|
||||||
|
0x0 0x100000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
pci2: pcie@ff60b000 {
|
||||||
|
reg = <0 0xff60b000 0 0x1000>;
|
||||||
|
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
|
||||||
|
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
|
||||||
|
pcie@0 {
|
||||||
|
/*
|
||||||
|
* IRQ[8:10] are pulled up on board, set to active-low
|
||||||
|
* IRQ[11] only for PCIe, set to active-high,
|
||||||
|
*/
|
||||||
|
interrupt-map-mask = <0xf800 0 0 7>;
|
||||||
|
interrupt-map = <
|
||||||
|
/* IDSEL 0x0 */
|
||||||
|
0000 0 0 1 &mpic 8 1 0 0
|
||||||
|
0000 0 0 2 &mpic 9 1 0 0
|
||||||
|
0000 0 0 3 &mpic 10 1 0 0
|
||||||
|
0000 0 0 4 &mpic 11 2 0 0
|
||||||
|
>;
|
||||||
|
ranges = <0x2000000 0x0 0x80000000
|
||||||
|
0x2000000 0x0 0x80000000
|
||||||
|
0x0 0x20000000
|
||||||
|
|
||||||
|
0x1000000 0x0 0x0
|
||||||
|
0x1000000 0x0 0x0
|
||||||
|
0x0 0x100000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
};
|
||||||
|
|
||||||
|
/include/ "fsl/p1023si-post.dtsi"
|
||||||
@ -59,4 +59,7 @@
|
|||||||
#define r30 30
|
#define r30 30
|
||||||
#define r31 31
|
#define r31 31
|
||||||
|
|
||||||
|
#define SPRN_TBRL 268
|
||||||
|
#define SPRN_TBRU 269
|
||||||
|
|
||||||
#endif /* _PPC64_PPC_ASM_H */
|
#endif /* _PPC64_PPC_ASM_H */
|
||||||
|
|||||||
@ -71,18 +71,18 @@ udelay:
|
|||||||
add r4,r4,r5
|
add r4,r4,r5
|
||||||
addi r4,r4,-1
|
addi r4,r4,-1
|
||||||
divw r4,r4,r5 /* BUS ticks */
|
divw r4,r4,r5 /* BUS ticks */
|
||||||
1: mftbu r5
|
1: mfspr r5, SPRN_TBRU
|
||||||
mftb r6
|
mfspr r6, SPRN_TBRL
|
||||||
mftbu r7
|
mfspr r7, SPRN_TBRU
|
||||||
cmpw 0,r5,r7
|
cmpw 0,r5,r7
|
||||||
bne 1b /* Get [synced] base time */
|
bne 1b /* Get [synced] base time */
|
||||||
addc r9,r6,r4 /* Compute end time */
|
addc r9,r6,r4 /* Compute end time */
|
||||||
addze r8,r5
|
addze r8,r5
|
||||||
2: mftbu r5
|
2: mfspr r5, SPRN_TBRU
|
||||||
cmpw 0,r5,r8
|
cmpw 0,r5,r8
|
||||||
blt 2b
|
blt 2b
|
||||||
bgt 3f
|
bgt 3f
|
||||||
mftb r6
|
mfspr r6, SPRN_TBRL
|
||||||
cmpw 0,r6,r9
|
cmpw 0,r6,r9
|
||||||
blt 2b
|
blt 2b
|
||||||
3: blr
|
3: blr
|
||||||
|
|||||||
@ -1,14 +1,13 @@
|
|||||||
CONFIG_PPC_85xx=y
|
CONFIG_PPC_85xx=y
|
||||||
CONFIG_SMP=y
|
CONFIG_SMP=y
|
||||||
CONFIG_NR_CPUS=2
|
CONFIG_NR_CPUS=2
|
||||||
CONFIG_EXPERIMENTAL=y
|
|
||||||
CONFIG_SYSVIPC=y
|
CONFIG_SYSVIPC=y
|
||||||
CONFIG_POSIX_MQUEUE=y
|
CONFIG_POSIX_MQUEUE=y
|
||||||
CONFIG_BSD_PROCESS_ACCT=y
|
CONFIG_BSD_PROCESS_ACCT=y
|
||||||
CONFIG_AUDIT=y
|
CONFIG_AUDIT=y
|
||||||
CONFIG_IRQ_DOMAIN_DEBUG=y
|
|
||||||
CONFIG_NO_HZ=y
|
CONFIG_NO_HZ=y
|
||||||
CONFIG_HIGH_RES_TIMERS=y
|
CONFIG_HIGH_RES_TIMERS=y
|
||||||
|
CONFIG_RCU_FANOUT=32
|
||||||
CONFIG_IKCONFIG=y
|
CONFIG_IKCONFIG=y
|
||||||
CONFIG_IKCONFIG_PROC=y
|
CONFIG_IKCONFIG_PROC=y
|
||||||
CONFIG_LOG_BUF_SHIFT=14
|
CONFIG_LOG_BUF_SHIFT=14
|
||||||
@ -22,6 +21,8 @@ CONFIG_MODVERSIONS=y
|
|||||||
# CONFIG_BLK_DEV_BSG is not set
|
# CONFIG_BLK_DEV_BSG is not set
|
||||||
CONFIG_PARTITION_ADVANCED=y
|
CONFIG_PARTITION_ADVANCED=y
|
||||||
CONFIG_MAC_PARTITION=y
|
CONFIG_MAC_PARTITION=y
|
||||||
|
CONFIG_PHYSICAL_START=0x00000000
|
||||||
|
CONFIG_P1023_RDB=y
|
||||||
CONFIG_P1023_RDS=y
|
CONFIG_P1023_RDS=y
|
||||||
CONFIG_QUICC_ENGINE=y
|
CONFIG_QUICC_ENGINE=y
|
||||||
CONFIG_QE_GPIO=y
|
CONFIG_QE_GPIO=y
|
||||||
@ -64,10 +65,20 @@ CONFIG_IP_SCTP=m
|
|||||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||||
CONFIG_DEVTMPFS=y
|
CONFIG_DEVTMPFS=y
|
||||||
CONFIG_DEVTMPFS_MOUNT=y
|
CONFIG_DEVTMPFS_MOUNT=y
|
||||||
|
CONFIG_MTD=y
|
||||||
|
CONFIG_MTD_CMDLINE_PARTS=y
|
||||||
|
CONFIG_MTD_CHAR=y
|
||||||
|
CONFIG_MTD_BLOCK=y
|
||||||
|
CONFIG_MTD_CFI=y
|
||||||
|
CONFIG_MTD_CFI_AMDSTD=y
|
||||||
|
CONFIG_MTD_PHYSMAP_OF=y
|
||||||
|
CONFIG_MTD_NAND=y
|
||||||
|
CONFIG_MTD_NAND_FSL_ELBC=y
|
||||||
CONFIG_PROC_DEVICETREE=y
|
CONFIG_PROC_DEVICETREE=y
|
||||||
CONFIG_BLK_DEV_LOOP=y
|
CONFIG_BLK_DEV_LOOP=y
|
||||||
CONFIG_BLK_DEV_RAM=y
|
CONFIG_BLK_DEV_RAM=y
|
||||||
CONFIG_BLK_DEV_RAM_SIZE=131072
|
CONFIG_BLK_DEV_RAM_SIZE=131072
|
||||||
|
CONFIG_EEPROM_AT24=y
|
||||||
CONFIG_EEPROM_LEGACY=y
|
CONFIG_EEPROM_LEGACY=y
|
||||||
CONFIG_BLK_DEV_SD=y
|
CONFIG_BLK_DEV_SD=y
|
||||||
CONFIG_CHR_DEV_ST=y
|
CONFIG_CHR_DEV_ST=y
|
||||||
@ -83,6 +94,8 @@ CONFIG_DUMMY=y
|
|||||||
CONFIG_FS_ENET=y
|
CONFIG_FS_ENET=y
|
||||||
CONFIG_FSL_PQ_MDIO=y
|
CONFIG_FSL_PQ_MDIO=y
|
||||||
CONFIG_E1000E=y
|
CONFIG_E1000E=y
|
||||||
|
CONFIG_PHYLIB=y
|
||||||
|
CONFIG_AT803X_PHY=y
|
||||||
CONFIG_MARVELL_PHY=y
|
CONFIG_MARVELL_PHY=y
|
||||||
CONFIG_DAVICOM_PHY=y
|
CONFIG_DAVICOM_PHY=y
|
||||||
CONFIG_CICADA_PHY=y
|
CONFIG_CICADA_PHY=y
|
||||||
@ -97,12 +110,15 @@ CONFIG_SERIAL_8250=y
|
|||||||
CONFIG_SERIAL_8250_CONSOLE=y
|
CONFIG_SERIAL_8250_CONSOLE=y
|
||||||
CONFIG_SERIAL_8250_NR_UARTS=2
|
CONFIG_SERIAL_8250_NR_UARTS=2
|
||||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=2
|
CONFIG_SERIAL_8250_RUNTIME_UARTS=2
|
||||||
|
CONFIG_SERIAL_8250_EXTENDED=y
|
||||||
CONFIG_SERIAL_8250_MANY_PORTS=y
|
CONFIG_SERIAL_8250_MANY_PORTS=y
|
||||||
|
CONFIG_SERIAL_8250_SHARE_IRQ=y
|
||||||
CONFIG_SERIAL_8250_DETECT_IRQ=y
|
CONFIG_SERIAL_8250_DETECT_IRQ=y
|
||||||
CONFIG_SERIAL_8250_RSA=y
|
CONFIG_SERIAL_8250_RSA=y
|
||||||
CONFIG_SERIAL_QE=m
|
CONFIG_HW_RANDOM=y
|
||||||
CONFIG_NVRAM=y
|
CONFIG_NVRAM=y
|
||||||
CONFIG_I2C=y
|
CONFIG_I2C=y
|
||||||
|
CONFIG_I2C_CHARDEV=y
|
||||||
CONFIG_I2C_CPM=m
|
CONFIG_I2C_CPM=m
|
||||||
CONFIG_I2C_MPC=y
|
CONFIG_I2C_MPC=y
|
||||||
CONFIG_GPIO_MPC8XXX=y
|
CONFIG_GPIO_MPC8XXX=y
|
||||||
@ -122,6 +138,7 @@ CONFIG_USB_STORAGE=y
|
|||||||
CONFIG_EDAC=y
|
CONFIG_EDAC=y
|
||||||
CONFIG_EDAC_MM_EDAC=y
|
CONFIG_EDAC_MM_EDAC=y
|
||||||
CONFIG_RTC_CLASS=y
|
CONFIG_RTC_CLASS=y
|
||||||
|
CONFIG_RTC_DRV_DS1307=y
|
||||||
CONFIG_RTC_DRV_CMOS=y
|
CONFIG_RTC_DRV_CMOS=y
|
||||||
CONFIG_DMADEVICES=y
|
CONFIG_DMADEVICES=y
|
||||||
CONFIG_FSL_DMA=y
|
CONFIG_FSL_DMA=y
|
||||||
@ -162,6 +179,7 @@ CONFIG_DEBUG_FS=y
|
|||||||
CONFIG_DETECT_HUNG_TASK=y
|
CONFIG_DETECT_HUNG_TASK=y
|
||||||
# CONFIG_DEBUG_BUGVERBOSE is not set
|
# CONFIG_DEBUG_BUGVERBOSE is not set
|
||||||
CONFIG_DEBUG_INFO=y
|
CONFIG_DEBUG_INFO=y
|
||||||
|
CONFIG_STRICT_DEVMEM=y
|
||||||
CONFIG_CRYPTO_PCBC=m
|
CONFIG_CRYPTO_PCBC=m
|
||||||
CONFIG_CRYPTO_SHA256=y
|
CONFIG_CRYPTO_SHA256=y
|
||||||
CONFIG_CRYPTO_SHA512=y
|
CONFIG_CRYPTO_SHA512=y
|
||||||
@ -27,6 +27,7 @@ CONFIG_MPC85xx_MDS=y
|
|||||||
CONFIG_MPC8536_DS=y
|
CONFIG_MPC8536_DS=y
|
||||||
CONFIG_MPC85xx_DS=y
|
CONFIG_MPC85xx_DS=y
|
||||||
CONFIG_MPC85xx_RDB=y
|
CONFIG_MPC85xx_RDB=y
|
||||||
|
CONFIG_C293_PCIE=y
|
||||||
CONFIG_P1010_RDB=y
|
CONFIG_P1010_RDB=y
|
||||||
CONFIG_P1022_DS=y
|
CONFIG_P1022_DS=y
|
||||||
CONFIG_P1022_RDK=y
|
CONFIG_P1022_RDK=y
|
||||||
|
|||||||
@ -30,6 +30,7 @@ CONFIG_MPC85xx_MDS=y
|
|||||||
CONFIG_MPC8536_DS=y
|
CONFIG_MPC8536_DS=y
|
||||||
CONFIG_MPC85xx_DS=y
|
CONFIG_MPC85xx_DS=y
|
||||||
CONFIG_MPC85xx_RDB=y
|
CONFIG_MPC85xx_RDB=y
|
||||||
|
CONFIG_C293_PCIE=y
|
||||||
CONFIG_P1010_RDB=y
|
CONFIG_P1010_RDB=y
|
||||||
CONFIG_P1022_DS=y
|
CONFIG_P1022_DS=y
|
||||||
CONFIG_P1022_RDK=y
|
CONFIG_P1022_RDK=y
|
||||||
|
|||||||
@ -371,14 +371,19 @@ extern const char *powerpc_base_platform;
|
|||||||
#define CPU_FTRS_E500MC (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \
|
#define CPU_FTRS_E500MC (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \
|
||||||
CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
|
CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
|
||||||
CPU_FTR_DBELL | CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV)
|
CPU_FTR_DBELL | CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV)
|
||||||
|
/*
|
||||||
|
* e5500/e6500 erratum A-006958 is a timebase bug that can use the
|
||||||
|
* same workaround as CPU_FTR_CELL_TB_BUG.
|
||||||
|
*/
|
||||||
#define CPU_FTRS_E5500 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \
|
#define CPU_FTRS_E5500 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \
|
||||||
CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
|
CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
|
||||||
CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
|
CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
|
||||||
CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV)
|
CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV | CPU_FTR_CELL_TB_BUG)
|
||||||
#define CPU_FTRS_E6500 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \
|
#define CPU_FTRS_E6500 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \
|
||||||
CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
|
CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
|
||||||
CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
|
CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
|
||||||
CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV | CPU_FTR_ALTIVEC_COMP)
|
CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV | CPU_FTR_ALTIVEC_COMP | \
|
||||||
|
CPU_FTR_CELL_TB_BUG)
|
||||||
#define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)
|
#define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)
|
||||||
|
|
||||||
/* 64-bit CPUs */
|
/* 64-bit CPUs */
|
||||||
|
|||||||
92
arch/powerpc/include/asm/mpc85xx.h
Normal file
92
arch/powerpc/include/asm/mpc85xx.h
Normal file
@ -0,0 +1,92 @@
|
|||||||
|
/*
|
||||||
|
* MPC85xx cpu type detection
|
||||||
|
*
|
||||||
|
* Copyright 2011-2012 Freescale Semiconductor, Inc.
|
||||||
|
*
|
||||||
|
* This is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __ASM_PPC_MPC85XX_H
|
||||||
|
#define __ASM_PPC_MPC85XX_H
|
||||||
|
|
||||||
|
#define SVR_REV(svr) ((svr) & 0xFF) /* SOC design resision */
|
||||||
|
#define SVR_MAJ(svr) (((svr) >> 4) & 0xF) /* Major revision field*/
|
||||||
|
#define SVR_MIN(svr) (((svr) >> 0) & 0xF) /* Minor revision field*/
|
||||||
|
|
||||||
|
/* Some parts define SVR[0:23] as the SOC version */
|
||||||
|
#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFF7FF) /* SOC Version fields */
|
||||||
|
|
||||||
|
#define SVR_8533 0x803400
|
||||||
|
#define SVR_8535 0x803701
|
||||||
|
#define SVR_8536 0x803700
|
||||||
|
#define SVR_8540 0x803000
|
||||||
|
#define SVR_8541 0x807200
|
||||||
|
#define SVR_8543 0x803200
|
||||||
|
#define SVR_8544 0x803401
|
||||||
|
#define SVR_8545 0x803102
|
||||||
|
#define SVR_8547 0x803101
|
||||||
|
#define SVR_8548 0x803100
|
||||||
|
#define SVR_8555 0x807100
|
||||||
|
#define SVR_8560 0x807000
|
||||||
|
#define SVR_8567 0x807501
|
||||||
|
#define SVR_8568 0x807500
|
||||||
|
#define SVR_8569 0x808000
|
||||||
|
#define SVR_8572 0x80E000
|
||||||
|
#define SVR_P1010 0x80F100
|
||||||
|
#define SVR_P1011 0x80E500
|
||||||
|
#define SVR_P1012 0x80E501
|
||||||
|
#define SVR_P1013 0x80E700
|
||||||
|
#define SVR_P1014 0x80F101
|
||||||
|
#define SVR_P1017 0x80F700
|
||||||
|
#define SVR_P1020 0x80E400
|
||||||
|
#define SVR_P1021 0x80E401
|
||||||
|
#define SVR_P1022 0x80E600
|
||||||
|
#define SVR_P1023 0x80F600
|
||||||
|
#define SVR_P1024 0x80E402
|
||||||
|
#define SVR_P1025 0x80E403
|
||||||
|
#define SVR_P2010 0x80E300
|
||||||
|
#define SVR_P2020 0x80E200
|
||||||
|
#define SVR_P2040 0x821000
|
||||||
|
#define SVR_P2041 0x821001
|
||||||
|
#define SVR_P3041 0x821103
|
||||||
|
#define SVR_P4040 0x820100
|
||||||
|
#define SVR_P4080 0x820000
|
||||||
|
#define SVR_P5010 0x822100
|
||||||
|
#define SVR_P5020 0x822000
|
||||||
|
#define SVR_P5021 0X820500
|
||||||
|
#define SVR_P5040 0x820400
|
||||||
|
#define SVR_T4240 0x824000
|
||||||
|
#define SVR_T4120 0x824001
|
||||||
|
#define SVR_T4160 0x824100
|
||||||
|
#define SVR_C291 0x850000
|
||||||
|
#define SVR_C292 0x850020
|
||||||
|
#define SVR_C293 0x850030
|
||||||
|
#define SVR_B4860 0X868000
|
||||||
|
#define SVR_G4860 0x868001
|
||||||
|
#define SVR_G4060 0x868003
|
||||||
|
#define SVR_B4440 0x868100
|
||||||
|
#define SVR_G4440 0x868101
|
||||||
|
#define SVR_B4420 0x868102
|
||||||
|
#define SVR_B4220 0x868103
|
||||||
|
#define SVR_T1040 0x852000
|
||||||
|
#define SVR_T1041 0x852001
|
||||||
|
#define SVR_T1042 0x852002
|
||||||
|
#define SVR_T1020 0x852100
|
||||||
|
#define SVR_T1021 0x852101
|
||||||
|
#define SVR_T1022 0x852102
|
||||||
|
|
||||||
|
#define SVR_8610 0x80A000
|
||||||
|
#define SVR_8641 0x809000
|
||||||
|
#define SVR_8641D 0x809001
|
||||||
|
|
||||||
|
#define SVR_9130 0x860001
|
||||||
|
#define SVR_9131 0x860000
|
||||||
|
#define SVR_9132 0x861000
|
||||||
|
#define SVR_9232 0x861400
|
||||||
|
|
||||||
|
#define SVR_Unknown 0xFFFFFF
|
||||||
|
|
||||||
|
#endif
|
||||||
@ -431,15 +431,15 @@ END_FTR_SECTION_IFSET(CPU_FTR_601)
|
|||||||
#define ISYNC_601
|
#define ISYNC_601
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_PPC_CELL
|
#if defined(CONFIG_PPC_CELL) || defined(CONFIG_PPC_FSL_BOOK3E)
|
||||||
#define MFTB(dest) \
|
#define MFTB(dest) \
|
||||||
90: mftb dest; \
|
90: mfspr dest, SPRN_TBRL; \
|
||||||
BEGIN_FTR_SECTION_NESTED(96); \
|
BEGIN_FTR_SECTION_NESTED(96); \
|
||||||
cmpwi dest,0; \
|
cmpwi dest,0; \
|
||||||
beq- 90b; \
|
beq- 90b; \
|
||||||
END_FTR_SECTION_NESTED(CPU_FTR_CELL_TB_BUG, CPU_FTR_CELL_TB_BUG, 96)
|
END_FTR_SECTION_NESTED(CPU_FTR_CELL_TB_BUG, CPU_FTR_CELL_TB_BUG, 96)
|
||||||
#else
|
#else
|
||||||
#define MFTB(dest) mftb dest
|
#define MFTB(dest) mfspr dest, SPRN_TBRL
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifndef CONFIG_SMP
|
#ifndef CONFIG_SMP
|
||||||
|
|||||||
@ -1117,10 +1117,10 @@
|
|||||||
: "memory")
|
: "memory")
|
||||||
|
|
||||||
#ifdef __powerpc64__
|
#ifdef __powerpc64__
|
||||||
#ifdef CONFIG_PPC_CELL
|
#if defined(CONFIG_PPC_CELL) || defined(CONFIG_PPC_FSL_BOOK3E)
|
||||||
#define mftb() ({unsigned long rval; \
|
#define mftb() ({unsigned long rval; \
|
||||||
asm volatile( \
|
asm volatile( \
|
||||||
"90: mftb %0;\n" \
|
"90: mfspr %0, %2;\n" \
|
||||||
"97: cmpwi %0,0;\n" \
|
"97: cmpwi %0,0;\n" \
|
||||||
" beq- 90b;\n" \
|
" beq- 90b;\n" \
|
||||||
"99:\n" \
|
"99:\n" \
|
||||||
@ -1134,18 +1134,23 @@
|
|||||||
" .llong 0\n" \
|
" .llong 0\n" \
|
||||||
" .llong 0\n" \
|
" .llong 0\n" \
|
||||||
".previous" \
|
".previous" \
|
||||||
: "=r" (rval) : "i" (CPU_FTR_CELL_TB_BUG)); rval;})
|
: "=r" (rval) \
|
||||||
|
: "i" (CPU_FTR_CELL_TB_BUG), "i" (SPRN_TBRL)); \
|
||||||
|
rval;})
|
||||||
#else
|
#else
|
||||||
#define mftb() ({unsigned long rval; \
|
#define mftb() ({unsigned long rval; \
|
||||||
asm volatile("mftb %0" : "=r" (rval)); rval;})
|
asm volatile("mfspr %0, %1" : \
|
||||||
|
"=r" (rval) : "i" (SPRN_TBRL)); rval;})
|
||||||
#endif /* !CONFIG_PPC_CELL */
|
#endif /* !CONFIG_PPC_CELL */
|
||||||
|
|
||||||
#else /* __powerpc64__ */
|
#else /* __powerpc64__ */
|
||||||
|
|
||||||
#define mftbl() ({unsigned long rval; \
|
#define mftbl() ({unsigned long rval; \
|
||||||
asm volatile("mftbl %0" : "=r" (rval)); rval;})
|
asm volatile("mfspr %0, %1" : "=r" (rval) : \
|
||||||
|
"i" (SPRN_TBRL)); rval;})
|
||||||
#define mftbu() ({unsigned long rval; \
|
#define mftbu() ({unsigned long rval; \
|
||||||
asm volatile("mftbu %0" : "=r" (rval)); rval;})
|
asm volatile("mfspr %0, %1" : "=r" (rval) : \
|
||||||
|
"i" (SPRN_TBRU)); rval;})
|
||||||
#endif /* !__powerpc64__ */
|
#endif /* !__powerpc64__ */
|
||||||
|
|
||||||
#define mttbl(v) asm volatile("mttbl %0":: "r"(v))
|
#define mttbl(v) asm volatile("mttbl %0":: "r"(v))
|
||||||
|
|||||||
@ -29,7 +29,7 @@ static inline cycles_t get_cycles(void)
|
|||||||
ret = 0;
|
ret = 0;
|
||||||
|
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
"97: mftb %0\n"
|
"97: mfspr %0, %2\n"
|
||||||
"99:\n"
|
"99:\n"
|
||||||
".section __ftr_fixup,\"a\"\n"
|
".section __ftr_fixup,\"a\"\n"
|
||||||
".align 2\n"
|
".align 2\n"
|
||||||
@ -41,7 +41,7 @@ static inline cycles_t get_cycles(void)
|
|||||||
" .long 0\n"
|
" .long 0\n"
|
||||||
" .long 0\n"
|
" .long 0\n"
|
||||||
".previous"
|
".previous"
|
||||||
: "=r" (ret) : "i" (CPU_FTR_601));
|
: "=r" (ret) : "i" (CPU_FTR_601), "i" (SPRN_TBRL));
|
||||||
return ret;
|
return ret;
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|||||||
@ -46,10 +46,19 @@
|
|||||||
#define SL_r29 0xe8
|
#define SL_r29 0xe8
|
||||||
#define SL_r30 0xf0
|
#define SL_r30 0xf0
|
||||||
#define SL_r31 0xf8
|
#define SL_r31 0xf8
|
||||||
#define SL_SIZE SL_r31+8
|
#define SL_SPRG1 0x100
|
||||||
|
#define SL_TCR 0x108
|
||||||
|
#define SL_SIZE SL_TCR+8
|
||||||
|
|
||||||
/* these macros rely on the save area being
|
/* these macros rely on the save area being
|
||||||
* pointed to by r11 */
|
* pointed to by r11 */
|
||||||
|
|
||||||
|
#define SAVE_SPR(register) \
|
||||||
|
mfspr r0, SPRN_##register ;\
|
||||||
|
std r0, SL_##register(r11)
|
||||||
|
#define RESTORE_SPR(register) \
|
||||||
|
ld r0, SL_##register(r11) ;\
|
||||||
|
mtspr SPRN_##register, r0
|
||||||
#define SAVE_SPECIAL(special) \
|
#define SAVE_SPECIAL(special) \
|
||||||
mf##special r0 ;\
|
mf##special r0 ;\
|
||||||
std r0, SL_##special(r11)
|
std r0, SL_##special(r11)
|
||||||
@ -103,8 +112,15 @@ _GLOBAL(swsusp_arch_suspend)
|
|||||||
SAVE_REGISTER(r30)
|
SAVE_REGISTER(r30)
|
||||||
SAVE_REGISTER(r31)
|
SAVE_REGISTER(r31)
|
||||||
SAVE_SPECIAL(MSR)
|
SAVE_SPECIAL(MSR)
|
||||||
SAVE_SPECIAL(SDR1)
|
|
||||||
SAVE_SPECIAL(XER)
|
SAVE_SPECIAL(XER)
|
||||||
|
#ifdef CONFIG_PPC_BOOK3S_64
|
||||||
|
SAVE_SPECIAL(SDR1)
|
||||||
|
#else
|
||||||
|
SAVE_SPR(TCR)
|
||||||
|
|
||||||
|
/* Save SPRG1, SPRG1 be used save paca */
|
||||||
|
SAVE_SPR(SPRG1)
|
||||||
|
#endif
|
||||||
|
|
||||||
/* we push the stack up 128 bytes but don't store the
|
/* we push the stack up 128 bytes but don't store the
|
||||||
* stack pointer on the stack like a real stackframe */
|
* stack pointer on the stack like a real stackframe */
|
||||||
@ -151,6 +167,7 @@ copy_page_loop:
|
|||||||
bne+ copyloop
|
bne+ copyloop
|
||||||
nothing_to_copy:
|
nothing_to_copy:
|
||||||
|
|
||||||
|
#ifdef CONFIG_PPC_BOOK3S_64
|
||||||
/* flush caches */
|
/* flush caches */
|
||||||
lis r3, 0x10
|
lis r3, 0x10
|
||||||
mtctr r3
|
mtctr r3
|
||||||
@ -167,6 +184,7 @@ nothing_to_copy:
|
|||||||
sync
|
sync
|
||||||
|
|
||||||
tlbia
|
tlbia
|
||||||
|
#endif
|
||||||
|
|
||||||
ld r11,swsusp_save_area_ptr@toc(r2)
|
ld r11,swsusp_save_area_ptr@toc(r2)
|
||||||
|
|
||||||
@ -208,16 +226,39 @@ nothing_to_copy:
|
|||||||
RESTORE_REGISTER(r29)
|
RESTORE_REGISTER(r29)
|
||||||
RESTORE_REGISTER(r30)
|
RESTORE_REGISTER(r30)
|
||||||
RESTORE_REGISTER(r31)
|
RESTORE_REGISTER(r31)
|
||||||
|
|
||||||
|
#ifdef CONFIG_PPC_BOOK3S_64
|
||||||
/* can't use RESTORE_SPECIAL(MSR) */
|
/* can't use RESTORE_SPECIAL(MSR) */
|
||||||
ld r0, SL_MSR(r11)
|
ld r0, SL_MSR(r11)
|
||||||
mtmsrd r0, 0
|
mtmsrd r0, 0
|
||||||
RESTORE_SPECIAL(SDR1)
|
RESTORE_SPECIAL(SDR1)
|
||||||
|
#else
|
||||||
|
/* Restore SPRG1, be used to save paca */
|
||||||
|
ld r0, SL_SPRG1(r11)
|
||||||
|
mtsprg 1, r0
|
||||||
|
|
||||||
|
RESTORE_SPECIAL(MSR)
|
||||||
|
|
||||||
|
/* Restore TCR and clear any pending bits in TSR. */
|
||||||
|
RESTORE_SPR(TCR)
|
||||||
|
lis r0, (TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS)@h
|
||||||
|
mtspr SPRN_TSR, r0
|
||||||
|
|
||||||
|
/* Kick decrementer */
|
||||||
|
li r0, 1
|
||||||
|
mtdec r0
|
||||||
|
|
||||||
|
/* Invalidate all tlbs */
|
||||||
|
bl _tlbil_all
|
||||||
|
#endif
|
||||||
RESTORE_SPECIAL(XER)
|
RESTORE_SPECIAL(XER)
|
||||||
|
|
||||||
sync
|
sync
|
||||||
|
|
||||||
addi r1,r1,-128
|
addi r1,r1,-128
|
||||||
|
#ifdef CONFIG_PPC_BOOK3S_64
|
||||||
bl slb_flush_and_rebolt
|
bl slb_flush_and_rebolt
|
||||||
|
#endif
|
||||||
bl do_after_copyback
|
bl do_after_copyback
|
||||||
addi r1,r1,128
|
addi r1,r1,128
|
||||||
|
|
||||||
|
|||||||
@ -232,9 +232,9 @@ __do_get_tspec:
|
|||||||
lwz r6,(CFG_TB_ORIG_STAMP+4)(r9)
|
lwz r6,(CFG_TB_ORIG_STAMP+4)(r9)
|
||||||
|
|
||||||
/* Get a stable TB value */
|
/* Get a stable TB value */
|
||||||
2: mftbu r3
|
2: mfspr r3, SPRN_TBRU
|
||||||
mftbl r4
|
mfspr r4, SPRN_TBRL
|
||||||
mftbu r0
|
mfspr r0, SPRN_TBRU
|
||||||
cmplw cr0,r3,r0
|
cmplw cr0,r3,r0
|
||||||
bne- 2b
|
bne- 2b
|
||||||
|
|
||||||
|
|||||||
@ -32,6 +32,12 @@ config BSC9131_RDB
|
|||||||
StarCore SC3850 DSP
|
StarCore SC3850 DSP
|
||||||
Manufacturer : Freescale Semiconductor, Inc
|
Manufacturer : Freescale Semiconductor, Inc
|
||||||
|
|
||||||
|
config C293_PCIE
|
||||||
|
bool "Freescale C293PCIE"
|
||||||
|
select DEFAULT_UIMAGE
|
||||||
|
help
|
||||||
|
This option enables support for the C293PCIE board
|
||||||
|
|
||||||
config MPC8540_ADS
|
config MPC8540_ADS
|
||||||
bool "Freescale MPC8540 ADS"
|
bool "Freescale MPC8540 ADS"
|
||||||
select DEFAULT_UIMAGE
|
select DEFAULT_UIMAGE
|
||||||
@ -112,10 +118,10 @@ config P1022_RDK
|
|||||||
reference board.
|
reference board.
|
||||||
|
|
||||||
config P1023_RDS
|
config P1023_RDS
|
||||||
bool "Freescale P1023 RDS"
|
bool "Freescale P1023 RDS/RDB"
|
||||||
select DEFAULT_UIMAGE
|
select DEFAULT_UIMAGE
|
||||||
help
|
help
|
||||||
This option enables support for the P1023 RDS board
|
This option enables support for the P1023 RDS and RDB boards
|
||||||
|
|
||||||
config SOCRATES
|
config SOCRATES
|
||||||
bool "Socrates"
|
bool "Socrates"
|
||||||
|
|||||||
@ -6,6 +6,7 @@ obj-$(CONFIG_SMP) += smp.o
|
|||||||
obj-y += common.o
|
obj-y += common.o
|
||||||
|
|
||||||
obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o
|
obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o
|
||||||
|
obj-$(CONFIG_C293_PCIE) += c293pcie.o
|
||||||
obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
|
obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
|
||||||
obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
|
obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
|
||||||
obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
|
obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
|
||||||
|
|||||||
75
arch/powerpc/platforms/85xx/c293pcie.c
Normal file
75
arch/powerpc/platforms/85xx/c293pcie.c
Normal file
@ -0,0 +1,75 @@
|
|||||||
|
/*
|
||||||
|
* C293PCIE Board Setup
|
||||||
|
*
|
||||||
|
* Copyright 2013 Freescale Semiconductor Inc.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
|
* under the terms of the GNU General Public License as published by the
|
||||||
|
* Free Software Foundation; either version 2 of the License, or (at your
|
||||||
|
* option) any later version.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <linux/stddef.h>
|
||||||
|
#include <linux/kernel.h>
|
||||||
|
#include <linux/of_platform.h>
|
||||||
|
|
||||||
|
#include <asm/machdep.h>
|
||||||
|
#include <asm/udbg.h>
|
||||||
|
#include <asm/mpic.h>
|
||||||
|
|
||||||
|
#include <sysdev/fsl_soc.h>
|
||||||
|
#include <sysdev/fsl_pci.h>
|
||||||
|
|
||||||
|
#include "mpc85xx.h"
|
||||||
|
|
||||||
|
void __init c293_pcie_pic_init(void)
|
||||||
|
{
|
||||||
|
struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
|
||||||
|
MPIC_SINGLE_DEST_CPU, 0, 256, " OpenPIC ");
|
||||||
|
|
||||||
|
BUG_ON(mpic == NULL);
|
||||||
|
|
||||||
|
mpic_init(mpic);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Setup the architecture
|
||||||
|
*/
|
||||||
|
static void __init c293_pcie_setup_arch(void)
|
||||||
|
{
|
||||||
|
if (ppc_md.progress)
|
||||||
|
ppc_md.progress("c293_pcie_setup_arch()", 0);
|
||||||
|
|
||||||
|
fsl_pci_assign_primary();
|
||||||
|
|
||||||
|
printk(KERN_INFO "C293 PCIE board from Freescale Semiconductor\n");
|
||||||
|
}
|
||||||
|
|
||||||
|
machine_arch_initcall(c293_pcie, mpc85xx_common_publish_devices);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Called very early, device-tree isn't unflattened
|
||||||
|
*/
|
||||||
|
static int __init c293_pcie_probe(void)
|
||||||
|
{
|
||||||
|
unsigned long root = of_get_flat_dt_root();
|
||||||
|
|
||||||
|
if (of_flat_dt_is_compatible(root, "fsl,C293PCIE"))
|
||||||
|
return 1;
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
define_machine(c293_pcie) {
|
||||||
|
.name = "C293 PCIE",
|
||||||
|
.probe = c293_pcie_probe,
|
||||||
|
.setup_arch = c293_pcie_setup_arch,
|
||||||
|
.init_IRQ = c293_pcie_pic_init,
|
||||||
|
#ifdef CONFIG_PCI
|
||||||
|
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
|
||||||
|
#endif
|
||||||
|
.get_irq = mpic_get_irq,
|
||||||
|
.restart = fsl_rstcr_restart,
|
||||||
|
.calibrate_decr = generic_calibrate_decr,
|
||||||
|
.progress = udbg_progress,
|
||||||
|
};
|
||||||
@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* Copyright 2010-2011 Freescale Semiconductor, Inc.
|
* Copyright 2010-2011, 2013 Freescale Semiconductor, Inc.
|
||||||
*
|
*
|
||||||
* Author: Roy Zang <tie-fei.zang@freescale.com>
|
* Author: Roy Zang <tie-fei.zang@freescale.com>
|
||||||
*
|
*
|
||||||
@ -86,6 +86,7 @@ static void __init mpc85xx_rds_setup_arch(void)
|
|||||||
}
|
}
|
||||||
|
|
||||||
machine_arch_initcall(p1023_rds, mpc85xx_common_publish_devices);
|
machine_arch_initcall(p1023_rds, mpc85xx_common_publish_devices);
|
||||||
|
machine_arch_initcall(p1023_rdb, mpc85xx_common_publish_devices);
|
||||||
|
|
||||||
static void __init mpc85xx_rds_pic_init(void)
|
static void __init mpc85xx_rds_pic_init(void)
|
||||||
{
|
{
|
||||||
@ -106,6 +107,14 @@ static int __init p1023_rds_probe(void)
|
|||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static int __init p1023_rdb_probe(void)
|
||||||
|
{
|
||||||
|
unsigned long root = of_get_flat_dt_root();
|
||||||
|
|
||||||
|
return of_flat_dt_is_compatible(root, "fsl,P1023RDB");
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
define_machine(p1023_rds) {
|
define_machine(p1023_rds) {
|
||||||
.name = "P1023 RDS",
|
.name = "P1023 RDS",
|
||||||
.probe = p1023_rds_probe,
|
.probe = p1023_rds_probe,
|
||||||
@ -120,3 +129,16 @@ define_machine(p1023_rds) {
|
|||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
|
|
||||||
|
define_machine(p1023_rdb) {
|
||||||
|
.name = "P1023 RDB",
|
||||||
|
.probe = p1023_rdb_probe,
|
||||||
|
.setup_arch = mpc85xx_rds_setup_arch,
|
||||||
|
.init_IRQ = mpc85xx_rds_pic_init,
|
||||||
|
.get_irq = mpic_get_irq,
|
||||||
|
.restart = fsl_rstcr_restart,
|
||||||
|
.calibrate_decr = generic_calibrate_decr,
|
||||||
|
.progress = udbg_progress,
|
||||||
|
#ifdef CONFIG_PCI
|
||||||
|
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
|
||||||
|
#endif
|
||||||
|
};
|
||||||
|
|||||||
@ -69,7 +69,32 @@ static void mpc85xx_give_timebase(void)
|
|||||||
tb_req = 0;
|
tb_req = 0;
|
||||||
|
|
||||||
mpc85xx_timebase_freeze(1);
|
mpc85xx_timebase_freeze(1);
|
||||||
|
#ifdef CONFIG_PPC64
|
||||||
|
/*
|
||||||
|
* e5500/e6500 have a workaround for erratum A-006958 in place
|
||||||
|
* that will reread the timebase until TBL is non-zero.
|
||||||
|
* That would be a bad thing when the timebase is frozen.
|
||||||
|
*
|
||||||
|
* Thus, we read it manually, and instead of checking that
|
||||||
|
* TBL is non-zero, we ensure that TB does not change. We don't
|
||||||
|
* do that for the main mftb implementation, because it requires
|
||||||
|
* a scratch register
|
||||||
|
*/
|
||||||
|
{
|
||||||
|
u64 prev;
|
||||||
|
|
||||||
|
asm volatile("mfspr %0, %1" : "=r" (timebase) :
|
||||||
|
"i" (SPRN_TBRL));
|
||||||
|
|
||||||
|
do {
|
||||||
|
prev = timebase;
|
||||||
|
asm volatile("mfspr %0, %1" : "=r" (timebase) :
|
||||||
|
"i" (SPRN_TBRL));
|
||||||
|
} while (prev != timebase);
|
||||||
|
}
|
||||||
|
#else
|
||||||
timebase = get_tb();
|
timebase = get_tb();
|
||||||
|
#endif
|
||||||
mb();
|
mb();
|
||||||
tb_valid = 1;
|
tb_valid = 1;
|
||||||
|
|
||||||
|
|||||||
@ -96,18 +96,31 @@ config GENERIC_CPU
|
|||||||
|
|
||||||
config CELL_CPU
|
config CELL_CPU
|
||||||
bool "Cell Broadband Engine"
|
bool "Cell Broadband Engine"
|
||||||
|
depends on PPC_BOOK3S_64
|
||||||
|
|
||||||
config POWER4_CPU
|
config POWER4_CPU
|
||||||
bool "POWER4"
|
bool "POWER4"
|
||||||
|
depends on PPC_BOOK3S_64
|
||||||
|
|
||||||
config POWER5_CPU
|
config POWER5_CPU
|
||||||
bool "POWER5"
|
bool "POWER5"
|
||||||
|
depends on PPC_BOOK3S_64
|
||||||
|
|
||||||
config POWER6_CPU
|
config POWER6_CPU
|
||||||
bool "POWER6"
|
bool "POWER6"
|
||||||
|
depends on PPC_BOOK3S_64
|
||||||
|
|
||||||
config POWER7_CPU
|
config POWER7_CPU
|
||||||
bool "POWER7"
|
bool "POWER7"
|
||||||
|
depends on PPC_BOOK3S_64
|
||||||
|
|
||||||
|
config E5500_CPU
|
||||||
|
bool "Freescale e5500"
|
||||||
|
depends on E500
|
||||||
|
|
||||||
|
config E6500_CPU
|
||||||
|
bool "Freescale e6500"
|
||||||
|
depends on E500
|
||||||
|
|
||||||
endchoice
|
endchoice
|
||||||
|
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user